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sbus.c revision 1.78
      1 /*	$NetBSD: sbus.c,v 1.77 2012/07/29 00:04:05 matt Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Paul Kranenburg.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 /*
     33  * Copyright (c) 1992, 1993
     34  *	The Regents of the University of California.  All rights reserved.
     35  *
     36  * This software was developed by the Computer Systems Engineering group
     37  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
     38  * contributed to Berkeley.
     39  *
     40  * All advertising materials mentioning features or use of this software
     41  * must display the following acknowledgement:
     42  *	This product includes software developed by the University of
     43  *	California, Lawrence Berkeley Laboratory.
     44  *
     45  * Redistribution and use in source and binary forms, with or without
     46  * modification, are permitted provided that the following conditions
     47  * are met:
     48  * 1. Redistributions of source code must retain the above copyright
     49  *    notice, this list of conditions and the following disclaimer.
     50  * 2. Redistributions in binary form must reproduce the above copyright
     51  *    notice, this list of conditions and the following disclaimer in the
     52  *    documentation and/or other materials provided with the distribution.
     53  * 3. Neither the name of the University nor the names of its contributors
     54  *    may be used to endorse or promote products derived from this software
     55  *    without specific prior written permission.
     56  *
     57  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     58  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     59  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     60  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     61  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     62  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     63  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     64  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     65  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     66  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     67  * SUCH DAMAGE.
     68  *
     69  *	@(#)sbus.c	8.1 (Berkeley) 6/11/93
     70  */
     71 
     72 /*
     73  * Sbus stuff.
     74  */
     75 
     76 #include <sys/cdefs.h>
     77 __KERNEL_RCSID(0, "$NetBSD: sbus.c,v 1.77 2012/07/29 00:04:05 matt Exp $");
     78 
     79 #include <sys/param.h>
     80 #include <sys/malloc.h>
     81 #include <sys/kernel.h>
     82 #include <sys/systm.h>
     83 #include <sys/device.h>
     84 
     85 #include <uvm/uvm_extern.h>
     86 
     87 #include <machine/autoconf.h>
     88 #include <sys/bus.h>
     89 #include <sparc/dev/sbusreg.h>
     90 #include <dev/sbus/sbusvar.h>
     91 #include <dev/sbus/xboxvar.h>
     92 
     93 #include <sparc/sparc/iommuvar.h>
     94 
     95 void sbusreset(int);
     96 
     97 static int sbus_get_intr(struct sbus_softc *, int,
     98 			 struct openprom_intr **, int *);
     99 static void *sbus_intr_establish(
    100 		bus_space_tag_t,
    101 		int,			/* Sbus interrupt level */
    102 		int,			/* `device class' priority */
    103 		int (*)(void *),	/* handler */
    104 		void *,			/* handler arg */
    105 		void (*)(void));	/* fast handler */
    106 
    107 
    108 /* autoconfiguration driver */
    109 int	sbus_match_mainbus(device_t, struct cfdata *, void *);
    110 int	sbus_match_iommu(device_t, struct cfdata *, void *);
    111 int	sbus_match_xbox(device_t, struct cfdata *, void *);
    112 void	sbus_attach_mainbus(device_t, device_t, void *);
    113 void	sbus_attach_iommu(device_t, device_t, void *);
    114 void	sbus_attach_xbox(device_t, device_t, void *);
    115 
    116 #if (defined(SUN4M) && !defined(MSIIEP)) || defined(SUN4D)
    117 static	int sbus_error(void);
    118 extern	int (*sbuserr_handler)(void);
    119 #endif
    120 
    121 CFATTACH_DECL_NEW(sbus_mainbus, sizeof(struct sbus_softc),
    122     sbus_match_mainbus, sbus_attach_mainbus, NULL, NULL);
    123 
    124 CFATTACH_DECL_NEW(sbus_iommu, sizeof(struct sbus_softc),
    125     sbus_match_iommu, sbus_attach_iommu, NULL, NULL);
    126 
    127 CFATTACH_DECL_NEW(sbus_xbox, sizeof(struct sbus_softc),
    128     sbus_match_xbox, sbus_attach_xbox, NULL, NULL);
    129 
    130 extern struct cfdriver sbus_cd;
    131 
    132 static int sbus_mainbus_attached;
    133 
    134 /* The "primary" Sbus */
    135 struct sbus_softc *sbus_sc;
    136 
    137 /* If the PROM does not provide the `ranges' property, we make up our own */
    138 struct openprom_range sbus_translations[] = {
    139 	/* Assume a maximum of 4 Sbus slots, all mapped to on-board io space */
    140 	{ 0, 0, PMAP_OBIO, SBUS_ADDR(0,0), 1 << 25 },
    141 	{ 1, 0, PMAP_OBIO, SBUS_ADDR(1,0), 1 << 25 },
    142 	{ 2, 0, PMAP_OBIO, SBUS_ADDR(2,0), 1 << 25 },
    143 	{ 3, 0, PMAP_OBIO, SBUS_ADDR(3,0), 1 << 25 }
    144 };
    145 
    146 /*
    147  * Child devices receive the Sbus interrupt level in their attach
    148  * arguments. We translate these to CPU IPLs using the following
    149  * tables. Note: obio bus interrupt levels are identical to the
    150  * processor IPL.
    151  *
    152  * The second set of tables is used when the Sbus interrupt level
    153  * cannot be had from the PROM as an `interrupt' property. We then
    154  * fall back on the `intr' property which contains the CPU IPL.
    155  */
    156 
    157 /* Translate Sbus interrupt level to processor IPL */
    158 static int intr_sbus2ipl_4c[] = {
    159 	0, 1, 2, 3, 5, 7, 8, 9
    160 };
    161 static int intr_sbus2ipl_4m[] = {
    162 	0, 2, 3, 5, 7, 9, 11, 13
    163 };
    164 
    165 /*
    166  * This value is or'ed into the attach args' interrupt level cookie
    167  * if the interrupt level comes from an `intr' property, i.e. it is
    168  * not an Sbus interrupt level.
    169  */
    170 #define SBUS_INTR_COMPAT	0x80000000
    171 
    172 
    173 /*
    174  * Print the location of some sbus-attached device (called just
    175  * before attaching that device).  If `sbus' is not NULL, the
    176  * device was found but not configured; print the sbus as well.
    177  * Return UNCONF (config_find ignores this if the device was configured).
    178  */
    179 int
    180 sbus_print(void *args, const char *busname)
    181 {
    182 	struct sbus_attach_args *sa = args;
    183 	int i;
    184 
    185 	if (busname)
    186 		aprint_normal("%s at %s", sa->sa_name, busname);
    187 	aprint_normal(" slot %d offset 0x%x", sa->sa_slot, sa->sa_offset);
    188 	for (i = 0; i < sa->sa_nintr; i++) {
    189 		uint32_t level = sa->sa_intr[i].oi_pri;
    190 		struct sbus_softc *sc =
    191 			(struct sbus_softc *) sa->sa_bustag->cookie;
    192 
    193 		aprint_normal(" level %d", level & ~SBUS_INTR_COMPAT);
    194 		if ((level & SBUS_INTR_COMPAT) == 0) {
    195 			int ipl = sc->sc_intr2ipl[level];
    196 			if (ipl != level)
    197 				aprint_normal(" (ipl %d)", ipl);
    198 		}
    199 	}
    200 	return (UNCONF);
    201 }
    202 
    203 int
    204 sbus_match_mainbus(device_t parent, struct cfdata *cf, void *aux)
    205 {
    206 	struct mainbus_attach_args *ma = aux;
    207 
    208 	if (CPU_ISSUN4 || sbus_mainbus_attached)
    209 		return (0);
    210 
    211 	return (strcmp(cf->cf_name, ma->ma_name) == 0);
    212 }
    213 
    214 int
    215 sbus_match_iommu(device_t parent, struct cfdata *cf, void *aux)
    216 {
    217 	struct iommu_attach_args *ia = aux;
    218 
    219 	if (CPU_ISSUN4)
    220 		return (0);
    221 
    222 	return (strcmp(cf->cf_name, ia->iom_name) == 0);
    223 }
    224 
    225 int
    226 sbus_match_xbox(device_t parent, struct cfdata *cf, void *aux)
    227 {
    228 	struct xbox_attach_args *xa = aux;
    229 
    230 	if (CPU_ISSUN4)
    231 		return (0);
    232 
    233 	return (strcmp(cf->cf_name, xa->xa_name) == 0);
    234 }
    235 
    236 /*
    237  * Attach an Sbus.
    238  */
    239 void
    240 sbus_attach_mainbus(device_t parent, device_t self, void *aux)
    241 {
    242 	struct sbus_softc *sc = device_private(self);
    243 	struct mainbus_attach_args *ma = aux;
    244 	int node = ma->ma_node;
    245 
    246 	sbus_mainbus_attached = 1;
    247 
    248 	sc->sc_dev = self;
    249 	sc->sc_bustag = ma->ma_bustag;
    250 	sc->sc_dmatag = ma->ma_dmatag;
    251 
    252 #if 0	/* sbus at mainbus (sun4c): `reg' prop is not control space */
    253 	if (ma->ma_size == 0)
    254 		printf("%s: no Sbus registers", device_xname(self));
    255 
    256 	if (bus_space_map(ma->ma_bustag,
    257 			  ma->ma_paddr,
    258 			  ma->ma_size,
    259 			  BUS_SPACE_MAP_LINEAR,
    260 			  &sc->sc_bh) != 0) {
    261 		panic("%s: can't map sbusbusreg", device_xname(self));
    262 	}
    263 #endif
    264 
    265 	/* Setup interrupt translation tables */
    266 	sc->sc_intr2ipl = CPU_ISSUN4C
    267 				? intr_sbus2ipl_4c
    268 				: intr_sbus2ipl_4m;
    269 
    270 	/*
    271 	 * Record clock frequency for synchronous SCSI.
    272 	 * IS THIS THE CORRECT DEFAULT??
    273 	 */
    274 	sc->sc_clockfreq = prom_getpropint(node, "clock-frequency", 25*1000*1000);
    275 	printf(": clock = %s MHz\n", clockfreq(sc->sc_clockfreq));
    276 
    277 	sbus_sc = sc;
    278 	sbus_attach_common(sc, "sbus", node, NULL);
    279 }
    280 
    281 
    282 void
    283 sbus_attach_iommu(device_t parent, device_t self, void *aux)
    284 {
    285 	struct sbus_softc *sc = device_private(self);
    286 	struct iommu_attach_args *ia = aux;
    287 	int node = ia->iom_node;
    288 
    289 	sc->sc_dev = self;
    290 	sc->sc_bustag = ia->iom_bustag;
    291 	sc->sc_dmatag = ia->iom_dmatag;
    292 
    293 	if (ia->iom_nreg == 0)
    294 		panic("%s: no Sbus registers", device_xname(self));
    295 
    296 	if (bus_space_map(ia->iom_bustag,
    297 			  BUS_ADDR(ia->iom_reg[0].oa_space,
    298 				   ia->iom_reg[0].oa_base),
    299 			  (bus_size_t)ia->iom_reg[0].oa_size,
    300 			  BUS_SPACE_MAP_LINEAR,
    301 			  &sc->sc_bh) != 0) {
    302 		panic("%s: can't map sbusbusreg", device_xname(self));
    303 	}
    304 
    305 	/* Setup interrupt translation tables */
    306 	sc->sc_intr2ipl = CPU_ISSUN4C ? intr_sbus2ipl_4c : intr_sbus2ipl_4m;
    307 
    308 	/*
    309 	 * Record clock frequency for synchronous SCSI.
    310 	 * IS THIS THE CORRECT DEFAULT??
    311 	 */
    312 	sc->sc_clockfreq = prom_getpropint(node, "clock-frequency", 25*1000*1000);
    313 	printf(": clock = %s MHz\n", clockfreq(sc->sc_clockfreq));
    314 
    315 	sbus_sc = sc;
    316 #if (defined(SUN4M) && !defined(MSIIEP)) || defined(SUN4D)
    317 	sbuserr_handler = sbus_error;
    318 #endif
    319 	sbus_attach_common(sc, "sbus", node, NULL);
    320 }
    321 
    322 void
    323 sbus_attach_xbox(device_t parent, device_t self, void *aux)
    324 {
    325 	struct sbus_softc *sc = device_private(self);
    326 	struct xbox_attach_args *xa = aux;
    327 	int node = xa->xa_node;
    328 
    329 	sc->sc_bustag = xa->xa_bustag;
    330 	sc->sc_dmatag = xa->xa_dmatag;
    331 
    332 	/* Setup interrupt translation tables */
    333 	sc->sc_intr2ipl = CPU_ISSUN4C ? intr_sbus2ipl_4c : intr_sbus2ipl_4m;
    334 
    335 	/*
    336 	 * Record clock frequency for synchronous SCSI.
    337 	 * IS THIS THE CORRECT DEFAULT??
    338 	 */
    339 	sc->sc_clockfreq = prom_getpropint(node, "clock-frequency", 25*1000*1000);
    340 	printf(": clock = %s MHz\n", clockfreq(sc->sc_clockfreq));
    341 
    342 	sbus_attach_common(sc, "sbus", node, NULL);
    343 }
    344 
    345 void
    346 sbus_attach_common(struct sbus_softc *sc, const char *busname, int busnode,
    347 		   const char * const *specials)
    348 {
    349 	int node0, node, error;
    350 	const char *sp;
    351 	const char *const *ssp;
    352 	bus_space_tag_t sbt;
    353 	struct sbus_attach_args sa;
    354 
    355 	if ((sbt = bus_space_tag_alloc(sc->sc_bustag, sc)) == NULL) {
    356 		printf("%s: attach: out of memory\n",
    357 		    device_xname(sc->sc_dev));
    358 		return;
    359 	}
    360 	sbt->sparc_intr_establish = sbus_intr_establish;
    361 
    362 	/*
    363 	 * Get the SBus burst transfer size if burst transfers are supported
    364 	 */
    365 	sc->sc_burst = prom_getpropint(busnode, "burst-sizes", 0);
    366 
    367 
    368 	if (CPU_ISSUN4M) {
    369 		/*
    370 		 * Some models (e.g. SS20) erroneously report 64-bit
    371 		 * burst capability. We mask it out here for all SUN4Ms,
    372 		 * since probably no member of that class supports
    373 		 * 64-bit Sbus bursts.
    374 		 */
    375 		sc->sc_burst &= ~SBUS_BURST_64;
    376 	}
    377 
    378 	/*
    379 	 * Collect address translations from the OBP.
    380 	 */
    381 	error = prom_getprop(busnode, "ranges", sizeof(struct rom_range),
    382 			&sbt->nranges, &sbt->ranges);
    383 	switch (error) {
    384 	case 0:
    385 		break;
    386 	case ENOENT:
    387 		/* Fall back to our own `range' construction */
    388 		sbt->ranges = sbus_translations;
    389 		sbt->nranges =
    390 			sizeof(sbus_translations)/sizeof(sbus_translations[0]);
    391 		break;
    392 	default:
    393 		panic("%s: error getting ranges property",
    394 		    device_xname(sc->sc_dev));
    395 	}
    396 
    397 	/*
    398 	 * Loop through ROM children, fixing any relative addresses
    399 	 * and then configuring each device.
    400 	 * `specials' is an array of device names that are treated
    401 	 * specially:
    402 	 */
    403 	node0 = firstchild(busnode);
    404 	for (ssp = specials ; ssp != NULL && *(sp = *ssp) != 0; ssp++) {
    405 		if ((node = findnode(node0, sp)) == 0) {
    406 			panic("could not find %s amongst %s devices",
    407 				sp, busname);
    408 		}
    409 
    410 		if (sbus_setup_attach_args(sc, sbt, sc->sc_dmatag,
    411 					   node, &sa) != 0) {
    412 			panic("sbus_attach: %s: incomplete", sp);
    413 		}
    414 		(void) config_found(sc->sc_dev, (void *)&sa, sbus_print);
    415 		sbus_destroy_attach_args(&sa);
    416 	}
    417 
    418 	for (node = node0; node; node = nextsibling(node)) {
    419 		char *name = prom_getpropstring(node, "name");
    420 		for (ssp = specials, sp = NULL;
    421 		     ssp != NULL && (sp = *ssp) != NULL;
    422 		     ssp++)
    423 			if (strcmp(name, sp) == 0)
    424 				break;
    425 
    426 		if (sp != NULL)
    427 			/* Already configured as an "early" device */
    428 			continue;
    429 
    430 		if (sbus_setup_attach_args(sc, sbt, sc->sc_dmatag,
    431 					   node, &sa) != 0) {
    432 			printf("sbus_attach: %s: incomplete\n", name);
    433 			continue;
    434 		}
    435 		(void) config_found(sc->sc_dev, (void *)&sa, sbus_print);
    436 		sbus_destroy_attach_args(&sa);
    437 	}
    438 }
    439 
    440 int
    441 sbus_setup_attach_args(struct sbus_softc *sc,
    442 		       bus_space_tag_t bustag, bus_dma_tag_t dmatag, int node,
    443 		       struct sbus_attach_args *sa)
    444 {
    445 	int n, error;
    446 
    447 	memset(sa, 0, sizeof(struct sbus_attach_args));
    448 	error = prom_getprop(node, "name", 1, &n, &sa->sa_name);
    449 	if (error != 0)
    450 		return (error);
    451 	KASSERT(sa->sa_name[n-1] == '\0');
    452 
    453 	sa->sa_bustag = bustag;
    454 	sa->sa_dmatag = dmatag;
    455 	sa->sa_node = node;
    456 	sa->sa_frequency = sc->sc_clockfreq;
    457 
    458 	error = prom_getprop(node, "reg", sizeof(struct openprom_addr),
    459 			&sa->sa_nreg, &sa->sa_reg);
    460 	if (error != 0) {
    461 		char buf[32];
    462 		if (error != ENOENT ||
    463 		    !node_has_property(node, "device_type") ||
    464 		    strcmp(prom_getpropstringA(node, "device_type", buf, sizeof buf),
    465 			   "hierarchical") != 0)
    466 			return (error);
    467 	}
    468 	for (n = 0; n < sa->sa_nreg; n++) {
    469 		/* Convert to relative addressing, if necessary */
    470 		uint32_t base = sa->sa_reg[n].oa_base;
    471 		if (SBUS_ABS(base)) {
    472 			sa->sa_reg[n].oa_space = SBUS_ABS_TO_SLOT(base);
    473 			sa->sa_reg[n].oa_base = SBUS_ABS_TO_OFFSET(base);
    474 		}
    475 	}
    476 
    477 	if ((error = sbus_get_intr(sc, node, &sa->sa_intr, &sa->sa_nintr)) != 0)
    478 		return (error);
    479 
    480 	error = prom_getprop(node, "address", sizeof(uint32_t),
    481 			 &sa->sa_npromvaddrs, &sa->sa_promvaddrs);
    482 	if (error != 0 && error != ENOENT)
    483 		return (error);
    484 
    485 	return (0);
    486 }
    487 
    488 void
    489 sbus_destroy_attach_args(struct sbus_attach_args *sa)
    490 {
    491 
    492 	if (sa->sa_name != NULL)
    493 		free(sa->sa_name, M_DEVBUF);
    494 
    495 	if (sa->sa_nreg != 0)
    496 		free(sa->sa_reg, M_DEVBUF);
    497 
    498 	if (sa->sa_intr)
    499 		free(sa->sa_intr, M_DEVBUF);
    500 
    501 	if (sa->sa_promvaddrs)
    502 		free(sa->sa_promvaddrs, M_DEVBUF);
    503 
    504 	memset(sa, 0, sizeof(struct sbus_attach_args));/*DEBUG*/
    505 }
    506 
    507 bus_addr_t
    508 sbus_bus_addr(bus_space_tag_t t, u_int btype, u_int offset)
    509 {
    510 
    511 	/* XXX: sbus_bus_addr should be g/c'ed */
    512 	return (BUS_ADDR(btype, offset));
    513 }
    514 
    515 
    516 /*
    517  * Get interrupt attributes for an Sbus device.
    518  */
    519 static int
    520 sbus_get_intr(struct sbus_softc *sc, int node,
    521 	      struct openprom_intr **ipp, int *np)
    522 {
    523 	int error, n;
    524 	uint32_t *ipl = NULL;
    525 
    526 	/*
    527 	 * The `interrupts' property contains the Sbus interrupt level.
    528 	 */
    529 	if (prom_getprop(node, "interrupts", sizeof(int), np,
    530 			 &ipl) == 0) {
    531 		/* Change format to an `struct openprom_intr' array */
    532 		struct openprom_intr *ip;
    533 		ip = malloc(*np * sizeof(struct openprom_intr), M_DEVBUF,
    534 		    M_NOWAIT);
    535 		if (ip == NULL) {
    536 			free(ipl, M_DEVBUF);
    537 			return (ENOMEM);
    538 		}
    539 		for (n = 0; n < *np; n++) {
    540 			ip[n].oi_pri = ipl[n];
    541 			ip[n].oi_vec = 0;
    542 		}
    543 		free(ipl, M_DEVBUF);
    544 		*ipp = ip;
    545 		return (0);
    546 	}
    547 
    548 	/*
    549 	 * Fall back on `intr' property.
    550 	 */
    551 	*ipp = NULL;
    552 	error = prom_getprop(node, "intr", sizeof(struct openprom_intr),
    553 			np, ipp);
    554 	switch (error) {
    555 	case 0:
    556 		for (n = *np; n-- > 0;) {
    557 			(*ipp)[n].oi_pri &= 0xf;
    558 			(*ipp)[n].oi_pri |= SBUS_INTR_COMPAT;
    559 		}
    560 		break;
    561 	case ENOENT:
    562 		error = 0;
    563 		break;
    564 	}
    565 
    566 	return (error);
    567 }
    568 
    569 
    570 /*
    571  * Install an interrupt handler for an Sbus device.
    572  */
    573 static void *
    574 sbus_intr_establish(bus_space_tag_t t, int pri, int level,
    575 		    int (*handler)(void *), void *arg,
    576 		    void (*fastvec)(void))
    577 {
    578 	struct sbus_softc *sc = t->cookie;
    579 	struct intrhand *ih;
    580 	int pil;
    581 
    582 	ih = (struct intrhand *)
    583 		malloc(sizeof(struct intrhand), M_DEVBUF, M_NOWAIT);
    584 	if (ih == NULL)
    585 		return (NULL);
    586 
    587 	/*
    588 	 * Translate Sbus interrupt priority to CPU interrupt level
    589 	 */
    590 	if ((pri & SBUS_INTR_COMPAT) != 0)
    591 		pil = pri & ~SBUS_INTR_COMPAT;
    592 	else
    593 		pil = sc->sc_intr2ipl[pri];
    594 
    595 	ih->ih_fun = handler;
    596 	ih->ih_arg = arg;
    597 	intr_establish(pil, level, ih, fastvec, false);
    598 	return (ih);
    599 }
    600 
    601 #if (defined(SUN4M) && !defined(MSIIEP)) || defined(SUN4D)
    602 static int
    603 sbus_error(void)
    604 {
    605 	struct sbus_softc *sc = sbus_sc;
    606 	bus_space_handle_t bh = sc->sc_bh;
    607 	uint32_t afsr, afva;
    608 	char bits[64];
    609 static	int straytime, nstray;
    610 	int timesince;
    611 
    612 	afsr = bus_space_read_4(sc->sc_bustag, bh, SBUS_AFSR_REG);
    613 	afva = bus_space_read_4(sc->sc_bustag, bh, SBUS_AFAR_REG);
    614 	snprintb(bits, sizeof(bits), SBUS_AFSR_BITS, afsr);
    615 	printf("sbus error:\n\tAFSR %s\n", bits);
    616 	printf("\taddress: 0x%x%x\n", afsr & SBUS_AFSR_PAH, afva);
    617 
    618 	/* For now, do the same dance as on stray interrupts */
    619 	timesince = time_uptime - straytime;
    620 	if (timesince <= 10) {
    621 		if (++nstray > 9)
    622 			panic("too many SBus errors");
    623 	} else {
    624 		straytime = time_uptime;
    625 		nstray = 1;
    626 	}
    627 
    628 	/* Unlock registers and clear interrupt */
    629 	bus_space_write_4(sc->sc_bustag, bh, SBUS_AFSR_REG, afsr);
    630 
    631 	return (0);
    632 }
    633 #endif
    634