Improve am7930 family drivers to share more code.
audioamd(4) on sparc, vsaudio(4) on vax, and bba(4) are.
- Remove complex and useless callbacks: onopen, onclose, and
indirect_{read,write}. This makes audioamd and vsaudio almost the same.
- Remove (already disabled) assembly fast interrupt path from audioamd(4).
cf. http://mail-index.netbsd.org/source-changes/2009/12/19/msg004585.html
- Use trigger_* method rather than start_* method. It's more suitable.
vsaudio(4) was tested by naru@, bba(4) was tested by tsutsui@.

G/C

G/C LS{SLEEP,RUN,ONPROC}

LWP status manipulation was moved out of assembly long ago.

branches: 1.68.38; 1.68.44;
Add RAS support for sparc.

branches: 1.67.2; 1.67.12;
re-introduce the NULL savefpstate IPI checks and evcnts. something
is Wrong with GCC 4.5.3 and these trigger. i haven't seen anything
else particularly wrong so for now this will allow sparc to switch
to GCC 4.5, which otherwise seems to be working very well for me.

sigh. i'm going to file a PR to research what is really wrong here.

#include <sys/bus.h> instead of <machine/bus.h>.

remove the evcnt for NULL struct fpstate * ipi, and switch over to an
explicit panic() if we get one.

i'm pretty sure that converting xmpsg_lock from IPL_VM to IPL_SCHED
fixed this problem properly. i have not seen the evcnt trigger since
that change, nor have several others queried.

consolidate the interrupt evcnt(9) into a full set of per-IPL per-CPU
soft/hard counters. beyond the extra info, it seems to help avoid some
of these counters getting corrupted due to unlocked multiple accesses.

adjust the xcallintr() from xcall() hack so that we don't count these
events as interrupts. align the existing evcnt name to count this.

branches: 1.63.2; 1.63.4;
Retire struct user, remove sys/user.h inclusions. Note sys/user.h header
as obsolete. Remove USER_TO_UAREA/UAREA_TO_USER macros.

Various #include fixes and review by matt@.

introduce a hack to workaround the savefpstate IPI get's NULL
struct fpstate *.

add a new entry point ipi_savefpstate() that is used for this IPI
instead of the plain ipi_savefpstate(). check for %o0 being NULL,
and if so, just return.

add event counters for the savefpstate IPI, and another one for
when it detects the NULL problem.

make the cpu_info struct xmpsg be aligned to a single cache line.

with this change applied (and another minor change in testing) my
SS20 with dual SM75's has survived for 17 hours on build.sh -j5,
and has reported 7 NULL savefps. (the minor change seems to have
a significant effect at reducing this number, but more testing is
needed for it.)


XXX: this is horrible and we really need to find the real problem
XXX: but this should let people use sparc smp again, and fixes
XXX: for the real problem can be tested by seeing if any of the
XXX: savefp IPI null counter becomes non-zero.

Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch
from uvmexp to per-cpu cpu_data and move them to 64bits. Remove unneeded
includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.

branches: 1.60.4;
use genassym generated names for struct intrhand elements and avoid magic.

Rename L_ADDR to L_PCB and amend some comments accordingly.

Use lwp_getpcb() on sparc{64} and sun2/3 MD code, clean from struct user usage.

convert sparc "intrcnt" counters to evcnt(9) style. XXX some of the names
could be better, but i just copied them from the old intrnames in locore.

i benchmarked this with a simple test of ircii ./configure && make, to see
if the additional load/store & arith would cause any noticeable degradation
as the change also converts 32 bit counters to 64 bits. amusingly, the
only trend i saw in this was that for both portions, i see a consistent
(across at least 8 runs) benefit of about 0.8% improvement. ie, the newer
larger code size / counter size code actually runs faster for some reason..
maybe there's a cacheline effect in the size of the code?


XXX the current implementation depends on a couple of things:
XXX - ev_count member of evcnt{} is first and has offset 0
XXX - that sizeof(struct evcnt) equals 32
XXX if these are not true, locore.s has #error's to catch it

branches: 1.56.4;
Remove advertising clause for UCB in various genassym.cf files,
which were derived from genassym.c in 4.4BSD-Lite2 (or 386BSD).
Closes PR misc/39573. Approved by martin@.

branches: 1.55.4;
Remove ref to uvm.page_idle_zero

branches: 1.54.2;
Move TNF licenses to 2 clause form

branches: 1.53.6; 1.53.8; 1.53.10;
cpu_intr_p() for sparc, from Andrew Doran.

branches: 1.52.2; 1.52.8;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

branches: 1.51.10;
merge yamt-idlelwp branch. asked by core@. some ports still needs work.

from doc/BRANCHES:

idle lwp, and some changes depending on it.

1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.

branches: 1.50.4; 1.50.6; 1.50.12;
Export __SIMPLELOCK_LOCKED, __SIMPLELOCK_UNLOCKED.

branches: 1.49.2;
Merge newlock2 to head.

branches: 1.48.20;
merge ktrace-lwp.

add a function pointer to struct cpu_info:
void idlespin(struct cpu_info *)
which is called whenever the CPU is idle and uvm_pageidlezero() has nothing to
do

Hanlde NMI on microSPARC-IIep.

We don't do much useful except reporting, but that's better than to
stupidly use sun4m handler and wedge the machine. May need to revisit
what's fatal.

Prodding by macallan@

- add syscall_{plain,fancy}
- make it use mi_userret

branches: 1.44.12;
`uvmexp.swtch++' is already done in exit1().

Add EV_COUNT.

Add CPUINFO_XMSG_* symbols for use in fast xcall handlers.

branches: 1.41.2; 1.41.4;
Merge the nathanw_sa branch.

Account softintr_common as uvmexp.softs, not uvmexp.intrs.

keep track of which cpu's have run a pmap and only broadcast tlb flushes to
cpu's who have done so. implement pmap_deactivate() for MULTIPROCESSOR and
call it from cpu_switch() when we are about to switch proces and when we
enter idle().

with this change, i see significantly reduced tlb IPI traffic and fork/exec
bound processes -- such as "configure" -- run significantly faster, upto
15%. i also obvserved a small (0-2%) benefit to CPU bound tasks as well.

Add CPUINFO_WANT_RESCHED and CPUINFO_WANT_AST

Add offset for `cpuinfo.ci_tt'.

Remove <sys/map.h>

Remove an unnecessary "if defined(SUN4M)"

branches: 1.34.2;
Drop SUN4_PGSHIFT and SUN4CM_PGSHIFT. They are already known to .S
files from sys/param.h. The problem is that lint stubs are generated
with -C (keep comments) and gcc complains about macro redefinition,
since "assym.h" doesn't have the comments that "sys/param.h" has.

branches: 1.33.4;
Add constants for microSPARC-IIep registers.

branches: 1.32.2; 1.32.8;
add CPUINFO_FLAGS

branches: 1.31.2;
fix bit rot so that MP kernel compiles s/cpu_no/ci_cpuid/

remove include of <vm/vm.h> and <machine/pmap.h>. <vm/vm.h> -> <uvm/uvm_extern.h>

- In the MULTIPROCESSOR case, initialize p_cpu before a process is
marked SONPROC.
- Fix a bug where all cpu_info structures except for the boot CPUs
would exist at both a CPU-local VA (CPUINFO_VA) and a gloal VA;
The boot CPU's existed only a CPUINFO_VA.
- Add a self-reference pointer to the cpu_info that references the
global address in the MULTIPROCESSOR case. Just allow it to reference
the `local' VA in the single-processor case, as CPUINFO_VA is global
enough when there's only one processor to care about. Change curcpu()
to return the global address.

branches: 1.28.2;
First sweep at scheduler state cleanup. Collect MI scheduler
state into global and per-CPU scheduler state:

- Global state: sched_qs (run queues), sched_whichqs (bitmap
of non-empty run queues), sched_slpque (sleep queues).
NOTE: These may collectively move into a struct schedstate
at some point in the future.

- Per-CPU state, struct schedstate_percpu: spc_runtime
(time process on this CPU started running), spc_flags
(replaces struct proc's p_schedflags), and
spc_curpriority (usrpri of processes on this CPU).

- Every platform must now supply a struct cpu_info and
a curcpu() macro. Simplify existing cpu_info declarations
where appropriate.

- All references to per-CPU scheduler state now made through
curcpu(). NOTE: this will likely be adjusted in the future
after further changes to struct proc are made.

Tested on i386 and Alpha. Changes are mostly mechanical, but apologies
in advance if it doesn't compile on a particular platform.

Introduce a new process state distinct from SRUN called SONPROC
which indicates that the process is actually running on a
processor. Test against SONPROC as appropriate rather than
combinations of SRUN and curproc. Update all context switch code
to properly set SONPROC when the process becomes the current
process on the CPU.

Make the audioamd assembler code compile again.

Define offset for uvm.page_idle_zero.

Update FDC offsets used by fdintr.s

Add offset to bus handle in `struct fdio'.

branches: 1.22.2;
Since a context table is now pointing at the correct per-CPU region table
at all times, we can dispense with the hackery that patches the magic entry
at context-switch time.

branches: 1.21.2;
UVM no longer an option.

Use bus_space tags and handles, embedded in MD hooks AM7930_{READ_WRITE}_REG
to handle MD delay and bus padding. Tested on sparc2 by David Brownlee.

Should use regmaps, but that breaks sparc pDMA assembly code.

Use the PROMLIB interface.

Maintain a current process (`curproc') a per CPU.

Drop cpuinfo's `L1_ptps'; instead keep a per CPU segment (level 2) page
table descriptor that is used to patch up a region (level 1) page table
associated with a user pmap at context switch time.

Add offset of `cpuinfo.idle_u'.

Define `sizeof(struct cpu_info)'.

Allocate a private PCB, kernel stack and interrupt stack for each processor.
As a result, the stack setup code in locore.s changes slightly in
the MULTIPROCESSOR case. Also, make the stack redzone barrier (for
debugging only) a per-CPU entity.

Add `intreg' cpuinfo offset.

We no longer need to access memerr() through a function pointer.

Account for changes in struct cpuinfo & locore

Pull in <sys/syscall.h> directly into locore.s

Adapt to cpuvar.h changes.

Sanitize memerr*() a bit.

Assign copyright to TNF.

Add a cpu-specific function to flush a pure virtually-indexed/virtually-tagged
cache, which needs to be flushed at context switch.

Split sparc am7930 driver into sparc attach and "MI" sys/dev/ic/am7930
chipset driver. Needs bus'ifying and register-access.

initial import of the new virtual memory system, UVM, into -current.

UVM was written by chuck cranor <chuck@maria.wustl.edu>, with some
minor portions derived from the old Mach code. i provided some help
getting swap and paging working, and other bug fixes/ideas. chuck
silvers <chuq@chuq.com> also provided some other fixes.

this is the sparc portion.

this will be KNF'd shortly. :-)

Fix up includes.

Accommodate non-VM_PMAP_HACK code.

Added genassym.cf