Cross Reference: /src/sys/arch/arm/xilinx/zynq

Lines Matching defs:regsp
372 	struct zynquart_regs *regsp = &sc->sc_regs;
384 	regsp->ur_iot = iot;
385 	regsp->ur_iobase = iobase;
387 	if (bus_space_map(iot, regsp->ur_iobase, size, 0, &ioh)) {
390 	regsp->ur_ioh = ioh;
403 	if (regsp->ur_iobase == zynquartconsregs.ur_iobase) {
451 	if (regsp->ur_iobase == zynquart_kgdb_regs.ur_iobase) {
1366 	struct zynquart_regs *regsp= &sc->sc_regs;
1378 	UR_WRITE_1(regsp, ZYNQUART_REG_MCR, sc->sc_mcr_active);
1882 zynquart_common_getc(dev_t dev, struct zynquart_regs *regsp)
1886 	bus_space_tag_t iot = regsp->ur_iot;
1887 	bus_space_handle_t ioh = regsp->ur_ioh;
1916 zynquart_common_putc(dev_t dev, struct zynquart_regs *regsp, int c)
1920 	bus_space_tag_t iot = regsp->ur_iot;
1921 	bus_space_handle_t ioh = regsp->ur_ioh;
1942 	ZYNQUART_BARRIER(regsp, BR | BW);
1951 zynquart_init(struct zynquart_regs *regsp, int rate, tcflag_t cflag)
1955 	if (bus_space_map(regsp->ur_iot, regsp->ur_iobase, UART_SIZE, 0,
1956 		&regsp->ur_ioh))
1963 	bus_space_write_4(regsp->ur_iot, regsp->ur_ioh, UART_CHNL_INT_STS, 0xffff);
1964 	bus_space_write_4(regsp->ur_iot, regsp->ur_ioh, UART_CHANNEL_STS, 0xffff);