Lines Matching refs:req
73 struct mcp2221_status_req req;
76 memset(&req, 0, MCP2221_REQ_BUFFER_SIZE);
77 req.cmd = MCP2221_CMD_STATUS;
82 (uint8_t *)&req, MCP2221_REQ_BUFFER_SIZE,
91 umcpmio_set_i2c_speed(struct mcp2221_status_req *req, int flags)
98 req->set_i2c_speed = MCP2221_I2C_SET_SPEED;
106 req->i2c_clock_divider = (MCP2221_INTERNAL_CLOCK / i2cbaud) - 3;
111 struct mcp2221_status_req *req, struct mcp2221_status_res *res,
116 req->cmd = MCP2221_CMD_STATUS;
121 (uint8_t *)req, MCP2221_REQ_BUFFER_SIZE,
134 struct mcp2221_status_req req;
137 memset(&req, 0, MCP2221_REQ_BUFFER_SIZE);
138 umcpmio_set_i2c_speed(&req, flags);
139 err = umcpmio_put_status(sc, &req, &res, takemutex);
152 struct mcp2221_get_sram_req req;
155 memset(&req, 0, MCP2221_REQ_BUFFER_SIZE);
156 req.cmd = MCP2221_CMD_GET_SRAM;
161 (uint8_t *)&req, MCP2221_REQ_BUFFER_SIZE,
171 struct mcp2221_set_sram_req *req, struct mcp2221_set_sram_res *res,
176 req->cmd = MCP2221_CMD_SET_SRAM;
181 (uint8_t *)req, MCP2221_REQ_BUFFER_SIZE,
223 umcpmio_set_gpio_value_sram(struct mcp2221_set_sram_req *req, int pin,
232 alter = &req->alter_gpio_config;
233 newvalue = &req->gp0_settings;
236 alter = &req->alter_gpio_config;
237 newvalue = &req->gp1_settings;
240 alter = &req->alter_gpio_config;
241 newvalue = &req->gp2_settings;
244 alter = &req->alter_gpio_config;
245 newvalue = &req->gp3_settings;
262 umcpmio_set_gpio_dir_sram(struct mcp2221_set_sram_req *req, int pin, int flags)
270 alter = &req->alter_gpio_config;
271 newvalue = &req->gp0_settings;
274 alter = &req->alter_gpio_config;
275 newvalue = &req->gp1_settings;
278 alter = &req->alter_gpio_config;
279 newvalue = &req->gp2_settings;
282 alter = &req->alter_gpio_config;
283 newvalue = &req->gp3_settings;
300 umcpmio_set_gpio_designation_sram(struct mcp2221_set_sram_req *req, int pin,
311 alter = &req->alter_gpio_config;
312 newvalue = &req->gp0_settings;
315 alter = &req->alter_gpio_config;
316 newvalue = &req->gp1_settings;
319 alter = &req->alter_gpio_config;
320 newvalue = &req->gp2_settings;
323 alter = &req->alter_gpio_config;
324 newvalue = &req->gp3_settings;
369 umcpmio_set_gpio_irq_sram(struct mcp2221_set_sram_req *req, int irqmode)
371 req->alter_gpio_config = MCP2221_SRAM_ALTER_GPIO;
374 req->irq_config |= MCP2221_SRAM_ALTER_IRQ |
380 req->irq_config |= MCP2221_SRAM_ALTER_IRQ |
386 if (req->irq_config != 0) {
387 req->gp1_settings = MCP2221_SRAM_PIN_IS_ALT2;
389 req->irq_config = MCP2221_SRAM_ALTER_IRQ |
391 req->gp1_settings = MCP2221_SRAM_PIN_IS_GPIO |
425 umcpmio_set_dac_vref(struct mcp2221_set_sram_req *req, char *newvref)
439 req->dac_voltage_reference |= umcpmio_vref_puts[i].mask |
447 struct mcp2221_set_sram_req req;
451 memset(&req, 0, MCP2221_REQ_BUFFER_SIZE);
452 umcpmio_set_dac_vref(&req, newvref);
453 err = umcpmio_put_sram(sc, &req, &res, takemutex);
459 umcpmio_set_dac_value(struct mcp2221_set_sram_req *req, uint8_t newvalue)
461 req->set_dac_output_value |= (newvalue & MCP2221_SRAM_DAC_VALUE_MASK) |
469 struct mcp2221_set_sram_req req;
473 memset(&req, 0, MCP2221_REQ_BUFFER_SIZE);
474 umcpmio_set_dac_value(&req, newvalue);
475 err = umcpmio_put_sram(sc, &req, &res, takemutex);
481 umcpmio_set_adc_vref(struct mcp2221_set_sram_req *req, char *newvref)
495 req->adc_voltage_reference |= umcpmio_vref_puts[i].mask |
503 struct mcp2221_set_sram_req req;
507 memset(&req, 0, MCP2221_REQ_BUFFER_SIZE);
508 umcpmio_set_adc_vref(&req, newvref);
509 err = umcpmio_put_sram(sc, &req, &res, takemutex);
534 umcpmio_set_gpioclock_dc(struct mcp2221_set_sram_req *req, char *new_dc)
548 req->clock_output_divider |= umcpmio_dc_puts[i].mask;
556 struct mcp2221_set_sram_req req;
564 memset(&req, 0, MCP2221_REQ_BUFFER_SIZE);
565 umcpmio_set_gpioclock_dc(&req, new_dutycycle);
567 " req.clock_output_divider=%02x, current mask=%02x\n",
568 req.clock_output_divider,
571 req.clock_output_divider |=
576 " SET req.clock_output_divider=%02x\n",
577 req.clock_output_divider));
578 err = umcpmio_put_sram(sc, &req, &res, takemutex);
615 umcpmio_set_gpioclock_cd(struct mcp2221_set_sram_req *req, char *new_cd)
629 req->clock_output_divider |= umcpmio_cd_puts[i].mask;
637 struct mcp2221_set_sram_req req;
645 memset(&req, 0, MCP2221_REQ_BUFFER_SIZE);
646 umcpmio_set_gpioclock_cd(&req, new_clockdivider);
648 " req.clock_output_divider=%02x, current mask=%02x\n",
649 req.clock_output_divider,
652 req.clock_output_divider |=
657 " SET req.clock_output_divider=%02x\n",
658 req.clock_output_divider));
659 err = umcpmio_put_sram(sc, &req, &res, takemutex);
668 struct mcp2221_get_gpio_cfg_req req;
671 memset(&req, 0, MCP2221_REQ_BUFFER_SIZE);
672 req.cmd = MCP2221_CMD_GET_GPIO_CFG;
677 (uint8_t *)&req, MCP2221_REQ_BUFFER_SIZE,
687 struct mcp2221_set_gpio_cfg_req *req, struct mcp2221_set_gpio_cfg_res *res,
692 req->cmd = MCP2221_CMD_SET_GPIO_CFG;
697 (uint8_t *)req, MCP2221_REQ_BUFFER_SIZE,
761 umcpmio_set_gpio_value(struct mcp2221_set_gpio_cfg_req *req,
772 alter = &req->alter_gp0_value;
773 newvalue = &req->new_gp0_value;
776 alter = &req->alter_gp1_value;
777 newvalue = &req->new_gp1_value;
780 alter = &req->alter_gp2_value;
781 newvalue = &req->new_gp2_value;
784 alter = &req->alter_gp3_value;
785 newvalue = &req->new_gp3_value;
802 struct mcp2221_set_gpio_cfg_req req;
805 memset(&req, 0, MCP2221_REQ_BUFFER_SIZE);
806 umcpmio_set_gpio_value(&req, pin, value);
807 err = umcpmio_put_gpio_cfg(sc, &req, &res, takemutex);
826 struct mcp2221_get_flash_req req;
829 memset(&req, 0, MCP2221_REQ_BUFFER_SIZE);
830 req.cmd = MCP2221_CMD_GET_FLASH;
836 req.subcode = subcode;
841 (uint8_t *)&req, MCP2221_REQ_BUFFER_SIZE,
850 umcpmio_put_flash(struct umcpmio_softc *sc, struct mcp2221_put_flash_req *req,
855 req->cmd = MCP2221_CMD_SET_FLASH;
857 if (req->subcode < MCP2221_FLASH_SUBCODE_CS ||
858 req->subcode > MCP2221_FLASH_SUBCODE_CHIPSN) {
861 req->subcode));
868 (uint8_t *)req, MCP2221_REQ_BUFFER_SIZE,
Indexes created Sat Nov 01 21:09:44 GMT 2025