Lines Matching refs:pTileInfo
685 AddrDccIn->tileInfo = *AddrSurfInfoOut->pTileInfo;
727 AddrDccIn->tileInfo = *AddrSurfInfoOut->pTileInfo;
764 AddrHtileIn->pTileInfo = AddrSurfInfoOut->pTileInfo;
847 surf->u.legacy.pipe_config = csio->pTileInfo->pipeConfig - 1;
852 surf->u.legacy.bankw = csio->pTileInfo->bankWidth;
853 surf->u.legacy.bankh = csio->pTileInfo->bankHeight;
854 surf->u.legacy.mtilea = csio->pTileInfo->macroAspectRatio;
855 surf->u.legacy.tile_split = csio->pTileInfo->tileSplitBytes;
856 surf->u.legacy.num_banks = csio->pTileInfo->banks;
877 AddrBaseSwizzleIn.pTileInfo = csio->pTileInfo;
980 AddrSurfInfoOut.pTileInfo = &AddrTileInfoOut;
1120 AddrSurfInfoIn.pTileInfo = &AddrTileInfoIn;
1122 /* If AddrSurfInfoIn.pTileInfo is set, Addrlib doesn't set
1209 /* This will be ignored if AddrSurfInfoIn.pTileInfo is NULL. */
1235 surf->u.legacy.stencil_tile_split = AddrSurfInfoOut.pTileInfo->tileSplitBytes;
1258 fout.pTileInfo = &fmask_tile_info;
1274 surf->u.legacy.color.fmask.bankh = fout.pTileInfo->bankHeight;
1289 xin.pTileInfo = fout.pTileInfo;