Lines Matching refs:name

5     {"name": "ARRAY_LINEAR_GENERAL", "value": 0},
6     {"name": "ARRAY_LINEAR_ALIGNED", "value": 1},
7     {"name": "ARRAY_1D_TILED_THIN1", "value": 2},
8     {"name": "ARRAY_1D_TILED_THICK", "value": 3},
9     {"name": "ARRAY_2D_TILED_THIN1", "value": 4},
10     {"name": "ARRAY_PRT_TILED_THIN1", "value": 5},
11     {"name": "ARRAY_PRT_2D_TILED_THIN1", "value": 6},
12     {"name": "ARRAY_2D_TILED_THICK", "value": 7},
13     {"name": "ARRAY_2D_TILED_XTHICK", "value": 8},
14     {"name": "ARRAY_PRT_TILED_THICK", "value": 9},
15     {"name": "ARRAY_PRT_2D_TILED_THICK", "value": 10},
16     {"name": "ARRAY_PRT_3D_TILED_THIN1", "value": 11},
17     {"name": "ARRAY_3D_TILED_THIN1", "value": 12},
18     {"name": "ARRAY_3D_TILED_THICK", "value": 13},
19     {"name": "ARRAY_3D_TILED_XTHICK", "value": 14},
20     {"name": "ARRAY_PRT_3D_TILED_THICK", "value": 15}
25     {"name": "BUF_DATA_FORMAT_INVALID", "value": 0},
26     {"name": "BUF_DATA_FORMAT_8", "value": 1},
27     {"name": "BUF_DATA_FORMAT_16", "value": 2},
28     {"name": "BUF_DATA_FORMAT_8_8", "value": 3},
29     {"name": "BUF_DATA_FORMAT_32", "value": 4},
30     {"name": "BUF_DATA_FORMAT_16_16", "value": 5},
31     {"name": "BUF_DATA_FORMAT_10_11_11", "value": 6},
32     {"name": "BUF_DATA_FORMAT_11_11_10", "value": 7},
33     {"name": "BUF_DATA_FORMAT_10_10_10_2", "value": 8},
34     {"name": "BUF_DATA_FORMAT_2_10_10_10", "value": 9},
35     {"name": "BUF_DATA_FORMAT_8_8_8_8", "value": 10},
36     {"name": "BUF_DATA_FORMAT_32_32", "value": 11},
37     {"name": "BUF_DATA_FORMAT_16_16_16_16", "value": 12},
38     {"name": "BUF_DATA_FORMAT_32_32_32", "value": 13},
39     {"name": "BUF_DATA_FORMAT_32_32_32_32", "value": 14},
40     {"name": "BUF_DATA_FORMAT_RESERVED_15", "value": 15}
45     {"name": "BUF_NUM_FORMAT_UNORM", "value": 0},
46     {"name": "BUF_NUM_FORMAT_SNORM", "value": 1},
47     {"name": "BUF_NUM_FORMAT_USCALED", "value": 2},
48     {"name": "BUF_NUM_FORMAT_SSCALED", "value": 3},
49     {"name": "BUF_NUM_FORMAT_UINT", "value": 4},
50     {"name": "BUF_NUM_FORMAT_SINT", "value": 5},
51     {"name": "BUF_NUM_FORMAT_SNORM_OGL", "value": 6},
52     {"name": "BUF_NUM_FORMAT_FLOAT", "value": 7}
57     {"name": "ADDR_SURF_BANK_HEIGHT_1", "value": 0},
58     {"name": "ADDR_SURF_BANK_HEIGHT_2", "value": 1},
59     {"name": "ADDR_SURF_BANK_HEIGHT_4", "value": 2},
60     {"name": "ADDR_SURF_BANK_HEIGHT_8", "value": 3}
65     {"name": "ADDR_SURF_BANK_WIDTH_1", "value": 0},
66     {"name": "ADDR_SURF_BANK_WIDTH_2", "value": 1},
67     {"name": "ADDR_SURF_BANK_WIDTH_4", "value": 2},
68     {"name": "ADDR_SURF_BANK_WIDTH_8", "value": 3}
73     {"name": "BLEND_ZERO", "value": 0},
74     {"name": "BLEND_ONE", "value": 1},
75     {"name": "BLEND_SRC_COLOR", "value": 2},
76     {"name": "BLEND_ONE_MINUS_SRC_COLOR", "value": 3},
77     {"name": "BLEND_SRC_ALPHA", "value": 4},
78     {"name": "BLEND_ONE_MINUS_SRC_ALPHA", "value": 5},
79     {"name": "BLEND_DST_ALPHA", "value": 6},
80     {"name": "BLEND_ONE_MINUS_DST_ALPHA", "value": 7},
81     {"name": "BLEND_DST_COLOR", "value": 8},
82     {"name": "BLEND_ONE_MINUS_DST_COLOR", "value": 9},
83     {"name": "BLEND_SRC_ALPHA_SATURATE", "value": 10},
84     {"name": "BLEND_BOTH_SRC_ALPHA", "value": 11},
85     {"name": "BLEND_BOTH_INV_SRC_ALPHA", "value": 12},
86     {"name": "BLEND_CONSTANT_COLOR", "value": 13},
87     {"name": "BLEND_ONE_MINUS_CONSTANT_COLOR", "value": 14},
88     {"name": "BLEND_SRC1_COLOR", "value": 15},
89     {"name": "BLEND_INV_SRC1_COLOR", "value": 16},
90     {"name": "BLEND_SRC1_ALPHA", "value": 17},
91     {"name": "BLEND_INV_SRC1_ALPHA", "value": 18},
92     {"name": "BLEND_CONSTANT_ALPHA", "value": 19},
93     {"name": "BLEND_ONE_MINUS_CONSTANT_ALPHA", "value": 20}
98     {"name": "FORCE_OPT_AUTO", "value": 0},
99     {"name": "FORCE_OPT_DISABLE", "value": 1},
100     {"name": "FORCE_OPT_ENABLE_IF_SRC_A_0", "value": 2},
101     {"name": "FORCE_OPT_ENABLE_IF_SRC_RGB_0", "value": 3},
102     {"name": "FORCE_OPT_ENABLE_IF_SRC_ARGB_0", "value": 4},
103     {"name": "FORCE_OPT_ENABLE_IF_SRC_A_1", "value": 5},
104     {"name": "FORCE_OPT_ENABLE_IF_SRC_RGB_1", "value": 6},
105     {"name": "FORCE_OPT_ENABLE_IF_SRC_ARGB_1", "value": 7}
110     {"name": "CB_DISABLE", "value": 0},
111     {"name": "CB_NORMAL", "value": 1},
112     {"name": "CB_ELIMINATE_FAST_CLEAR", "value": 2},
113     {"name": "CB_RESOLVE", "value": 3},
114     {"name": "CB_DECOMPRESS", "value": 4},
115     {"name": "CB_FMASK_DECOMPRESS", "value": 5}
120     {"name": "CB_PERF_CLEAR_FILTER_SEL_NONCLEAR", "value": 0},
121     {"name": "CB_PERF_CLEAR_FILTER_SEL_CLEAR", "value": 1}
126     {"name": "CB_PERF_OP_FILTER_SEL_WRITE_ONLY", "value": 0},
127     {"name": "CB_PERF_OP_FILTER_SEL_NEEDS_DESTINATION", "value": 1},
128     {"name": "CB_PERF_OP_FILTER_SEL_RESOLVE", "value": 2},
129     {"name": "CB_PERF_OP_FILTER_SEL_DECOMPRESS", "value": 3},
130     {"name": "CB_PERF_OP_FILTER_SEL_FMASK_DECOMPRESS", "value": 4},
131     {"name": "CB_PERF_OP_FILTER_SEL_ELIMINATE_FAST_CLEAR", "value": 5}
136     {"name": "OUT", "value": 1},
137     {"name": "IN_0", "value": 2},
138     {"name": "IN_1", "value": 4},
139     {"name": "IN_10", "value": 8},
140     {"name": "IN_2", "value": 16},
141     {"name": "IN_20", "value": 32},
142     {"name": "IN_21", "value": 64},
143     {"name": "IN_210", "value": 128},
144     {"name": "IN_3", "value": 256},
145     {"name": "IN_30", "value": 512},
146     {"name": "IN_31", "value": 1024},
147     {"name": "IN_310", "value": 2048},
148     {"name": "IN_32", "value": 4096},
149     {"name": "IN_320", "value": 8192},
150     {"name": "IN_321", "value": 16384},
151     {"name": "IN_3210", "value": 32768}
156     {"name": "CP_PERFMON_ENABLE_MODE_ALWAYS_COUNT", "value": 0},
157     {"name": "CP_PERFMON_ENABLE_MODE_RESERVED_1", "value": 1},
158     {"name": "CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_TRUE", "value": 2},
159     {"name": "CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_FALSE", "value": 3}
164     {"name": "CP_PERFMON_STATE_DISABLE_AND_RESET", "value": 0},
165     {"name": "CP_PERFMON_STATE_START_COUNTING", "value": 1},
166     {"name": "CP_PERFMON_STATE_STOP_COUNTING", "value": 2},
167     {"name": "CP_PERFMON_STATE_RESERVED_3", "value": 3},
168     {"name": "CP_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM", "value": 4},
169     {"name": "CP_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM", "value": 5}
174     {"name": "COLOR_INVALID", "value": 0},
175     {"name": "COLOR_8", "value": 1},
176     {"name": "COLOR_16", "value": 2},
177     {"name": "COLOR_8_8", "value": 3},
178     {"name": "COLOR_32", "value": 4},
179     {"name": "COLOR_16_16", "value": 5},
180     {"name": "COLOR_10_11_11", "value": 6},
181     {"name": "COLOR_11_11_10", "value": 7},
182     {"name": "COLOR_10_10_10_2", "value": 8},
183     {"name": "COLOR_2_10_10_10", "value": 9},
184     {"name": "COLOR_8_8_8_8", "value": 10},
185     {"name": "COLOR_32_32", "value": 11},
186     {"name": "COLOR_16_16_16_16", "value": 12},
187     {"name": "COLOR_RESERVED_13", "value": 13},
188     {"name": "COLOR_32_32_32_32", "value": 14},
189     {"name": "COLOR_RESERVED_15", "value": 15},
190     {"name": "COLOR_5_6_5", "value": 16},
191     {"name": "COLOR_1_5_5_5", "value": 17},
192     {"name": "COLOR_5_5_5_1", "value": 18},
193     {"name": "COLOR_4_4_4_4", "value": 19},
194     {"name": "COLOR_8_24", "value": 20},
195     {"name": "COLOR_24_8", "value": 21},
196     {"name": "COLOR_X24_8_32_FLOAT", "value": 22},
197     {"name": "COLOR_RESERVED_23", "value": 23}
202     {"name": "COMB_DST_PLUS_SRC", "value": 0},
203     {"name": "COMB_SRC_MINUS_DST", "value": 1},
204     {"name": "COMB_MIN_DST_SRC", "value": 2},
205     {"name": "COMB_MAX_DST_SRC", "value": 3},
206     {"name": "COMB_DST_MINUS_SRC", "value": 4}
211     {"name": "FRAG_NEVER", "value": 0},
212     {"name": "FRAG_LESS", "value": 1},
213     {"name": "FRAG_EQUAL", "value": 2},
214     {"name": "FRAG_LEQUAL", "value": 3},
215     {"name": "FRAG_GREATER", "value": 4},
216     {"name": "FRAG_NOTEQUAL", "value": 5},
217     {"name": "FRAG_GEQUAL", "value": 6},
218     {"name": "FRAG_ALWAYS", "value": 7}
223     {"name": "EXPORT_ANY_Z", "value": 0},
224     {"name": "EXPORT_LESS_THAN_Z", "value": 1},
225     {"name": "EXPORT_GREATER_THAN_Z", "value": 2},
226     {"name": "EXPORT_RESERVED", "value": 3}
231     {"name": "PSLC_AUTO", "value": 0},
232     {"name": "PSLC_ON_HANG_ONLY", "value": 1},
233     {"name": "PSLC_ASAP", "value": 2},
234     {"name": "PSLC_COUNTDOWN", "value": 3}
239     {"name": "INVALID", "value": 1},
240     {"name": "INPUT_DENORMAL", "value": 2},
241     {"name": "DIVIDE_BY_ZERO", "value": 4},
242     {"name": "OVERFLOW", "value": 8},
243     {"name": "UNDERFLOW", "value": 16},
244     {"name": "INEXACT", "value": 32},
245     {"name": "INT_DIVIDE_BY_ZERO", "value": 64},
246     {"name": "ADDRESS_WATCH", "value": 128},
247     {"name": "MEMORY_VIOLATION", "value": 256}
252     {"name": "FP_32_DENORMS", "value": 48},
253     {"name": "FP_64_DENORMS", "value": 192},
254     {"name": "FP_ALL_DENORMS", "value": 240}
259     {"name": "FORCE_OFF", "value": 0},
260     {"name": "FORCE_ENABLE", "value": 1},
261     {"name": "FORCE_DISABLE", "value": 2},
262     {"name": "FORCE_RESERVED", "value": 3}
267     {"name": "IMG_DATA_FORMAT_INVALID", "value": 0},
268     {"name": "IMG_DATA_FORMAT_8", "value": 1},
269     {"name": "IMG_DATA_FORMAT_16", "value": 2},
270     {"name": "IMG_DATA_FORMAT_8_8", "value": 3},
271     {"name": "IMG_DATA_FORMAT_32", "value": 4},
272     {"name": "IMG_DATA_FORMAT_16_16", "value": 5},
273     {"name": "IMG_DATA_FORMAT_10_11_11", "value": 6},
274     {"name": "IMG_DATA_FORMAT_11_11_10", "value": 7},
275     {"name": "IMG_DATA_FORMAT_10_10_10_2", "value": 8},
276     {"name": "IMG_DATA_FORMAT_2_10_10_10", "value": 9},
277     {"name": "IMG_DATA_FORMAT_8_8_8_8", "value": 10},
278     {"name": "IMG_DATA_FORMAT_32_32", "value": 11},
279     {"name": "IMG_DATA_FORMAT_16_16_16_16", "value": 12},
280     {"name": "IMG_DATA_FORMAT_32_32_32", "value": 13},
281     {"name": "IMG_DATA_FORMAT_32_32_32_32", "value": 14},
282     {"name": "IMG_DATA_FORMAT_RESERVED_15", "value": 15},
283     {"name": "IMG_DATA_FORMAT_5_6_5", "value": 16},
284     {"name": "IMG_DATA_FORMAT_1_5_5_5", "value": 17},
285     {"name": "IMG_DATA_FORMAT_5_5_5_1", "value": 18},
286     {"name": "IMG_DATA_FORMAT_4_4_4_4", "value": 19},
287     {"name": "IMG_DATA_FORMAT_8_24", "value": 20},
288     {"name": "IMG_DATA_FORMAT_24_8", "value": 21},
289     {"name": "IMG_DATA_FORMAT_X24_8_32", "value": 22},
290     {"name": "IMG_DATA_FORMAT_RESERVED_23", "value": 23},
291     {"name": "IMG_DATA_FORMAT_RESERVED_24", "value": 24},
292     {"name": "IMG_DATA_FORMAT_RESERVED_25", "value": 25},
293     {"name": "IMG_DATA_FORMAT_RESERVED_26", "value": 26},
294     {"name": "IMG_DATA_FORMAT_RESERVED_27", "value": 27},
295     {"name": "IMG_DATA_FORMAT_RESERVED_28", "value": 28},
296     {"name": "IMG_DATA_FORMAT_RESERVED_29", "value": 29},
297     {"name": "IMG_DATA_FORMAT_RESERVED_30", "value": 30},
298     {"name": "IMG_DATA_FORMAT_RESERVED_31", "value": 31},
299     {"name": "IMG_DATA_FORMAT_GB_GR", "value": 32},
300     {"name": "IMG_DATA_FORMAT_BG_RG", "value": 33},
301     {"name": "IMG_DATA_FORMAT_5_9_9_9", "value": 34},
302     {"name": "IMG_DATA_FORMAT_BC1", "value": 35},
303     {"name": "IMG_DATA_FORMAT_BC2", "value": 36},
304     {"name": "IMG_DATA_FORMAT_BC3", "value": 37},
305     {"name": "IMG_DATA_FORMAT_BC4", "value": 38},
306     {"name": "IMG_DATA_FORMAT_BC5", "value": 39},
307     {"name": "IMG_DATA_FORMAT_BC6", "value": 40},
308     {"name": "IMG_DATA_FORMAT_BC7", "value": 41},
309     {"name": "IMG_DATA_FORMAT_RESERVED_42", "value": 42},
310     {"name": "IMG_DATA_FORMAT_RESERVED_43", "value": 43},
311     {"name": "IMG_DATA_FORMAT_FMASK8_S2_F1", "value": 44},
312     {"name": "IMG_DATA_FORMAT_FMASK8_S4_F1", "value": 45},
313     {"name": "IMG_DATA_FORMAT_FMASK8_S8_F1", "value": 46},
314     {"name": "IMG_DATA_FORMAT_FMASK8_S2_F2", "value": 47},
315     {"name": "IMG_DATA_FORMAT_FMASK8_S4_F2", "value": 48},
316     {"name": "IMG_DATA_FORMAT_FMASK8_S4_F4", "value": 49},
317     {"name": "IMG_DATA_FORMAT_FMASK16_S16_F1", "value": 50},
318     {"name": "IMG_DATA_FORMAT_FMASK16_S8_F2", "value": 51},
319     {"name": "IMG_DATA_FORMAT_FMASK32_S16_F2", "value": 52},
320     {"name": "IMG_DATA_FORMAT_FMASK32_S8_F4", "value": 53},
321     {"name": "IMG_DATA_FORMAT_FMASK32_S8_F8", "value": 54},
322     {"name": "IMG_DATA_FORMAT_FMASK64_S16_F4", "value": 55},
323     {"name": "IMG_DATA_FORMAT_FMASK64_S16_F8", "value": 56},
324     {"name": "IMG_DATA_FORMAT_4_4", "value": 57},
325     {"name": "IMG_DATA_FORMAT_6_5_5", "value": 58},
326     {"name": "IMG_DATA_FORMAT_1", "value": 59},
327     {"name": "IMG_DATA_FORMAT_1_REVERSED", "value": 60},
328     {"name": "IMG_DATA_FORMAT_32_AS_8", "value": 61},
329     {"name": "IMG_DATA_FORMAT_32_AS_8_8", "value": 62},
330     {"name": "IMG_DATA_FORMAT_32_AS_32_32_32_32", "value": 63}
335     {"name": "IMG_NUM_FORMAT_UNORM", "value": 0},
336     {"name": "IMG_NUM_FORMAT_SNORM", "value": 1},
337     {"name": "IMG_NUM_FORMAT_USCALED", "value": 2},
338     {"name": "IMG_NUM_FORMAT_SSCALED", "value": 3},
339     {"name": "IMG_NUM_FORMAT_UINT", "value": 4},
340     {"name": "IMG_NUM_FORMAT_SINT", "value": 5},
341     {"name": "IMG_NUM_FORMAT_SNORM_OGL", "value": 6},
342     {"name": "IMG_NUM_FORMAT_FLOAT", "value": 7},
343     {"name": "IMG_NUM_FORMAT_RESERVED_8", "value": 8},
344     {"name": "IMG_NUM_FORMAT_SRGB", "value": 9},
345     {"name": "IMG_NUM_FORMAT_UBNORM", "value": 10},
346     {"name": "IMG_NUM_FORMAT_UBNORM_OGL", "value": 11},
347     {"name": "IMG_NUM_FORMAT_UBINT", "value": 12},
348     {"name": "IMG_NUM_FORMAT_UBSCALED", "value": 13},
349     {"name": "IMG_NUM_FORMAT_RESERVED_14", "value": 14},
350     {"name": "IMG_NUM_FORMAT_RESERVED_15", "value": 15}
355     {"name": "ADDR_SURF_MACRO_ASPECT_1", "value": 0},
356     {"name": "ADDR_SURF_MACRO_ASPECT_2", "value": 1},
357     {"name": "ADDR_SURF_MACRO_ASPECT_4", "value": 2},
358     {"name": "ADDR_SURF_MACRO_ASPECT_8", "value": 3}
363     {"name": "ADDR_SURF_DISPLAY_MICRO_TILING", "value": 0},
364     {"name": "ADDR_SURF_THIN_MICRO_TILING", "value": 1},
365     {"name": "ADDR_SURF_DEPTH_MICRO_TILING", "value": 2},
366     {"name": "ADDR_SURF_ROTATED_MICRO_TILING", "value": 3},
367     {"name": "ADDR_SURF_THICK_MICRO_TILING", "value": 4}
372     {"name": "ADDR_SURF_2_BANK", "value": 0},
373     {"name": "ADDR_SURF_4_BANK", "value": 1},
374     {"name": "ADDR_SURF_8_BANK", "value": 2},
375     {"name": "ADDR_SURF_16_BANK", "value": 3}
380     {"name": "X_DRAW_POINTS", "value": 0},
381     {"name": "X_DRAW_LINES", "value": 1},
382     {"name": "X_DRAW_TRIANGLES", "value": 2}
387     {"name": "X_DISABLE_POLY_MODE", "value": 0},
388     {"name": "X_DUAL_MODE", "value": 1}
393     {"name": "X_TRUNCATE", "value": 0},
394     {"name": "X_ROUND", "value": 1},
395     {"name": "X_ROUND_TO_EVEN", "value": 2},
396     {"name": "X_ROUND_TO_ODD", "value": 3}
401     {"name": "ADDR_SURF_P2", "value": 0},
402     {"name": "ADDR_SURF_P2_RESERVED0", "value": 1},
403     {"name": "ADDR_SURF_P2_RESERVED1", "value": 2},
404     {"name": "ADDR_SURF_P2_RESERVED2", "value": 3},
405     {"name": "ADDR_SURF_P4_8x16", "value": 4},
406     {"name": "ADDR_SURF_P4_16x16", "value": 5},
407     {"name": "ADDR_SURF_P4_16x32", "value": 6},
408     {"name": "ADDR_SURF_P4_32x32", "value": 7},
409     {"name": "ADDR_SURF_P8_16x16_8x16", "value": 8},
410     {"name": "ADDR_SURF_P8_16x32_8x16", "value": 9},
411     {"name": "ADDR_SURF_P8_32x32_8x16", "value": 10},
412     {"name": "ADDR_SURF_P8_16x32_16x16", "value": 11},
413     {"name": "ADDR_SURF_P8_32x32_16x16", "value": 12},
414     {"name": "ADDR_SURF_P8_32x32_16x32", "value": 13},
415     {"name": "ADDR_SURF_P8_32x64_32x32", "value": 14},
416     {"name": "ADDR_SURF_P8_RESERVED0", "value": 15},
417     {"name": "ADDR_SURF_P16_32x32_8x16", "value": 16},
418     {"name": "ADDR_SURF_P16_32x32_16x16", "value": 17}
423     {"name": "RASTER_CONFIG_PKR_MAP_0", "value": 0},
424     {"name": "RASTER_CONFIG_PKR_MAP_1", "value": 1},
425     {"name": "RASTER_CONFIG_PKR_MAP_2", "value": 2},
426     {"name": "RASTER_CONFIG_PKR_MAP_3", "value": 3}
431     {"name": "RASTER_CONFIG_PKR_XSEL_0", "value": 0},
432     {"name": "RASTER_CONFIG_PKR_XSEL_1", "value": 1},
433     {"name": "RASTER_CONFIG_PKR_XSEL_2", "value": 2},
434     {"name": "RASTER_CONFIG_PKR_XSEL_3", "value": 3}
439     {"name": "RASTER_CONFIG_PKR_XSEL2_0", "value": 0},
440     {"name": "RASTER_CONFIG_PKR_XSEL2_1", "value": 1},
441     {"name": "RASTER_CONFIG_PKR_XSEL2_2", "value": 2},
442     {"name": "RASTER_CONFIG_PKR_XSEL2_3", "value": 3}
447     {"name": "RASTER_CONFIG_PKR_YSEL_0", "value": 0},
448     {"name": "RASTER_CONFIG_PKR_YSEL_1", "value": 1},
449     {"name": "RASTER_CONFIG_PKR_YSEL_2", "value": 2},
450     {"name": "RASTER_CONFIG_PKR_YSEL_3", "value": 3}
455     {"name": "X_16_8_FIXED_POINT_1_16TH", "value": 0},
456     {"name": "X_16_8_FIXED_POINT_1_8TH", "value": 1},
457     {"name": "X_16_8_FIXED_POINT_1_4TH", "value": 2},
458     {"name": "X_16_8_FIXED_POINT_1_2", "value": 3},
459     {"name": "X_16_8_FIXED_POINT_1", "value": 4},
460     {"name": "X_16_8_FIXED_POINT_1_256TH", "value": 5},
461     {"name": "X_14_10_FIXED_POINT_1_1024TH", "value": 6},
462     {"name": "X_12_12_FIXED_POINT_1_4096TH", "value": 7}
467     {"name": "ROP3_CLEAR", "value": 0},
468     {"name": "X_0X05", "value": 5},
469     {"name": "X_0X0A", "value": 10},
470     {"name": "X_0X0F", "value": 15},
471     {"name": "ROP3_NOR", "value": 17},
472     {"name": "ROP3_AND_INVERTED", "value": 34},
473     {"name": "ROP3_COPY_INVERTED", "value": 51},
474     {"name": "ROP3_AND_REVERSE", "value": 68},
475     {"name": "X_0X50", "value": 80},
476     {"name": "ROP3_INVERT", "value": 85},
477     {"name": "X_0X5A", "value": 90},
478     {"name": "X_0X5F", "value": 95},
479     {"name": "ROP3_XOR", "value": 102},
480     {"name": "ROP3_NAND", "value": 119},
481     {"name": "ROP3_AND", "value": 136},
482     {"name": "ROP3_EQUIVALENT", "value": 153},
483     {"name": "X_0XA0", "value": 160},
484     {"name": "X_0XA5", "value": 165},
485     {"name": "ROP3_NO_OP", "value": 170},
486     {"name": "X_0XAF", "value": 175},
487     {"name": "ROP3_OR_INVERTED", "value": 187},
488     {"name": "ROP3_COPY", "value": 204},
489     {"name": "ROP3_OR_REVERSE", "value": 221},
490     {"name": "ROP3_OR", "value": 238},
491     {"name": "X_0XF0", "value": 240},
492     {"name": "X_0XF5", "value": 245},
493     {"name": "X_0XFA", "value": 250},
494     {"name": "ROP3_SET", "value": 255}
499     {"name": "RASTER_CONFIG_RB_MAP_0", "value": 0},
500     {"name": "RASTER_CONFIG_RB_MAP_1", "value": 1},
501     {"name": "RASTER_CONFIG_RB_MAP_2", "value": 2},
502     {"name": "RASTER_CONFIG_RB_MAP_3", "value": 3}
507     {"name": "RASTER_CONFIG_RB_XSEL_0", "value": 0},
508     {"name": "RASTER_CONFIG_RB_XSEL_1", "value": 1}
513     {"name": "RASTER_CONFIG_RB_XSEL2_0", "value": 0},
514     {"name": "RASTER_CONFIG_RB_XSEL2_1", "value": 1},
515     {"name": "RASTER_CONFIG_RB_XSEL2_2", "value": 2},
516     {"name": "RASTER_CONFIG_RB_XSEL2_3", "value": 3}
521     {"name": "RASTER_CONFIG_RB_YSEL_0", "value": 0},
522     {"name": "RASTER_CONFIG_RB_YSEL_1", "value": 1}
527     {"name": "SPI_PNT_SPRITE_SEL_0", "value": 0},
528     {"name": "SPI_PNT_SPRITE_SEL_1", "value": 1},
529     {"name": "SPI_PNT_SPRITE_SEL_S", "value": 2},
530     {"name": "SPI_PNT_SPRITE_SEL_T", "value": 3},
531     {"name": "SPI_PNT_SPRITE_SEL_NONE", "value": 4}
536     {"name": "SPI_SHADER_ZERO", "value": 0},
537     {"name": "SPI_SHADER_32_R", "value": 1},
538     {"name": "SPI_SHADER_32_GR", "value": 2},
539     {"name": "SPI_SHADER_32_AR", "value": 3},
540     {"name": "SPI_SHADER_FP16_ABGR", "value": 4},
541     {"name": "SPI_SHADER_UNORM16_ABGR", "value": 5},
542     {"name": "SPI_SHADER_SNORM16_ABGR", "value": 6},
543     {"name": "SPI_SHADER_UINT16_ABGR", "value": 7},
544     {"name": "SPI_SHADER_SINT16_ABGR", "value": 8},
545     {"name": "SPI_SHADER_32_ABGR", "value": 9}
550     {"name": "SPI_SHADER_NONE", "value": 0},
551     {"name": "SPI_SHADER_1COMP", "value": 1},
552     {"name": "SPI_SHADER_2COMP", "value": 2},
553     {"name": "SPI_SHADER_4COMPRESS", "value": 3},
554     {"name": "SPI_SHADER_4COMP", "value": 4}
559     {"name": "STRM_PERFMON_STATE_DISABLE_AND_RESET", "value": 0},
560     {"name": "STRM_PERFMON_STATE_START_COUNTING", "value": 1},
561     {"name": "STRM_PERFMON_STATE_STOP_COUNTING", "value": 2},
562     {"name": "STRM_PERFMON_STATE_RESERVED_3", "value": 3},
563     {"name": "STRM_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM", "value": 4},
564     {"name": "STRM_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM", "value": 5}
569     {"name": "SQ_IMG_FILTER_MODE_BLEND", "value": 0},
570     {"name": "SQ_IMG_FILTER_MODE_MIN", "value": 1},
571     {"name": "SQ_IMG_FILTER_MODE_MAX", "value": 2}
576     {"name": "SQ_RSRC_BUF", "value": 0},
577     {"name": "SQ_RSRC_BUF_RSVD_1", "value": 1},
578     {"name": "SQ_RSRC_BUF_RSVD_2", "value": 2},
579     {"name": "SQ_RSRC_BUF_RSVD_3", "value": 3}
584     {"name": "SQ_RSRC_IMG_RSVD_0", "value": 0},
585     {"name": "SQ_RSRC_IMG_RSVD_1", "value": 1},
586     {"name": "SQ_RSRC_IMG_RSVD_2", "value": 2},
587     {"name": "SQ_RSRC_IMG_RSVD_3", "value": 3},
588     {"name": "SQ_RSRC_IMG_RSVD_4", "value": 4},
589     {"name": "SQ_RSRC_IMG_RSVD_5", "value": 5},
590     {"name": "SQ_RSRC_IMG_RSVD_6", "value": 6},
591     {"name": "SQ_RSRC_IMG_RSVD_7", "value": 7},
592     {"name": "SQ_RSRC_IMG_1D", "value": 8},
593     {"name": "SQ_RSRC_IMG_2D", "value": 9},
594     {"name": "SQ_RSRC_IMG_3D", "value": 10},
595     {"name": "SQ_RSRC_IMG_CUBE", "value": 11},
596     {"name": "SQ_RSRC_IMG_1D_ARRAY", "value": 12},
597     {"name": "SQ_RSRC_IMG_2D_ARRAY", "value": 13},
598     {"name": "SQ_RSRC_IMG_2D_MSAA", "value": 14},
599     {"name": "SQ_RSRC_IMG_2D_MSAA_ARRAY", "value": 15}
604     {"name": "SQ_SEL_0", "value": 0},
605     {"name": "SQ_SEL_1", "value": 1},
606     {"name": "SQ_SEL_RESERVED_0", "value": 2},
607     {"name": "SQ_SEL_RESERVED_1", "value": 3},
608     {"name": "SQ_SEL_X", "value": 4},
609     {"name": "SQ_SEL_Y", "value": 5},
610     {"name": "SQ_SEL_Z", "value": 6},
611     {"name": "SQ_SEL_W", "value": 7}
616     {"name": "SQ_TEX_BORDER_COLOR_TRANS_BLACK", "value": 0},
617     {"name": "SQ_TEX_BORDER_COLOR_OPAQUE_BLACK", "value": 1},
618     {"name": "SQ_TEX_BORDER_COLOR_OPAQUE_WHITE", "value": 2},
619     {"name": "SQ_TEX_BORDER_COLOR_REGISTER", "value": 3}
624     {"name": "SQ_TEX_WRAP", "value": 0},
625     {"name": "SQ_TEX_MIRROR", "value": 1},
626     {"name": "SQ_TEX_CLAMP_LAST_TEXEL", "value": 2},
627     {"name": "SQ_TEX_MIRROR_ONCE_LAST_TEXEL", "value": 3},
628     {"name": "SQ_TEX_CLAMP_HALF_BORDER", "value": 4},
629     {"name": "SQ_TEX_MIRROR_ONCE_HALF_BORDER", "value": 5},
630     {"name": "SQ_TEX_CLAMP_BORDER", "value": 6},
631     {"name": "SQ_TEX_MIRROR_ONCE_BORDER", "value": 7}
636     {"name": "SQ_TEX_DEPTH_COMPARE_NEVER", "value": 0},
637     {"name": "SQ_TEX_DEPTH_COMPARE_LESS", "value": 1},
638     {"name": "SQ_TEX_DEPTH_COMPARE_EQUAL", "value": 2},
639     {"name": "SQ_TEX_DEPTH_COMPARE_LESSEQUAL", "value": 3},
640     {"name": "SQ_TEX_DEPTH_COMPARE_GREATER", "value": 4},
641     {"name": "SQ_TEX_DEPTH_COMPARE_NOTEQUAL", "value": 5},
642     {"name": "SQ_TEX_DEPTH_COMPARE_GREATEREQUAL", "value": 6},
643     {"name": "SQ_TEX_DEPTH_COMPARE_ALWAYS", "value": 7}
648     {"name": "SQ_TEX_MIP_FILTER_NONE", "value": 0},
649     {"name": "SQ_TEX_MIP_FILTER_POINT", "value": 1},
650     {"name": "SQ_TEX_MIP_FILTER_LINEAR", "value": 2}
655     {"name": "SQ_TEX_XY_FILTER_POINT", "value": 0},
656     {"name": "SQ_TEX_XY_FILTER_BILINEAR", "value": 1},
657     {"name": "SQ_TEX_XY_FILTER_ANISO_POINT", "value": 2},
658     {"name": "SQ_TEX_XY_FILTER_ANISO_BILINEAR", "value": 3}
663     {"name": "SQ_TEX_Z_FILTER_NONE", "value": 0},
664     {"name": "SQ_TEX_Z_FILTER_POINT", "value": 1},
665     {"name": "SQ_TEX_Z_FILTER_LINEAR", "value": 2}
670     {"name": "RASTER_CONFIG_SC_MAP_0", "value": 0},
671     {"name": "RASTER_CONFIG_SC_MAP_1", "value": 1},
672     {"name": "RASTER_CONFIG_SC_MAP_2", "value": 2},
673     {"name": "RASTER_CONFIG_SC_MAP_3", "value": 3}
678     {"name": "RASTER_CONFIG_SC_XSEL_8_WIDE_TILE", "value": 0},
679     {"name": "RASTER_CONFIG_SC_XSEL_16_WIDE_TILE", "value": 1},
680     {"name": "RASTER_CONFIG_SC_XSEL_32_WIDE_TILE", "value": 2},
681     {"name": "RASTER_CONFIG_SC_XSEL_64_WIDE_TILE", "value": 3}
686     {"name": "RASTER_CONFIG_SC_YSEL_8_WIDE_TILE", "value": 0},
687     {"name": "RASTER_CONFIG_SC_YSEL_16_WIDE_TILE", "value": 1},
688     {"name": "RASTER_CONFIG_SC_YSEL_32_WIDE_TILE", "value": 2},
689     {"name": "RASTER_CONFIG_SC_YSEL_64_WIDE_TILE", "value": 3}
694     {"name": "RASTER_CONFIG_SE_MAP_0", "value": 0},
695     {"name": "RASTER_CONFIG_SE_MAP_1", "value": 1},
696     {"name": "RASTER_CONFIG_SE_MAP_2", "value": 2},
697     {"name": "RASTER_CONFIG_SE_MAP_3", "value": 3}
702     {"name": "RASTER_CONFIG_SE_PAIR_MAP_0", "value": 0},
703     {"name": "RASTER_CONFIG_SE_PAIR_MAP_1", "value": 1},
704     {"name": "RASTER_CONFIG_SE_PAIR_MAP_2", "value": 2},
705     {"name": "RASTER_CONFIG_SE_PAIR_MAP_3", "value": 3}
710     {"name": "RASTER_CONFIG_SE_PAIR_XSEL_8_WIDE_TILE", "value": 0},
711     {"name": "RASTER_CONFIG_SE_PAIR_XSEL_16_WIDE_TILE", "value": 1},
712     {"name": "RASTER_CONFIG_SE_PAIR_XSEL_32_WIDE_TILE", "value": 2},
713     {"name": "RASTER_CONFIG_SE_PAIR_XSEL_64_WIDE_TILE", "value": 3}
718     {"name": "RASTER_CONFIG_SE_PAIR_YSEL_8_WIDE_TILE", "value": 0},
719     {"name": "RASTER_CONFIG_SE_PAIR_YSEL_16_WIDE_TILE", "value": 1},
720     {"name": "RASTER_CONFIG_SE_PAIR_YSEL_32_WIDE_TILE", "value": 2},
721     {"name": "RASTER_CONFIG_SE_PAIR_YSEL_64_WIDE_TILE", "value": 3}
726     {"name": "RASTER_CONFIG_SE_XSEL_8_WIDE_TILE", "value": 0},
727     {"name": "RASTER_CONFIG_SE_XSEL_16_WIDE_TILE", "value": 1},
728     {"name": "RASTER_CONFIG_SE_XSEL_32_WIDE_TILE", "value": 2},
729     {"name": "RASTER_CONFIG_SE_XSEL_64_WIDE_TILE", "value": 3}
734     {"name": "RASTER_CONFIG_SE_YSEL_8_WIDE_TILE", "value": 0},
735     {"name": "RASTER_CONFIG_SE_YSEL_16_WIDE_TILE", "value": 1},
736     {"name": "RASTER_CONFIG_SE_YSEL_32_WIDE_TILE", "value": 2},
737     {"name": "RASTER_CONFIG_SE_YSEL_64_WIDE_TILE", "value": 3}
742     {"name": "STENCIL_INVALID", "value": 0},
743     {"name": "STENCIL_8", "value": 1}
748     {"name": "STENCIL_KEEP", "value": 0},
749     {"name": "STENCIL_ZERO", "value": 1},
750     {"name": "STENCIL_ONES", "value": 2},
751     {"name": "STENCIL_REPLACE_TEST", "value": 3},
752     {"name": "STENCIL_REPLACE_OP", "value": 4},
753     {"name": "STENCIL_ADD_CLAMP", "value": 5},
754     {"name": "STENCIL_SUB_CLAMP", "value": 6},
755     {"name": "STENCIL_INVERT", "value": 7},
756     {"name": "STENCIL_ADD_WRAP", "value": 8},
757     {"name": "STENCIL_SUB_WRAP", "value": 9},
758     {"name": "STENCIL_AND", "value": 10},
759     {"name": "STENCIL_OR", "value": 11},
760     {"name": "STENCIL_XOR", "value": 12},
761     {"name": "STENCIL_NAND", "value": 13},
762     {"name": "STENCIL_NOR", "value": 14},
763     {"name": "STENCIL_XNOR", "value": 15}
768     {"name": "ENDIAN_NONE", "value": 0},
769     {"name": "ENDIAN_8IN16", "value": 1},
770     {"name": "ENDIAN_8IN32", "value": 2},
771     {"name": "ENDIAN_8IN64", "value": 3}
776     {"name": "NUMBER_UNORM", "value": 0},
777     {"name": "NUMBER_SNORM", "value": 1},
778     {"name": "NUMBER_USCALED", "value": 2},
779     {"name": "NUMBER_SSCALED", "value": 3},
780     {"name": "NUMBER_UINT", "value": 4},
781     {"name": "NUMBER_SINT", "value": 5},
782     {"name": "NUMBER_SRGB", "value": 6},
783     {"name": "NUMBER_FLOAT", "value": 7}
788     {"name": "SWAP_STD", "value": 0},
789     {"name": "SWAP_ALT", "value": 1},
790     {"name": "SWAP_STD_REV", "value": 2},
791     {"name": "SWAP_ALT_REV", "value": 3}
796     {"name": "ADDR_SURF_TILE_SPLIT_64B", "value": 0},
797     {"name": "ADDR_SURF_TILE_SPLIT_128B", "value": 1},
798     {"name": "ADDR_SURF_TILE_SPLIT_256B", "value": 2},
799     {"name": "ADDR_SURF_TILE_SPLIT_512B", "value": 3},
800     {"name": "ADDR_SURF_TILE_SPLIT_1KB", "value": 4},
801     {"name": "ADDR_SURF_TILE_SPLIT_2KB", "value": 5},
802     {"name": "ADDR_SURF_TILE_SPLIT_4KB", "value": 6}
807     {"name": "DI_MAJOR_MODE_0", "value": 0},
808     {"name": "DI_MAJOR_MODE_1", "value": 1}
813     {"name": "DI_PT_NONE", "value": 0},
814     {"name": "DI_PT_POINTLIST", "value": 1},
815     {"name": "DI_PT_LINELIST", "value": 2},
816     {"name": "DI_PT_LINESTRIP", "value": 3},
817     {"name": "DI_PT_TRILIST", "value": 4},
818     {"name": "DI_PT_TRIFAN", "value": 5},
819     {"name": "DI_PT_TRISTRIP", "value": 6},
820     {"name": "DI_PT_UNUSED_0", "value": 7},
821     {"name": "DI_PT_UNUSED_1", "value": 8},
822     {"name": "DI_PT_PATCH", "value": 9},
823     {"name": "DI_PT_LINELIST_ADJ", "value": 10},
824     {"name": "DI_PT_LINESTRIP_ADJ", "value": 11},
825     {"name": "DI_PT_TRILIST_ADJ", "value": 12},
826     {"name": "DI_PT_TRISTRIP_ADJ", "value": 13},
827     {"name": "DI_PT_UNUSED_3", "value": 14},
828     {"name": "DI_PT_UNUSED_4", "value": 15},
829     {"name": "DI_PT_TRI_WITH_WFLAGS", "value": 16},
830     {"name": "DI_PT_RECTLIST", "value": 17},
831     {"name": "DI_PT_LINELOOP", "value": 18},
832     {"name": "DI_PT_QUADLIST", "value": 19},
833     {"name": "DI_PT_QUADSTRIP", "value": 20},
834     {"name": "DI_PT_POLYGON", "value": 21},
835     {"name": "DI_PT_2D_COPY_RECT_LIST_V0", "value": 22},
836     {"name": "DI_PT_2D_COPY_RECT_LIST_V1", "value": 23},
837     {"name": "DI_PT_2D_COPY_RECT_LIST_V2", "value": 24},
838     {"name": "DI_PT_2D_COPY_RECT_LIST_V3", "value": 25},
839     {"name": "DI_PT_2D_FILL_RECT_LIST", "value": 26},
840     {"name": "DI_PT_2D_LINE_STRIP", "value": 27},
841     {"name": "DI_PT_2D_TRI_STRIP", "value": 28}
846     {"name": "DI_SRC_SEL_DMA", "value": 0},
847     {"name": "DI_SRC_SEL_IMMEDIATE", "value": 1},
848     {"name": "DI_SRC_SEL_AUTO_INDEX", "value": 2},
849     {"name": "DI_SRC_SEL_RESERVED", "value": 3}
854     {"name": "VGT_DMA_BUF_MEM", "value": 0},
855     {"name": "VGT_DMA_BUF_RING", "value": 1},
856     {"name": "VGT_DMA_BUF_SETUP", "value": 2}
861     {"name": "VGT_DMA_SWAP_NONE", "value": 0},
862     {"name": "VGT_DMA_SWAP_16_BIT", "value": 1},
863     {"name": "VGT_DMA_SWAP_32_BIT", "value": 2},
864     {"name": "VGT_DMA_SWAP_WORD", "value": 3}
869     {"name": "Reserved_0x00", "value": 0},
870     {"name": "SAMPLE_STREAMOUTSTATS1", "value": 1},
871     {"name": "SAMPLE_STREAMOUTSTATS2", "value": 2},
872     {"name": "SAMPLE_STREAMOUTSTATS3", "value": 3},
873     {"name": "CACHE_FLUSH_TS", "value": 4},
874     {"name": "CONTEXT_DONE", "value": 5},
875     {"name": "CACHE_FLUSH", "value": 6},
876     {"name": "CS_PARTIAL_FLUSH", "value": 7},
877     {"name": "VGT_STREAMOUT_SYNC", "value": 8},
878     {"name": "Reserved_0x09", "value": 9},
879     {"name": "VGT_STREAMOUT_RESET", "value": 10},
880     {"name": "END_OF_PIPE_INCR_DE", "value": 11},
881     {"name": "END_OF_PIPE_IB_END", "value": 12},
882     {"name": "RST_PIX_CNT", "value": 13},
883     {"name": "Reserved_0x0E", "value": 14},
884     {"name": "VS_PARTIAL_FLUSH", "value": 15},
885     {"name": "PS_PARTIAL_FLUSH", "value": 16},
886     {"name": "FLUSH_HS_OUTPUT", "value": 17},
887     {"name": "FLUSH_LS_OUTPUT", "value": 18},
888     {"name": "Reserved_0x13", "value": 19},
889     {"name": "CACHE_FLUSH_AND_INV_TS_EVENT", "value": 20},
890     {"name": "ZPASS_DONE", "value": 21},
891     {"name": "CACHE_FLUSH_AND_INV_EVENT", "value": 22},
892     {"name": "PERFCOUNTER_START", "value": 23},
893     {"name": "PERFCOUNTER_STOP", "value": 24},
894     {"name": "PIPELINESTAT_START", "value": 25},
895     {"name": "PIPELINESTAT_STOP", "value": 26},
896     {"name": "PERFCOUNTER_SAMPLE", "value": 27},
897     {"name": "FLUSH_ES_OUTPUT", "value": 28},
898     {"name": "FLUSH_GS_OUTPUT", "value": 29},
899     {"name": "SAMPLE_PIPELINESTAT", "value": 30},
900     {"name": "SO_VGTSTREAMOUT_FLUSH", "value": 31},
901     {"name": "SAMPLE_STREAMOUTSTATS", "value": 32},
902     {"name": "RESET_VTX_CNT", "value": 33},
903     {"name": "BLOCK_CONTEXT_DONE", "value": 34},
904     {"name": "CS_CONTEXT_DONE", "value": 35},
905     {"name": "VGT_FLUSH", "value": 36},
906     {"name": "Reserved_0x25", "value": 37},
907     {"name": "SQ_NON_EVENT", "value": 38},
908     {"name": "SC_SEND_DB_VPZ", "value": 39},
909     {"name": "BOTTOM_OF_PIPE_TS", "value": 40},
910     {"name": "FLUSH_SX_TS", "value": 41},
911     {"name": "DB_CACHE_FLUSH_AND_INV", "value": 42},
912     {"name": "FLUSH_AND_INV_DB_DATA_TS", "value": 43},
913     {"name": "FLUSH_AND_INV_DB_META", "value": 44},
914     {"name": "FLUSH_AND_INV_CB_DATA_TS", "value": 45},
915     {"name": "FLUSH_AND_INV_CB_META", "value": 46},
916     {"name": "CS_DONE", "value": 47},
917     {"name": "PS_DONE", "value": 48},
918     {"name": "FLUSH_AND_INV_CB_PIXEL_DATA", "value": 49},
919     {"name": "SX_CB_RAT_ACK_REQUEST", "value": 50},
920     {"name": "THREAD_TRACE_START", "value": 51},
921     {"name": "THREAD_TRACE_STOP", "value": 52},
922     {"name": "THREAD_TRACE_MARKER", "value": 53},
923     {"name": "THREAD_TRACE_FLUSH", "value": 54},
924     {"name": "THREAD_TRACE_FINISH", "value": 55},
925     {"name": "PIXEL_PIPE_STAT_CONTROL", "value": 56},
926     {"name": "PIXEL_PIPE_STAT_DUMP", "value": 57},
927     {"name": "PIXEL_PIPE_STAT_RESET", "value": 58},
928     {"name": "CONTEXT_SUSPEND", "value": 59}
933     {"name": "GS_CUT_1024", "value": 0},
934     {"name": "GS_CUT_512", "value": 1},
935     {"name": "GS_CUT_256", "value": 2},
936     {"name": "GS_CUT_128", "value": 3}
941     {"name": "GS_OFF", "value": 0},
942     {"name": "GS_SCENARIO_A", "value": 1},
943     {"name": "GS_SCENARIO_B", "value": 2},
944     {"name": "GS_SCENARIO_G", "value": 3},
945     {"name": "GS_SCENARIO_C", "value": 4},
946     {"name": "SPRITE_EN", "value": 5}
951     {"name": "POINTLIST", "value": 0},
952     {"name": "LINESTRIP", "value": 1},
953     {"name": "TRISTRIP", "value": 2}
958     {"name": "X_8K_DWORDS", "value": 0},
959     {"name": "X_4K_DWORDS", "value": 1},
960     {"name": "X_2K_DWORDS", "value": 2},
961     {"name": "X_1K_DWORDS", "value": 3}
966     {"name": "VGT_INDEX_16", "value": 0},
967     {"name": "VGT_INDEX_32", "value": 1}
972     {"name": "VGT_POLICY_LRU", "value": 0},
973     {"name": "VGT_POLICY_STREAM", "value": 1},
974     {"name": "VGT_POLICY_BYPASS", "value": 2},
975     {"name": "VGT_POLICY_RESERVED", "value": 3}
980     {"name": "ES_STAGE_OFF", "value": 0},
981     {"name": "ES_STAGE_DS", "value": 1},
982     {"name": "ES_STAGE_REAL", "value": 2},
983     {"name": "RESERVED_ES", "value": 3}
988     {"name": "GS_STAGE_OFF", "value": 0},
989     {"name": "GS_STAGE_ON", "value": 1}
994     {"name": "HS_STAGE_OFF", "value": 0},
995     {"name": "HS_STAGE_ON", "value": 1}
1000     {"name": "LS_STAGE_OFF", "value": 0},
1001     {"name": "LS_STAGE_ON", "value": 1},
1002     {"name": "CS_STAGE_ON", "value": 2},
1003     {"name": "RESERVED_LS", "value": 3}
1008     {"name": "VS_STAGE_REAL", "value": 0},
1009     {"name": "VS_STAGE_DS", "value": 1},
1010     {"name": "VS_STAGE_COPY_SHADER", "value": 2},
1011     {"name": "RESERVED_VS", "value": 3}
1016     {"name": "PART_INTEGER", "value": 0},
1017     {"name": "PART_POW2", "value": 1},
1018     {"name": "PART_FRAC_ODD", "value": 2},
1019     {"name": "PART_FRAC_EVEN", "value": 3}
1024     {"name": "OUTPUT_POINT", "value": 0},
1025     {"name": "OUTPUT_LINE", "value": 1},
1026     {"name": "OUTPUT_TRIANGLE_CW", "value": 2},
1027     {"name": "OUTPUT_TRIANGLE_CCW", "value": 3}
1032     {"name": "TESS_ISOLINE", "value": 0},
1033     {"name": "TESS_TRIANGLE", "value": 1},
1034     {"name": "TESS_QUAD", "value": 2}
1039     {"name": "Z_INVALID", "value": 0},
1040     {"name": "Z_16", "value": 1},
1041     {"name": "Z_24", "value": 2},
1042     {"name": "Z_32_FLOAT", "value": 3}
1047     {"name": "FORCE_SUMM_OFF", "value": 0},
1048     {"name": "FORCE_SUMM_MINZ", "value": 1},
1049     {"name": "FORCE_SUMM_MAXZ", "value": 2},
1050     {"name": "FORCE_SUMM_BOTH", "value": 3}
1055     {"name": "LATE_Z", "value": 0},
1056     {"name": "EARLY_Z_THEN_LATE_Z", "value": 1},
1057     {"name": "RE_Z", "value": 2},
1058     {"name": "EARLY_Z_THEN_RE_Z", "value": 3}
1066    "name": "SQ_WAVE_MODE",
1072    "name": "SQ_WAVE_STATUS",
1078    "name": "SQ_WAVE_TRAPSTS",
1084    "name": "SQ_WAVE_HW_ID",
1090    "name": "SQ_WAVE_GPR_ALLOC",
1096    "name": "SQ_WAVE_LDS_ALLOC",
1102    "name": "SQ_WAVE_IB_STS",
1108    "name": "SQ_WAVE_PC_LO"
1113    "name": "SQ_WAVE_PC_HI",
1119    "name": "SQ_WAVE_INST_DW0"
1124    "name": "SQ_WAVE_INST_DW1"
1129    "name": "SQ_WAVE_IB_DBG0",
1135    "name": "SQ_WAVE_TBA_LO"
1140    "name": "SQ_WAVE_TBA_HI",
1146    "name": "SQ_WAVE_TMA_LO"
1151    "name": "SQ_WAVE_TMA_HI",
1157    "name": "SQ_WAVE_TTMP0"
1162    "name": "SQ_WAVE_TTMP1"
1167    "name": "SQ_WAVE_TTMP2"
1172    "name": "SQ_WAVE_TTMP3"
1177    "name": "SQ_WAVE_TTMP4"
1182    "name": "SQ_WAVE_TTMP5"
1187    "name": "SQ_WAVE_TTMP6"
1192    "name": "SQ_WAVE_TTMP7"
1197    "name": "SQ_WAVE_TTMP8"
1202    "name": "SQ_WAVE_TTMP9"
1207    "name": "SQ_WAVE_TTMP10"
1212    "name": "SQ_WAVE_TTMP11"
1217    "name": "SQ_WAVE_M0"
1222    "name": "SQ_WAVE_EXEC_LO"
1227    "name": "SQ_WAVE_EXEC_HI"
1232    "name": "GRBM_STATUS2",
1238    "name": "GRBM_STATUS",
1244    "name": "GRBM_STATUS_SE0",
1250    "name": "GRBM_STATUS_SE1",
1256    "name": "GRBM_STATUS_SE2",
1262    "name": "GRBM_STATUS_SE3",
1268    "name": "CP_CPC_STATUS",
1274    "name": "CP_CPC_BUSY_STAT",
1280    "name": "CP_CPC_STALLED_STAT1",
1286    "name": "CP_CPF_STATUS",
1292    "name": "CP_CPF_BUSY_STAT",
1298    "name": "CP_CPF_STALLED_STAT1",
1304    "name": "CP_CPC_MC_CNTL",
1310    "name": "CP_CPC_GRBM_FREE_COUNT",
1316    "name": "CP_CPC_SCRATCH_INDEX",
1322    "name": "CP_CPC_SCRATCH_DATA"
1327    "name": "CP_CPC_HALT_HYST_COUNT",
1333    "name": "SQ_THREAD_TRACE_BASE"
1338    "name": "SQ_THREAD_TRACE_SIZE",
1344    "name": "SQ_THREAD_TRACE_MASK",
1350    "name": "SQ_THREAD_TRACE_TOKEN_MASK",
1356    "name": "SQ_THREAD_TRACE_PERF_MASK",
1362    "name": "SQ_THREAD_TRACE_BASE2",
1368    "name": "SQ_THREAD_TRACE_TOKEN_MASK2",
1374    "name": "SQ_THREAD_TRACE_WPTR",
1380    "name": "SQ_THREAD_TRACE_STATUS",
1386    "name": "SQ_THREAD_TRACE_MODE",
1392    "name": "SQ_THREAD_TRACE_CTRL",
1398    "name": "SQ_THREAD_TRACE_CNTR"
1403    "name": "SQ_THREAD_TRACE_HIWATER",
1409    "name": "SQ_BUF_RSRC_WORD0"
1414    "name": "SQ_BUF_RSRC_WORD1",
1420    "name": "SQ_BUF_RSRC_WORD2"
1425    "name": "SQ_BUF_RSRC_WORD3",
1431    "name": "SQ_IMG_RSRC_WORD0"
1436    "name": "SQ_IMG_RSRC_WORD1",
1442    "name": "SQ_IMG_RSRC_WORD2",
1448    "name": "SQ_IMG_RSRC_WORD3",
1454    "name": "SQ_IMG_RSRC_WORD4",
1460    "name": "SQ_IMG_RSRC_WORD5",
1466    "name": "SQ_IMG_RSRC_WORD6",
1472    "name": "SQ_IMG_RSRC_WORD7"
1477    "name": "SQ_IMG_SAMP_WORD0",
1483    "name": "SQ_IMG_SAMP_WORD1",
1489    "name": "SQ_IMG_SAMP_WORD2",
1495    "name": "SQ_IMG_SAMP_WORD3",
1501    "name": "SPI_CONFIG_CNTL",
1507    "name": "GB_ADDR_CONFIG",
1513    "name": "GB_TILE_MODE0",
1519    "name": "GB_TILE_MODE1",
1525    "name": "GB_TILE_MODE2",
1531    "name": "GB_TILE_MODE3",
1537    "name": "GB_TILE_MODE4",
1543    "name": "GB_TILE_MODE5",
1549    "name": "GB_TILE_MODE6",
1555    "name": "GB_TILE_MODE7",
1561    "name": "GB_TILE_MODE8",
1567    "name": "GB_TILE_MODE9",
1573    "name": "GB_TILE_MODE10",
1579    "name": "GB_TILE_MODE11",
1585    "name": "GB_TILE_MODE12",
1591    "name": "GB_TILE_MODE13",
1597    "name": "GB_TILE_MODE14",
1603    "name": "GB_TILE_MODE15",
1609    "name": "GB_TILE_MODE16",
1615    "name": "GB_TILE_MODE17",
1621    "name": "GB_TILE_MODE18",
1627    "name": "GB_TILE_MODE19",
1633    "name": "GB_TILE_MODE20",
1639    "name": "GB_TILE_MODE21",
1645    "name": "GB_TILE_MODE22",
1651    "name": "GB_TILE_MODE23",
1657    "name": "GB_TILE_MODE24",
1663    "name": "GB_TILE_MODE25",
1669    "name": "GB_TILE_MODE26",
1675    "name": "GB_TILE_MODE27",
1681    "name": "GB_TILE_MODE28",
1687    "name": "GB_TILE_MODE29",
1693    "name": "GB_TILE_MODE30",
1699    "name": "GB_TILE_MODE31",
1705    "name": "GB_MACROTILE_MODE0",
1711    "name": "GB_MACROTILE_MODE1",
1717    "name": "GB_MACROTILE_MODE2",
1723    "name": "GB_MACROTILE_MODE3",
1729    "name": "GB_MACROTILE_MODE4",
1735    "name": "GB_MACROTILE_MODE5",
1741    "name": "GB_MACROTILE_MODE6",
1747    "name": "GB_MACROTILE_MODE7",
1753    "name": "GB_MACROTILE_MODE8",
1759    "name": "GB_MACROTILE_MODE9",
1765    "name": "GB_MACROTILE_MODE10",
1771    "name": "GB_MACROTILE_MODE11",
1777    "name": "GB_MACROTILE_MODE12",
1783    "name": "GB_MACROTILE_MODE13",
1789    "name": "GB_MACROTILE_MODE14",
1795    "name": "GB_MACROTILE_MODE15",
1801    "name": "SPI_SHADER_TBA_LO_PS"
1806    "name": "SPI_SHADER_TBA_HI_PS",
1812    "name": "SPI_SHADER_TMA_LO_PS"
1817    "name": "SPI_SHADER_TMA_HI_PS",
1823    "name": "SPI_SHADER_PGM_RSRC3_PS",
1829    "name": "SPI_SHADER_PGM_LO_PS"
1834    "name": "SPI_SHADER_PGM_HI_PS",
1840    "name": "SPI_SHADER_PGM_RSRC1_PS",
1846    "name": "SPI_SHADER_PGM_RSRC2_PS",
1852    "name": "SPI_SHADER_USER_DATA_PS_0"
1857    "name": "SPI_SHADER_USER_DATA_PS_1"
1862    "name": "SPI_SHADER_USER_DATA_PS_2"
1867    "name": "SPI_SHADER_USER_DATA_PS_3"
1872    "name": "SPI_SHADER_USER_DATA_PS_4"
1877    "name": "SPI_SHADER_USER_DATA_PS_5"
1882    "name": "SPI_SHADER_USER_DATA_PS_6"
1887    "name": "SPI_SHADER_USER_DATA_PS_7"
1892    "name": "SPI_SHADER_USER_DATA_PS_8"
1897    "name": "SPI_SHADER_USER_DATA_PS_9"
1902    "name": "SPI_SHADER_USER_DATA_PS_10"
1907    "name": "SPI_SHADER_USER_DATA_PS_11"
1912    "name": "SPI_SHADER_USER_DATA_PS_12"
1917    "name": "SPI_SHADER_USER_DATA_PS_13"
1922    "name": "SPI_SHADER_USER_DATA_PS_14"
1927    "name": "SPI_SHADER_USER_DATA_PS_15"
1932    "name": "SPI_SHADER_TBA_LO_VS"
1937    "name": "SPI_SHADER_TBA_HI_VS",
1943    "name": "SPI_SHADER_TMA_LO_VS"
1948    "name": "SPI_SHADER_TMA_HI_VS",
1954    "name": "SPI_SHADER_PGM_RSRC3_VS",
1960    "name": "SPI_SHADER_LATE_ALLOC_VS",
1966    "name": "SPI_SHADER_PGM_LO_VS"
1971    "name": "SPI_SHADER_PGM_HI_VS",
1977    "name": "SPI_SHADER_PGM_RSRC1_VS",
1983    "name": "SPI_SHADER_PGM_RSRC2_VS",
1989    "name": "SPI_SHADER_USER_DATA_VS_0"
1994    "name": "SPI_SHADER_USER_DATA_VS_1"
1999    "name": "SPI_SHADER_USER_DATA_VS_2"
2004    "name": "SPI_SHADER_USER_DATA_VS_3"
2009    "name": "SPI_SHADER_USER_DATA_VS_4"
2014    "name": "SPI_SHADER_USER_DATA_VS_5"
2019    "name": "SPI_SHADER_USER_DATA_VS_6"
2024    "name": "SPI_SHADER_USER_DATA_VS_7"
2029    "name": "SPI_SHADER_USER_DATA_VS_8"
2034    "name": "SPI_SHADER_USER_DATA_VS_9"
2039    "name": "SPI_SHADER_USER_DATA_VS_10"
2044    "name": "SPI_SHADER_USER_DATA_VS_11"
2049    "name": "SPI_SHADER_USER_DATA_VS_12"
2054    "name": "SPI_SHADER_USER_DATA_VS_13"
2059    "name": "SPI_SHADER_USER_DATA_VS_14"
2064    "name": "SPI_SHADER_USER_DATA_VS_15"
2069    "name": "SPI_SHADER_PGM_RSRC2_ES_VS",
2075    "name": "SPI_SHADER_PGM_RSRC2_LS_VS",
2081    "name": "SPI_SHADER_TBA_LO_GS"
2086    "name": "SPI_SHADER_TBA_HI_GS",
2092    "name": "SPI_SHADER_TMA_LO_GS"
2097    "name": "SPI_SHADER_TMA_HI_GS",
2103    "name": "SPI_SHADER_PGM_RSRC3_GS",
2109    "name": "SPI_SHADER_PGM_LO_GS"
2114    "name": "SPI_SHADER_PGM_HI_GS",
2120    "name": "SPI_SHADER_PGM_RSRC1_GS",
2126    "name": "SPI_SHADER_PGM_RSRC2_GS",
2132    "name": "SPI_SHADER_USER_DATA_GS_0"
2137    "name": "SPI_SHADER_USER_DATA_GS_1"
2142    "name": "SPI_SHADER_USER_DATA_GS_2"
2147    "name": "SPI_SHADER_USER_DATA_GS_3"
2152    "name": "SPI_SHADER_USER_DATA_GS_4"
2157    "name": "SPI_SHADER_USER_DATA_GS_5"
2162    "name": "SPI_SHADER_USER_DATA_GS_6"
2167    "name": "SPI_SHADER_USER_DATA_GS_7"
2172    "name": "SPI_SHADER_USER_DATA_GS_8"
2177    "name": "SPI_SHADER_USER_DATA_GS_9"
2182    "name": "SPI_SHADER_USER_DATA_GS_10"
2187    "name": "SPI_SHADER_USER_DATA_GS_11"
2192    "name": "SPI_SHADER_USER_DATA_GS_12"
2197    "name": "SPI_SHADER_USER_DATA_GS_13"
2202    "name": "SPI_SHADER_USER_DATA_GS_14"
2207    "name": "SPI_SHADER_USER_DATA_GS_15"
2212    "name": "SPI_SHADER_PGM_RSRC2_ES_GS",
2218    "name": "SPI_SHADER_TBA_LO_ES"
2223    "name": "SPI_SHADER_TBA_HI_ES",
2229    "name": "SPI_SHADER_TMA_LO_ES"
2234    "name": "SPI_SHADER_TMA_HI_ES",
2240    "name": "SPI_SHADER_PGM_RSRC3_ES",
2246    "name": "SPI_SHADER_PGM_LO_ES"
2251    "name": "SPI_SHADER_PGM_HI_ES",
2257    "name": "SPI_SHADER_PGM_RSRC1_ES",
2263    "name": "SPI_SHADER_PGM_RSRC2_ES",
2269    "name": "SPI_SHADER_USER_DATA_ES_0"
2274    "name": "SPI_SHADER_USER_DATA_ES_1"
2279    "name": "SPI_SHADER_USER_DATA_ES_2"
2284    "name": "SPI_SHADER_USER_DATA_ES_3"
2289    "name": "SPI_SHADER_USER_DATA_ES_4"
2294    "name": "SPI_SHADER_USER_DATA_ES_5"
2299    "name": "SPI_SHADER_USER_DATA_ES_6"
2304    "name": "SPI_SHADER_USER_DATA_ES_7"
2309    "name": "SPI_SHADER_USER_DATA_ES_8"
2314    "name": "SPI_SHADER_USER_DATA_ES_9"
2319    "name": "SPI_SHADER_USER_DATA_ES_10"
2324    "name": "SPI_SHADER_USER_DATA_ES_11"
2329    "name": "SPI_SHADER_USER_DATA_ES_12"
2334    "name": "SPI_SHADER_USER_DATA_ES_13"
2339    "name": "SPI_SHADER_USER_DATA_ES_14"
2344    "name": "SPI_SHADER_USER_DATA_ES_15"
2349    "name": "SPI_SHADER_PGM_RSRC2_LS_ES",
2355    "name": "SPI_SHADER_TBA_LO_HS"
2360    "name": "SPI_SHADER_TBA_HI_HS",
2366    "name": "SPI_SHADER_TMA_LO_HS"
2371    "name": "SPI_SHADER_TMA_HI_HS",
2377    "name": "SPI_SHADER_PGM_RSRC3_HS",
2383    "name": "SPI_SHADER_PGM_LO_HS"
2388    "name": "SPI_SHADER_PGM_HI_HS",
2394    "name": "SPI_SHADER_PGM_RSRC1_HS",
2400    "name": "SPI_SHADER_PGM_RSRC2_HS",
2406    "name": "SPI_SHADER_USER_DATA_HS_0"
2411    "name": "SPI_SHADER_USER_DATA_HS_1"
2416    "name": "SPI_SHADER_USER_DATA_HS_2"
2421    "name": "SPI_SHADER_USER_DATA_HS_3"
2426    "name": "SPI_SHADER_USER_DATA_HS_4"
2431    "name": "SPI_SHADER_USER_DATA_HS_5"
2436    "name": "SPI_SHADER_USER_DATA_HS_6"
2441    "name": "SPI_SHADER_USER_DATA_HS_7"
2446    "name": "SPI_SHADER_USER_DATA_HS_8"
2451    "name": "SPI_SHADER_USER_DATA_HS_9"
2456    "name": "SPI_SHADER_USER_DATA_HS_10"
2461    "name": "SPI_SHADER_USER_DATA_HS_11"
2466    "name": "SPI_SHADER_USER_DATA_HS_12"
2471    "name": "SPI_SHADER_USER_DATA_HS_13"
2476    "name": "SPI_SHADER_USER_DATA_HS_14"
2481    "name": "SPI_SHADER_USER_DATA_HS_15"
2486    "name": "SPI_SHADER_PGM_RSRC2_LS_HS",
2492    "name": "SPI_SHADER_TBA_LO_LS"
2497    "name": "SPI_SHADER_TBA_HI_LS",
2503    "name": "SPI_SHADER_TMA_LO_LS"
2508    "name": "SPI_SHADER_TMA_HI_LS",
2514    "name": "SPI_SHADER_PGM_RSRC3_LS",
2520    "name": "SPI_SHADER_PGM_LO_LS"
2525    "name": "SPI_SHADER_PGM_HI_LS",
2531    "name": "SPI_SHADER_PGM_RSRC1_LS",
2537    "name": "SPI_SHADER_PGM_RSRC2_LS",
2543    "name": "SPI_SHADER_USER_DATA_LS_0"
2548    "name": "SPI_SHADER_USER_DATA_LS_1"
2553    "name": "SPI_SHADER_USER_DATA_LS_2"
2558    "name": "SPI_SHADER_USER_DATA_LS_3"
2563    "name": "SPI_SHADER_USER_DATA_LS_4"
2568    "name": "SPI_SHADER_USER_DATA_LS_5"
2573    "name": "SPI_SHADER_USER_DATA_LS_6"
2578    "name": "SPI_SHADER_USER_DATA_LS_7"
2583    "name": "SPI_SHADER_USER_DATA_LS_8"
2588    "name": "SPI_SHADER_USER_DATA_LS_9"
2593    "name": "SPI_SHADER_USER_DATA_LS_10"
2598    "name": "SPI_SHADER_USER_DATA_LS_11"
2603    "name": "SPI_SHADER_USER_DATA_LS_12"
2608    "name": "SPI_SHADER_USER_DATA_LS_13"
2613    "name": "SPI_SHADER_USER_DATA_LS_14"
2618    "name": "SPI_SHADER_USER_DATA_LS_15"
2623    "name": "COMPUTE_DISPATCH_INITIATOR",
2629    "name": "COMPUTE_DIM_X"
2634    "name": "COMPUTE_DIM_Y"
2639    "name": "COMPUTE_DIM_Z"
2644    "name": "COMPUTE_START_X"
2649    "name": "COMPUTE_START_Y"
2654    "name": "COMPUTE_START_Z"
2659    "name": "COMPUTE_NUM_THREAD_X",
2665    "name": "COMPUTE_NUM_THREAD_Y",
2671    "name": "COMPUTE_NUM_THREAD_Z",
2677    "name": "COMPUTE_PIPELINESTAT_ENABLE",
2683    "name": "COMPUTE_PERFCOUNT_ENABLE",
2689    "name": "COMPUTE_PGM_LO"
2694    "name": "COMPUTE_PGM_HI",
2700    "name": "COMPUTE_TBA_LO"
2705    "name": "COMPUTE_TBA_HI",
2711    "name": "COMPUTE_TMA_LO"
2716    "name": "COMPUTE_TMA_HI",
2722    "name": "COMPUTE_PGM_RSRC1",
2728    "name": "COMPUTE_PGM_RSRC2",
2734    "name": "COMPUTE_VMID",
2740    "name": "COMPUTE_RESOURCE_LIMITS",
2746    "name": "COMPUTE_STATIC_THREAD_MGMT_SE0",
2752    "name": "COMPUTE_STATIC_THREAD_MGMT_SE1",
2758    "name": "COMPUTE_TMPRING_SIZE",
2764    "name": "COMPUTE_STATIC_THREAD_MGMT_SE2",
2770    "name": "COMPUTE_STATIC_THREAD_MGMT_SE3",
2776    "name": "COMPUTE_RESTART_X"
2781    "name": "COMPUTE_RESTART_Y"
2786    "name": "COMPUTE_RESTART_Z"
2791    "name": "COMPUTE_THREAD_TRACE_ENABLE",
2797    "name": "COMPUTE_MISC_RESERVED",
2803    "name": "COMPUTE_USER_DATA_0"
2808    "name": "COMPUTE_USER_DATA_1"
2813    "name": "COMPUTE_USER_DATA_2"
2818    "name": "COMPUTE_USER_DATA_3"
2823    "name": "COMPUTE_USER_DATA_4"
2828    "name": "COMPUTE_USER_DATA_5"
2833    "name": "COMPUTE_USER_DATA_6"
2838    "name": "COMPUTE_USER_DATA_7"
2843    "name": "COMPUTE_USER_DATA_8"
2848    "name": "COMPUTE_USER_DATA_9"
2853    "name": "COMPUTE_USER_DATA_10"
2858    "name": "COMPUTE_USER_DATA_11"
2863    "name": "COMPUTE_USER_DATA_12"
2868    "name": "COMPUTE_USER_DATA_13"
2873    "name": "COMPUTE_USER_DATA_14"
2878    "name": "COMPUTE_USER_DATA_15"
2883    "name": "DB_RENDER_CONTROL",
2889    "name": "DB_COUNT_CONTROL",
2895    "name": "DB_DEPTH_VIEW",
2901    "name": "DB_RENDER_OVERRIDE",
2907    "name": "DB_RENDER_OVERRIDE2",
2913    "name": "DB_HTILE_DATA_BASE"
2918    "name": "DB_DEPTH_BOUNDS_MIN"
2923    "name": "DB_DEPTH_BOUNDS_MAX"
2928    "name": "DB_STENCIL_CLEAR",
2934    "name": "DB_DEPTH_CLEAR"
2939    "name": "PA_SC_SCREEN_SCISSOR_TL",
2945    "name": "PA_SC_SCREEN_SCISSOR_BR",
2951    "name": "DB_DEPTH_INFO",
2957    "name": "DB_Z_INFO",
2963    "name": "DB_STENCIL_INFO",
2969    "name": "DB_Z_READ_BASE"
2974    "name": "DB_STENCIL_READ_BASE"
2979    "name": "DB_Z_WRITE_BASE"
2984    "name": "DB_STENCIL_WRITE_BASE"
2989    "name": "DB_DEPTH_SIZE",
2995    "name": "DB_DEPTH_SLICE",
3001    "name": "TA_BC_BASE_ADDR"
3006    "name": "TA_BC_BASE_ADDR_HI",
3012    "name": "COHER_DEST_BASE_HI_0"
3017    "name": "COHER_DEST_BASE_HI_1"
3022    "name": "COHER_DEST_BASE_HI_2"
3027    "name": "COHER_DEST_BASE_HI_3"
3032    "name": "COHER_DEST_BASE_2"
3037    "name": "COHER_DEST_BASE_3"
3042    "name": "PA_SC_WINDOW_OFFSET",
3048    "name": "PA_SC_WINDOW_SCISSOR_TL",
3054    "name": "PA_SC_WINDOW_SCISSOR_BR",
3060    "name": "PA_SC_CLIPRECT_RULE",
3066    "name": "PA_SC_CLIPRECT_0_TL",
3072    "name": "PA_SC_CLIPRECT_0_BR",
3078    "name": "PA_SC_CLIPRECT_1_TL",
3084    "name": "PA_SC_CLIPRECT_1_BR",
3090    "name": "PA_SC_CLIPRECT_2_TL",
3096    "name": "PA_SC_CLIPRECT_2_BR",
3102    "name": "PA_SC_CLIPRECT_3_TL",
3108    "name": "PA_SC_CLIPRECT_3_BR",
3114    "name": "PA_SC_EDGERULE",
3120    "name": "PA_SU_HARDWARE_SCREEN_OFFSET",
3126    "name": "CB_TARGET_MASK",
3132    "name": "CB_SHADER_MASK",
3138    "name": "PA_SC_GENERIC_SCISSOR_TL",
3144    "name": "PA_SC_GENERIC_SCISSOR_BR",
3150    "name": "COHER_DEST_BASE_0"
3155    "name": "COHER_DEST_BASE_1"
3160    "name": "PA_SC_VPORT_SCISSOR_0_TL",
3166    "name": "PA_SC_VPORT_SCISSOR_0_BR",
3172    "name": "PA_SC_VPORT_SCISSOR_1_TL",
3178    "name": "PA_SC_VPORT_SCISSOR_1_BR",
3184    "name": "PA_SC_VPORT_SCISSOR_2_TL",
3190    "name": "PA_SC_VPORT_SCISSOR_2_BR",
3196    "name": "PA_SC_VPORT_SCISSOR_3_TL",
3202    "name": "PA_SC_VPORT_SCISSOR_3_BR",
3208    "name": "PA_SC_VPORT_SCISSOR_4_TL",
3214    "name": "PA_SC_VPORT_SCISSOR_4_BR",
3220    "name": "PA_SC_VPORT_SCISSOR_5_TL",
3226    "name": "PA_SC_VPORT_SCISSOR_5_BR",
3232    "name": "PA_SC_VPORT_SCISSOR_6_TL",
3238    "name": "PA_SC_VPORT_SCISSOR_6_BR",
3244    "name": "PA_SC_VPORT_SCISSOR_7_TL",
3250    "name": "PA_SC_VPORT_SCISSOR_7_BR",
3256    "name": "PA_SC_VPORT_SCISSOR_8_TL",
3262    "name": "PA_SC_VPORT_SCISSOR_8_BR",
3268    "name": "PA_SC_VPORT_SCISSOR_9_TL",
3274    "name": "PA_SC_VPORT_SCISSOR_9_BR",
3280    "name": "PA_SC_VPORT_SCISSOR_10_TL",
3286    "name": "PA_SC_VPORT_SCISSOR_10_BR",
3292    "name": "PA_SC_VPORT_SCISSOR_11_TL",
3298    "name": "PA_SC_VPORT_SCISSOR_11_BR",
3304    "name": "PA_SC_VPORT_SCISSOR_12_TL",
3310    "name": "PA_SC_VPORT_SCISSOR_12_BR",
3316    "name": "PA_SC_VPORT_SCISSOR_13_TL",
3322    "name": "PA_SC_VPORT_SCISSOR_13_BR",
3328    "name": "PA_SC_VPORT_SCISSOR_14_TL",
3334    "name": "PA_SC_VPORT_SCISSOR_14_BR",
3340    "name": "PA_SC_VPORT_SCISSOR_15_TL",
3346    "name": "PA_SC_VPORT_SCISSOR_15_BR",
3352    "name": "PA_SC_VPORT_ZMIN_0"
3357    "name": "PA_SC_VPORT_ZMAX_0"
3362    "name": "PA_SC_VPORT_ZMIN_1"
3367    "name": "PA_SC_VPORT_ZMAX_1"
3372    "name": "PA_SC_VPORT_ZMIN_2"
3377    "name": "PA_SC_VPORT_ZMAX_2"
3382    "name": "PA_SC_VPORT_ZMIN_3"
3387    "name": "PA_SC_VPORT_ZMAX_3"
3392    "name": "PA_SC_VPORT_ZMIN_4"
3397    "name": "PA_SC_VPORT_ZMAX_4"
3402    "name": "PA_SC_VPORT_ZMIN_5"
3407    "name": "PA_SC_VPORT_ZMAX_5"
3412    "name": "PA_SC_VPORT_ZMIN_6"
3417    "name": "PA_SC_VPORT_ZMAX_6"
3422    "name": "PA_SC_VPORT_ZMIN_7"
3427    "name": "PA_SC_VPORT_ZMAX_7"
3432    "name": "PA_SC_VPORT_ZMIN_8"
3437    "name": "PA_SC_VPORT_ZMAX_8"
3442    "name": "PA_SC_VPORT_ZMIN_9"
3447    "name": "PA_SC_VPORT_ZMAX_9"
3452    "name": "PA_SC_VPORT_ZMIN_10"
3457    "name": "PA_SC_VPORT_ZMAX_10"
3462    "name": "PA_SC_VPORT_ZMIN_11"
3467    "name": "PA_SC_VPORT_ZMAX_11"
3472    "name": "PA_SC_VPORT_ZMIN_12"
3477    "name": "PA_SC_VPORT_ZMAX_12"
3482    "name": "PA_SC_VPORT_ZMIN_13"
3487    "name": "PA_SC_VPORT_ZMAX_13"
3492    "name": "PA_SC_VPORT_ZMIN_14"
3497    "name": "PA_SC_VPORT_ZMAX_14"
3502    "name": "PA_SC_VPORT_ZMIN_15"
3507    "name": "PA_SC_VPORT_ZMAX_15"
3512    "name": "PA_SC_RASTER_CONFIG",
3518    "name": "PA_SC_RASTER_CONFIG_1",
3524    "name": "PA_SC_SCREEN_EXTENT_CONTROL",
3530    "name": "CP_PERFMON_CNTX_CNTL",
3536    "name": "CP_RINGID",
3542    "name": "CP_VMID",
3548    "name": "VGT_MAX_VTX_INDX"
3553    "name": "VGT_MIN_VTX_INDX"
3558    "name": "VGT_INDX_OFFSET"
3563    "name": "VGT_MULTI_PRIM_IB_RESET_INDX"
3568    "name": "CB_BLEND_RED"
3573    "name": "CB_BLEND_GREEN"
3578    "name": "CB_BLEND_BLUE"
3583    "name": "CB_BLEND_ALPHA"
3588    "name": "DB_STENCIL_CONTROL",
3594    "name": "DB_STENCILREFMASK",
3600    "name": "DB_STENCILREFMASK_BF",
3606    "name": "PA_CL_VPORT_XSCALE"
3611    "name": "PA_CL_VPORT_XOFFSET"
3616    "name": "PA_CL_VPORT_YSCALE"
3621    "name": "PA_CL_VPORT_YOFFSET"
3626    "name": "PA_CL_VPORT_ZSCALE"
3631    "name": "PA_CL_VPORT_ZOFFSET"
3636    "name": "PA_CL_VPORT_XSCALE_1"
3641    "name": "PA_CL_VPORT_XOFFSET_1"
3646    "name": "PA_CL_VPORT_YSCALE_1"
3651    "name": "PA_CL_VPORT_YOFFSET_1"
3656    "name": "PA_CL_VPORT_ZSCALE_1"
3661    "name": "PA_CL_VPORT_ZOFFSET_1"
3666    "name": "PA_CL_VPORT_XSCALE_2"
3671    "name": "PA_CL_VPORT_XOFFSET_2"
3676    "name": "PA_CL_VPORT_YSCALE_2"
3681    "name": "PA_CL_VPORT_YOFFSET_2"
3686    "name": "PA_CL_VPORT_ZSCALE_2"
3691    "name": "PA_CL_VPORT_ZOFFSET_2"
3696    "name": "PA_CL_VPORT_XSCALE_3"
3701    "name": "PA_CL_VPORT_XOFFSET_3"
3706    "name": "PA_CL_VPORT_YSCALE_3"
3711    "name": "PA_CL_VPORT_YOFFSET_3"
3716    "name": "PA_CL_VPORT_ZSCALE_3"
3721    "name": "PA_CL_VPORT_ZOFFSET_3"
3726    "name": "PA_CL_VPORT_XSCALE_4"
3731    "name": "PA_CL_VPORT_XOFFSET_4"
3736    "name": "PA_CL_VPORT_YSCALE_4"
3741    "name": "PA_CL_VPORT_YOFFSET_4"
3746    "name": "PA_CL_VPORT_ZSCALE_4"
3751    "name": "PA_CL_VPORT_ZOFFSET_4"
3756    "name": "PA_CL_VPORT_XSCALE_5"
3761    "name": "PA_CL_VPORT_XOFFSET_5"
3766    "name": "PA_CL_VPORT_YSCALE_5"
3771    "name": "PA_CL_VPORT_YOFFSET_5"
3776    "name": "PA_CL_VPORT_ZSCALE_5"
3781    "name": "PA_CL_VPORT_ZOFFSET_5"
3786    "name": "PA_CL_VPORT_XSCALE_6"
3791    "name": "PA_CL_VPORT_XOFFSET_6"
3796    "name": "PA_CL_VPORT_YSCALE_6"
3801    "name": "PA_CL_VPORT_YOFFSET_6"
3806    "name": "PA_CL_VPORT_ZSCALE_6"
3811    "name": "PA_CL_VPORT_ZOFFSET_6"
3816    "name": "PA_CL_VPORT_XSCALE_7"
3821    "name": "PA_CL_VPORT_XOFFSET_7"
3826    "name": "PA_CL_VPORT_YSCALE_7"
3831    "name": "PA_CL_VPORT_YOFFSET_7"
3836    "name": "PA_CL_VPORT_ZSCALE_7"
3841    "name": "PA_CL_VPORT_ZOFFSET_7"
3846    "name": "PA_CL_VPORT_XSCALE_8"
3851    "name": "PA_CL_VPORT_XOFFSET_8"
3856    "name": "PA_CL_VPORT_YSCALE_8"
3861    "name": "PA_CL_VPORT_YOFFSET_8"
3866    "name": "PA_CL_VPORT_ZSCALE_8"
3871    "name": "PA_CL_VPORT_ZOFFSET_8"
3876    "name": "PA_CL_VPORT_XSCALE_9"
3881    "name": "PA_CL_VPORT_XOFFSET_9"
3886    "name": "PA_CL_VPORT_YSCALE_9"
3891    "name": "PA_CL_VPORT_YOFFSET_9"
3896    "name": "PA_CL_VPORT_ZSCALE_9"
3901    "name": "PA_CL_VPORT_ZOFFSET_9"
3906    "name": "PA_CL_VPORT_XSCALE_10"
3911    "name": "PA_CL_VPORT_XOFFSET_10"
3916    "name": "PA_CL_VPORT_YSCALE_10"
3921    "name": "PA_CL_VPORT_YOFFSET_10"
3926    "name": "PA_CL_VPORT_ZSCALE_10"
3931    "name": "PA_CL_VPORT_ZOFFSET_10"
3936    "name": "PA_CL_VPORT_XSCALE_11"
3941    "name": "PA_CL_VPORT_XOFFSET_11"
3946    "name": "PA_CL_VPORT_YSCALE_11"
3951    "name": "PA_CL_VPORT_YOFFSET_11"
3956    "name": "PA_CL_VPORT_ZSCALE_11"
3961    "name": "PA_CL_VPORT_ZOFFSET_11"
3966    "name": "PA_CL_VPORT_XSCALE_12"
3971    "name": "PA_CL_VPORT_XOFFSET_12"
3976    "name": "PA_CL_VPORT_YSCALE_12"
3981    "name": "PA_CL_VPORT_YOFFSET_12"
3986    "name": "PA_CL_VPORT_ZSCALE_12"
3991    "name": "PA_CL_VPORT_ZOFFSET_12"
3996    "name": "PA_CL_VPORT_XSCALE_13"
4001    "name": "PA_CL_VPORT_XOFFSET_13"
4006    "name": "PA_CL_VPORT_YSCALE_13"
4011    "name": "PA_CL_VPORT_YOFFSET_13"
4016    "name": "PA_CL_VPORT_ZSCALE_13"
4021    "name": "PA_CL_VPORT_ZOFFSET_13"
4026    "name": "PA_CL_VPORT_XSCALE_14"
4031    "name": "PA_CL_VPORT_XOFFSET_14"
4036    "name": "PA_CL_VPORT_YSCALE_14"
4041    "name": "PA_CL_VPORT_YOFFSET_14"
4046    "name": "PA_CL_VPORT_ZSCALE_14"
4051    "name": "PA_CL_VPORT_ZOFFSET_14"
4056    "name": "PA_CL_VPORT_XSCALE_15"
4061    "name": "PA_CL_VPORT_XOFFSET_15"
4066    "name": "PA_CL_VPORT_YSCALE_15"
4071    "name": "PA_CL_VPORT_YOFFSET_15"
4076    "name": "PA_CL_VPORT_ZSCALE_15"
4081    "name": "PA_CL_VPORT_ZOFFSET_15"
4086    "name": "PA_CL_UCP_0_X"
4091    "name": "PA_CL_UCP_0_Y"
4096    "name": "PA_CL_UCP_0_Z"
4101    "name": "PA_CL_UCP_0_W"
4106    "name": "PA_CL_UCP_1_X"
4111    "name": "PA_CL_UCP_1_Y"
4116    "name": "PA_CL_UCP_1_Z"
4121    "name": "PA_CL_UCP_1_W"
4126    "name": "PA_CL_UCP_2_X"
4131    "name": "PA_CL_UCP_2_Y"
4136    "name": "PA_CL_UCP_2_Z"
4141    "name": "PA_CL_UCP_2_W"
4146    "name": "PA_CL_UCP_3_X"
4151    "name": "PA_CL_UCP_3_Y"
4156    "name": "PA_CL_UCP_3_Z"
4161    "name": "PA_CL_UCP_3_W"
4166    "name": "PA_CL_UCP_4_X"
4171    "name": "PA_CL_UCP_4_Y"
4176    "name": "PA_CL_UCP_4_Z"
4181    "name": "PA_CL_UCP_4_W"
4186    "name": "PA_CL_UCP_5_X"
4191    "name": "PA_CL_UCP_5_Y"
4196    "name": "PA_CL_UCP_5_Z"
4201    "name": "PA_CL_UCP_5_W"
4206    "name": "SPI_PS_INPUT_CNTL_0",
4212    "name": "SPI_PS_INPUT_CNTL_1",
4218    "name": "SPI_PS_INPUT_CNTL_2",
4224    "name": "SPI_PS_INPUT_CNTL_3",
4230    "name": "SPI_PS_INPUT_CNTL_4",
4236    "name": "SPI_PS_INPUT_CNTL_5",
4242    "name": "SPI_PS_INPUT_CNTL_6",
4248    "name": "SPI_PS_INPUT_CNTL_7",
4254    "name": "SPI_PS_INPUT_CNTL_8",
4260    "name": "SPI_PS_INPUT_CNTL_9",
4266    "name": "SPI_PS_INPUT_CNTL_10",
4272    "name": "SPI_PS_INPUT_CNTL_11",
4278    "name": "SPI_PS_INPUT_CNTL_12",
4284    "name": "SPI_PS_INPUT_CNTL_13",
4290    "name": "SPI_PS_INPUT_CNTL_14",
4296    "name": "SPI_PS_INPUT_CNTL_15",
4302    "name": "SPI_PS_INPUT_CNTL_16",
4308    "name": "SPI_PS_INPUT_CNTL_17",
4314    "name": "SPI_PS_INPUT_CNTL_18",
4320    "name": "SPI_PS_INPUT_CNTL_19",
4326    "name": "SPI_PS_INPUT_CNTL_20",
4332    "name": "SPI_PS_INPUT_CNTL_21",
4338    "name": "SPI_PS_INPUT_CNTL_22",
4344    "name": "SPI_PS_INPUT_CNTL_23",
4350    "name": "SPI_PS_INPUT_CNTL_24",
4356    "name": "SPI_PS_INPUT_CNTL_25",
4362    "name": "SPI_PS_INPUT_CNTL_26",
4368    "name": "SPI_PS_INPUT_CNTL_27",
4374    "name": "SPI_PS_INPUT_CNTL_28",
4380    "name": "SPI_PS_INPUT_CNTL_29",
4386    "name": "SPI_PS_INPUT_CNTL_30",
4392    "name": "SPI_PS_INPUT_CNTL_31",
4398    "name": "SPI_VS_OUT_CONFIG",
4404    "name": "SPI_PS_INPUT_ENA",
4410    "name": "SPI_PS_INPUT_ADDR",
4416    "name": "SPI_INTERP_CONTROL_0",
4422    "name": "SPI_PS_IN_CONTROL",
4428    "name": "SPI_BARYC_CNTL",
4434    "name": "SPI_TMPRING_SIZE",
4440    "name": "SPI_SHADER_POS_FORMAT",
4446    "name": "SPI_SHADER_Z_FORMAT",
4452    "name": "SPI_SHADER_COL_FORMAT",
4458    "name": "CB_BLEND0_CONTROL",
4464    "name": "CB_BLEND1_CONTROL",
4470    "name": "CB_BLEND2_CONTROL",
4476    "name": "CB_BLEND3_CONTROL",
4482    "name": "CB_BLEND4_CONTROL",
4488    "name": "CB_BLEND5_CONTROL",
4494    "name": "CB_BLEND6_CONTROL",
4500    "name": "CB_BLEND7_CONTROL",
4506    "name": "CS_COPY_STATE",
4512    "name": "GFX_COPY_STATE",
4518    "name": "PA_CL_POINT_X_RAD"
4523    "name": "PA_CL_POINT_Y_RAD"
4528    "name": "PA_CL_POINT_SIZE"
4533    "name": "PA_CL_POINT_CULL_RAD"
4538    "name": "VGT_DMA_BASE_HI",
4544    "name": "VGT_DMA_BASE"
4549    "name": "VGT_DRAW_INITIATOR",
4555    "name": "VGT_IMMED_DATA"
4560    "name": "VGT_EVENT_ADDRESS_REG",
4566    "name": "DB_DEPTH_CONTROL",
4572    "name": "DB_EQAA",
4578    "name": "CB_COLOR_CONTROL",
4584    "name": "DB_SHADER_CONTROL",
4590    "name": "PA_CL_CLIP_CNTL",
4596    "name": "PA_SU_SC_MODE_CNTL",
4602    "name": "PA_CL_VTE_CNTL",
4608    "name": "PA_CL_VS_OUT_CNTL",
4614    "name": "PA_CL_NANINF_CNTL",
4620    "name": "PA_SU_LINE_STIPPLE_CNTL",
4626    "name": "PA_SU_LINE_STIPPLE_SCALE"
4631    "name": "PA_SU_PRIM_FILTER_CNTL",
4637    "name": "PA_SU_POINT_SIZE",
4643    "name": "PA_SU_POINT_MINMAX",
4649    "name": "PA_SU_LINE_CNTL",
4655    "name": "PA_SC_LINE_STIPPLE",
4661    "name": "VGT_OUTPUT_PATH_CNTL",
4667    "name": "VGT_HOS_CNTL",
4673    "name": "VGT_HOS_MAX_TESS_LEVEL"
4678    "name": "VGT_HOS_MIN_TESS_LEVEL"
4683    "name": "VGT_HOS_REUSE_DEPTH",
4689    "name": "VGT_GROUP_PRIM_TYPE",
4695    "name": "VGT_GROUP_FIRST_DECR",
4701    "name": "VGT_GROUP_DECR",
4707    "name": "VGT_GROUP_VECT_0_CNTL",
4713    "name": "VGT_GROUP_VECT_1_CNTL",
4719    "name": "VGT_GROUP_VECT_0_FMT_CNTL",
4725    "name": "VGT_GROUP_VECT_1_FMT_CNTL",
4731    "name": "VGT_GS_MODE",
4737    "name": "VGT_GS_ONCHIP_CNTL",
4743    "name": "PA_SC_MODE_CNTL_0",
4749    "name": "PA_SC_MODE_CNTL_1",
4755    "name": "VGT_ENHANCE"
4760    "name": "VGT_GS_PER_ES",
4766    "name": "VGT_ES_PER_GS",
4772    "name": "VGT_GS_PER_VS",
4778    "name": "VGT_GSVS_RING_OFFSET_1",
4784    "name": "VGT_GSVS_RING_OFFSET_2",
4790    "name": "VGT_GSVS_RING_OFFSET_3",
4796    "name": "VGT_GS_OUT_PRIM_TYPE",
4802    "name": "IA_ENHANCE"
4807    "name": "VGT_DMA_SIZE"
4812    "name": "VGT_DMA_MAX_SIZE"
4817    "name": "VGT_DMA_INDEX_TYPE",
4823    "name": "WD_ENHANCE"
4828    "name": "VGT_PRIMITIVEID_EN",
4834    "name": "VGT_DMA_NUM_INSTANCES"
4839    "name": "VGT_PRIMITIVEID_RESET"
4844    "name": "VGT_EVENT_INITIATOR",
4850    "name": "VGT_MULTI_PRIM_IB_RESET_EN",
4856    "name": "VGT_INSTANCE_STEP_RATE_0"
4861    "name": "VGT_INSTANCE_STEP_RATE_1"
4866    "name": "IA_MULTI_VGT_PARAM",
4872    "name": "VGT_ESGS_RING_ITEMSIZE",
4878    "name": "VGT_GSVS_RING_ITEMSIZE",
4884    "name": "VGT_REUSE_OFF",
4890    "name": "VGT_VTX_CNT_EN",
4896    "name": "DB_HTILE_SURFACE",
4902    "name": "DB_SRESULTS_COMPARE_STATE0",
4908    "name": "DB_SRESULTS_COMPARE_STATE1",
4914    "name": "DB_PRELOAD_CONTROL",
4920    "name": "VGT_STRMOUT_BUFFER_SIZE_0"
4925    "name": "VGT_STRMOUT_VTX_STRIDE_0",
4931    "name": "VGT_STRMOUT_BUFFER_OFFSET_0"
4936    "name": "VGT_STRMOUT_BUFFER_SIZE_1"
4941    "name": "VGT_STRMOUT_VTX_STRIDE_1",
4947    "name": "VGT_STRMOUT_BUFFER_OFFSET_1"
4952    "name": "VGT_STRMOUT_BUFFER_SIZE_2"
4957    "name": "VGT_STRMOUT_VTX_STRIDE_2",
4963    "name": "VGT_STRMOUT_BUFFER_OFFSET_2"
4968    "name": "VGT_STRMOUT_BUFFER_SIZE_3"
4973    "name": "VGT_STRMOUT_VTX_STRIDE_3",
4979    "name": "VGT_STRMOUT_BUFFER_OFFSET_3"
4984    "name": "VGT_STRMOUT_DRAW_OPAQUE_OFFSET"
4989    "name": "VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE"
4994    "name": "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE",
5000    "name": "VGT_GS_MAX_VERT_OUT",
5006    "name": "VGT_SHADER_STAGES_EN",
5012    "name": "VGT_LS_HS_CONFIG",
5018    "name": "VGT_GS_VERT_ITEMSIZE",
5024    "name": "VGT_GS_VERT_ITEMSIZE_1",
5030    "name": "VGT_GS_VERT_ITEMSIZE_2",
5036    "name": "VGT_GS_VERT_ITEMSIZE_3",
5042    "name": "VGT_TF_PARAM",
5048    "name": "DB_ALPHA_TO_MASK",
5054    "name": "VGT_DISPATCH_DRAW_INDEX"
5059    "name": "PA_SU_POLY_OFFSET_DB_FMT_CNTL",
5065    "name": "PA_SU_POLY_OFFSET_CLAMP"
5070    "name": "PA_SU_POLY_OFFSET_FRONT_SCALE"
5075    "name": "PA_SU_POLY_OFFSET_FRONT_OFFSET"
5080    "name": "PA_SU_POLY_OFFSET_BACK_SCALE"
5085    "name": "PA_SU_POLY_OFFSET_BACK_OFFSET"
5090    "name": "VGT_GS_INSTANCE_CNT",
5096    "name": "VGT_STRMOUT_CONFIG",
5102    "name": "VGT_STRMOUT_BUFFER_CONFIG",
5108    "name": "PA_SC_CENTROID_PRIORITY_0",
5114    "name": "PA_SC_CENTROID_PRIORITY_1",
5120    "name": "PA_SC_LINE_CNTL",
5126    "name": "PA_SC_AA_CONFIG",
5132    "name": "PA_SU_VTX_CNTL",
5138    "name": "PA_CL_GB_VERT_CLIP_ADJ"
5143    "name": "PA_CL_GB_VERT_DISC_ADJ"
5148    "name": "PA_CL_GB_HORZ_CLIP_ADJ"
5153    "name": "PA_CL_GB_HORZ_DISC_ADJ"
5158    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0",
5164    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1",
5170    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2",
5176    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3",
5182    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0",
5188    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1",
5194    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2",
5200    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3",
5206    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0",
5212    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1",
5218    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2",
5224    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3",
5230    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0",
5236    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1",
5242    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2",
5248    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3",
5254    "name": "PA_SC_AA_MASK_X0Y0_X1Y0",
5260    "name": "PA_SC_AA_MASK_X0Y1_X1Y1",
5266    "name": "VGT_VERTEX_REUSE_BLOCK_CNTL",
5272    "name": "VGT_OUT_DEALLOC_CNTL",
5278    "name": "CB_COLOR0_BASE"
5283    "name": "CB_COLOR0_PITCH",
5289    "name": "CB_COLOR0_SLICE",
5295    "name": "CB_COLOR0_VIEW",
5301    "name": "CB_COLOR0_INFO",
5307    "name": "CB_COLOR0_ATTRIB",
5313    "name": "CB_COLOR0_CMASK"
5318    "name": "CB_COLOR0_CMASK_SLICE",
5324    "name": "CB_COLOR0_FMASK"
5329    "name": "CB_COLOR0_FMASK_SLICE",
5335    "name": "CB_COLOR0_CLEAR_WORD0"
5340    "name": "CB_COLOR0_CLEAR_WORD1"
5345    "name": "CB_COLOR1_BASE"
5350    "name": "CB_COLOR1_PITCH",
5356    "name": "CB_COLOR1_SLICE",
5362    "name": "CB_COLOR1_VIEW",
5368    "name": "CB_COLOR1_INFO",
5374    "name": "CB_COLOR1_ATTRIB",
5380    "name": "CB_COLOR1_CMASK"
5385    "name": "CB_COLOR1_CMASK_SLICE",
5391    "name": "CB_COLOR1_FMASK"
5396    "name": "CB_COLOR1_FMASK_SLICE",
5402    "name": "CB_COLOR1_CLEAR_WORD0"
5407    "name": "CB_COLOR1_CLEAR_WORD1"
5412    "name": "CB_COLOR2_BASE"
5417    "name": "CB_COLOR2_PITCH",
5423    "name": "CB_COLOR2_SLICE",
5429    "name": "CB_COLOR2_VIEW",
5435    "name": "CB_COLOR2_INFO",
5441    "name": "CB_COLOR2_ATTRIB",
5447    "name": "CB_COLOR2_CMASK"
5452    "name": "CB_COLOR2_CMASK_SLICE",
5458    "name": "CB_COLOR2_FMASK"
5463    "name": "CB_COLOR2_FMASK_SLICE",
5469    "name": "CB_COLOR2_CLEAR_WORD0"
5474    "name": "CB_COLOR2_CLEAR_WORD1"
5479    "name": "CB_COLOR3_BASE"
5484    "name": "CB_COLOR3_PITCH",
5490    "name": "CB_COLOR3_SLICE",
5496    "name": "CB_COLOR3_VIEW",
5502    "name": "CB_COLOR3_INFO",
5508    "name": "CB_COLOR3_ATTRIB",
5514    "name": "CB_COLOR3_CMASK"
5519    "name": "CB_COLOR3_CMASK_SLICE",
5525    "name": "CB_COLOR3_FMASK"
5530    "name": "CB_COLOR3_FMASK_SLICE",
5536    "name": "CB_COLOR3_CLEAR_WORD0"
5541    "name": "CB_COLOR3_CLEAR_WORD1"
5546    "name": "CB_COLOR4_BASE"
5551    "name": "CB_COLOR4_PITCH",
5557    "name": "CB_COLOR4_SLICE",
5563    "name": "CB_COLOR4_VIEW",
5569    "name": "CB_COLOR4_INFO",
5575    "name": "CB_COLOR4_ATTRIB",
5581    "name": "CB_COLOR4_CMASK"
5586    "name": "CB_COLOR4_CMASK_SLICE",
5592    "name": "CB_COLOR4_FMASK"
5597    "name": "CB_COLOR4_FMASK_SLICE",
5603    "name": "CB_COLOR4_CLEAR_WORD0"
5608    "name": "CB_COLOR4_CLEAR_WORD1"
5613    "name": "CB_COLOR5_BASE"
5618    "name": "CB_COLOR5_PITCH",
5624    "name": "CB_COLOR5_SLICE",
5630    "name": "CB_COLOR5_VIEW",
5636    "name": "CB_COLOR5_INFO",
5642    "name": "CB_COLOR5_ATTRIB",
5648    "name": "CB_COLOR5_CMASK"
5653    "name": "CB_COLOR5_CMASK_SLICE",
5659    "name": "CB_COLOR5_FMASK"
5664    "name": "CB_COLOR5_FMASK_SLICE",
5670    "name": "CB_COLOR5_CLEAR_WORD0"
5675    "name": "CB_COLOR5_CLEAR_WORD1"
5680    "name": "CB_COLOR6_BASE"
5685    "name": "CB_COLOR6_PITCH",
5691    "name": "CB_COLOR6_SLICE",
5697    "name": "CB_COLOR6_VIEW",
5703    "name": "CB_COLOR6_INFO",
5709    "name": "CB_COLOR6_ATTRIB",
5715    "name": "CB_COLOR6_CMASK"
5720    "name": "CB_COLOR6_CMASK_SLICE",
5726    "name": "CB_COLOR6_FMASK"
5731    "name": "CB_COLOR6_FMASK_SLICE",
5737    "name": "CB_COLOR6_CLEAR_WORD0"
5742    "name": "CB_COLOR6_CLEAR_WORD1"
5747    "name": "CB_COLOR7_BASE"
5752    "name": "CB_COLOR7_PITCH",
5758    "name": "CB_COLOR7_SLICE",
5764    "name": "CB_COLOR7_VIEW",
5770    "name": "CB_COLOR7_INFO",
5776    "name": "CB_COLOR7_ATTRIB",
5782    "name": "CB_COLOR7_CMASK"
5787    "name": "CB_COLOR7_CMASK_SLICE",
5793    "name": "CB_COLOR7_FMASK"
5798    "name": "CB_COLOR7_FMASK_SLICE",
5804    "name": "CB_COLOR7_CLEAR_WORD0"
5809    "name": "CB_COLOR7_CLEAR_WORD1"
5814    "name": "CP_EOP_DONE_ADDR_LO",
5820    "name": "CP_EOP_DONE_ADDR_HI",
5826    "name": "CP_EOP_DONE_DATA_LO"
5831    "name": "CP_EOP_DONE_DATA_HI"
5836    "name": "CP_EOP_LAST_FENCE_LO"
5841    "name": "CP_EOP_LAST_FENCE_HI"
5846    "name": "CP_STREAM_OUT_ADDR_LO",
5852    "name": "CP_STREAM_OUT_ADDR_HI",
5858    "name": "CP_NUM_PRIM_WRITTEN_COUNT0_LO"
5863    "name": "CP_NUM_PRIM_WRITTEN_COUNT0_HI"
5868    "name": "CP_NUM_PRIM_NEEDED_COUNT0_LO"
5873    "name": "CP_NUM_PRIM_NEEDED_COUNT0_HI"
5878    "name": "CP_NUM_PRIM_WRITTEN_COUNT1_LO"
5883    "name": "CP_NUM_PRIM_WRITTEN_COUNT1_HI"
5888    "name": "CP_NUM_PRIM_NEEDED_COUNT1_LO"
5893    "name": "CP_NUM_PRIM_NEEDED_COUNT1_HI"
5898    "name": "CP_NUM_PRIM_WRITTEN_COUNT2_LO"
5903    "name": "CP_NUM_PRIM_WRITTEN_COUNT2_HI"
5908    "name": "CP_NUM_PRIM_NEEDED_COUNT2_LO"
5913    "name": "CP_NUM_PRIM_NEEDED_COUNT2_HI"
5918    "name": "CP_NUM_PRIM_WRITTEN_COUNT3_LO"
5923    "name": "CP_NUM_PRIM_WRITTEN_COUNT3_HI"
5928    "name": "CP_NUM_PRIM_NEEDED_COUNT3_LO"
5933    "name": "CP_NUM_PRIM_NEEDED_COUNT3_HI"
5938    "name": "CP_PIPE_STATS_ADDR_LO",
5944    "name": "CP_PIPE_STATS_ADDR_HI",
5950    "name": "CP_VGT_IAVERT_COUNT_LO"
5955    "name": "CP_VGT_IAVERT_COUNT_HI"
5960    "name": "CP_VGT_IAPRIM_COUNT_LO"
5965    "name": "CP_VGT_IAPRIM_COUNT_HI"
5970    "name": "CP_VGT_GSPRIM_COUNT_LO"
5975    "name": "CP_VGT_GSPRIM_COUNT_HI"
5980    "name": "CP_VGT_VSINVOC_COUNT_LO"
5985    "name": "CP_VGT_VSINVOC_COUNT_HI"
5990    "name": "CP_VGT_GSINVOC_COUNT_LO"
5995    "name": "CP_VGT_GSINVOC_COUNT_HI"
6000    "name": "CP_VGT_HSINVOC_COUNT_LO"
6005    "name": "CP_VGT_HSINVOC_COUNT_HI"
6010    "name": "CP_VGT_DSINVOC_COUNT_LO"
6015    "name": "CP_VGT_DSINVOC_COUNT_HI"
6020    "name": "CP_PA_CINVOC_COUNT_LO"
6025    "name": "CP_PA_CINVOC_COUNT_HI"
6030    "name": "CP_PA_CPRIM_COUNT_LO"
6035    "name": "CP_PA_CPRIM_COUNT_HI"
6040    "name": "CP_SC_PSINVOC_COUNT0_LO"
6045    "name": "CP_SC_PSINVOC_COUNT0_HI"
6050    "name": "CP_SC_PSINVOC_COUNT1_LO"
6055    "name": "CP_SC_PSINVOC_COUNT1_HI"
6060    "name": "CP_VGT_CSINVOC_COUNT_LO"
6065    "name": "CP_VGT_CSINVOC_COUNT_HI"
6070    "name": "CP_STRMOUT_CNTL",
6076    "name": "SCRATCH_REG0"
6081    "name": "SCRATCH_REG1"
6086    "name": "SCRATCH_REG2"
6091    "name": "SCRATCH_REG3"
6096    "name": "SCRATCH_REG4"
6101    "name": "SCRATCH_REG5"
6106    "name": "SCRATCH_REG6"
6111    "name": "SCRATCH_REG7"
6116    "name": "SCRATCH_UMSK",
6122    "name": "SCRATCH_ADDR"
6127    "name": "CP_PFP_ATOMIC_PREOP_LO"
6132    "name": "CP_PFP_ATOMIC_PREOP_HI"
6137    "name": "CP_PFP_GDS_ATOMIC0_PREOP_LO"
6142    "name": "CP_PFP_GDS_ATOMIC0_PREOP_HI"
6147    "name": "CP_PFP_GDS_ATOMIC1_PREOP_LO"
6152    "name": "CP_PFP_GDS_ATOMIC1_PREOP_HI"
6157    "name": "CP_APPEND_ADDR_LO",
6163    "name": "CP_APPEND_ADDR_HI",
6169    "name": "CP_APPEND_DATA"
6174    "name": "CP_APPEND_LAST_CS_FENCE"
6179    "name": "CP_APPEND_LAST_PS_FENCE"
6184    "name": "CP_ATOMIC_PREOP_LO"
6189    "name": "CP_ATOMIC_PREOP_HI"
6194    "name": "CP_GDS_ATOMIC0_PREOP_LO"
6199    "name": "CP_GDS_ATOMIC0_PREOP_HI"
6204    "name": "CP_GDS_ATOMIC1_PREOP_LO"
6209    "name": "CP_GDS_ATOMIC1_PREOP_HI"
6214    "name": "CP_ME_MC_WADDR_LO",
6220    "name": "CP_ME_MC_WADDR_HI",
6226    "name": "CP_ME_MC_WDATA_LO"
6231    "name": "CP_ME_MC_WDATA_HI"
6236    "name": "CP_ME_MC_RADDR_LO",
6242    "name": "CP_ME_MC_RADDR_HI",
6248    "name": "CP_SEM_WAIT_TIMER"
6253    "name": "CP_SIG_SEM_ADDR_LO",
6259    "name": "CP_SIG_SEM_ADDR_HI",
6265    "name": "CP_WAIT_REG_MEM_TIMEOUT"
6270    "name": "CP_WAIT_SEM_ADDR_LO",
6276    "name": "CP_WAIT_SEM_ADDR_HI",
6282    "name": "CP_DMA_PFP_CONTROL",
6288    "name": "CP_DMA_ME_CONTROL",
6294    "name": "CP_COHER_BASE_HI",
6300    "name": "CP_COHER_START_DELAY",
6306    "name": "CP_COHER_CNTL",
6312    "name": "CP_COHER_SIZE"
6317    "name": "CP_COHER_BASE"
6322    "name": "CP_COHER_STATUS",
6328    "name": "CP_DMA_ME_SRC_ADDR"
6333    "name": "CP_DMA_ME_SRC_ADDR_HI",
6339    "name": "CP_DMA_ME_DST_ADDR"
6344    "name": "CP_DMA_ME_DST_ADDR_HI",
6350    "name": "CP_DMA_ME_COMMAND",
6356    "name": "CP_DMA_PFP_SRC_ADDR"
6361    "name": "CP_DMA_PFP_SRC_ADDR_HI",
6367    "name": "CP_DMA_PFP_DST_ADDR"
6372    "name": "CP_DMA_PFP_DST_ADDR_HI",
6378    "name": "CP_DMA_PFP_COMMAND",
6384    "name": "CP_DMA_CNTL",
6390    "name": "CP_DMA_READ_TAGS",
6396    "name": "CP_COHER_SIZE_HI",
6402    "name": "CP_PFP_IB_CONTROL",
6408    "name": "CP_PFP_LOAD_CONTROL",
6414    "name": "CP_SCRATCH_INDEX",
6420    "name": "CP_SCRATCH_DATA"
6425    "name": "CP_RB_OFFSET",
6431    "name": "CP_IB1_OFFSET",
6437    "name": "CP_IB2_OFFSET",
6443    "name": "CP_IB1_PREAMBLE_BEGIN",
6449    "name": "CP_IB1_PREAMBLE_END",
6455    "name": "CP_IB2_PREAMBLE_BEGIN",
6461    "name": "CP_IB2_PREAMBLE_END",
6467    "name": "CP_CE_IB1_OFFSET",
6473    "name": "CP_CE_IB2_OFFSET",
6479    "name": "CP_CE_COUNTER"
6484    "name": "CP_CE_INIT_BASE_LO",
6490    "name": "CP_CE_INIT_BASE_HI",
6496    "name": "CP_CE_INIT_BUFSZ",
6502    "name": "CP_CE_IB1_BASE_LO",
6508    "name": "CP_CE_IB1_BASE_HI",
6514    "name": "CP_CE_IB1_BUFSZ",
6520    "name": "CP_CE_IB2_BASE_LO",
6526    "name": "CP_CE_IB2_BASE_HI",
6532    "name": "CP_CE_IB2_BUFSZ",
6538    "name": "CP_IB1_BASE_LO",
6544    "name": "CP_IB1_BASE_HI",
6550    "name": "CP_IB1_BUFSZ",
6556    "name": "CP_IB2_BASE_LO",
6562    "name": "CP_IB2_BASE_HI",
6568    "name": "CP_IB2_BUFSZ",
6574    "name": "CP_ST_BASE_LO",
6580    "name": "CP_ST_BASE_HI",
6586    "name": "CP_ST_BUFSZ",
6592    "name": "CP_EOP_DONE_EVENT_CNTL",
6598    "name": "CP_EOP_DONE_DATA_CNTL",
6604    "name": "GRBM_GFX_INDEX",
6610    "name": "VGT_ESGS_RING_SIZE"
6615    "name": "VGT_GSVS_RING_SIZE"
6620    "name": "VGT_PRIMITIVE_TYPE",
6626    "name": "VGT_INDEX_TYPE",
6632    "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_0"
6637    "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_1"
6642    "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_2"
6647    "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_3"
6652    "name": "VGT_NUM_INDICES"
6657    "name": "VGT_NUM_INSTANCES"
6662    "name": "VGT_TF_RING_SIZE",
6668    "name": "VGT_HS_OFFCHIP_PARAM",
6674    "name": "VGT_TF_MEMORY_BASE"
6679    "name": "PA_SU_LINE_STIPPLE_VALUE",
6685    "name": "PA_SC_LINE_STIPPLE_STATE",
6691    "name": "PA_SC_SCREEN_EXTENT_MIN_0",
6697    "name": "PA_SC_SCREEN_EXTENT_MAX_0",
6703    "name": "PA_SC_SCREEN_EXTENT_MIN_1",
6709    "name": "PA_SC_SCREEN_EXTENT_MAX_1",
6715    "name": "PA_SC_P3D_TRAP_SCREEN_HV_EN",
6721    "name": "PA_SC_P3D_TRAP_SCREEN_H",
6727    "name": "PA_SC_P3D_TRAP_SCREEN_V",
6733    "name": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE",
6739    "name": "PA_SC_P3D_TRAP_SCREEN_COUNT",
6745    "name": "PA_SC_HP3D_TRAP_SCREEN_HV_EN",
6751    "name": "PA_SC_HP3D_TRAP_SCREEN_H",
6757    "name": "PA_SC_HP3D_TRAP_SCREEN_V",
6763    "name": "PA_SC_HP3D_TRAP_SCREEN_OCCURRENCE",
6769    "name": "PA_SC_HP3D_TRAP_SCREEN_COUNT",
6775    "name": "PA_SC_TRAP_SCREEN_HV_EN",
6781    "name": "PA_SC_TRAP_SCREEN_H",
6787    "name": "PA_SC_TRAP_SCREEN_V",
6793    "name": "PA_SC_TRAP_SCREEN_OCCURRENCE",
6799    "name": "PA_SC_TRAP_SCREEN_COUNT",
6805    "name": "SQ_THREAD_TRACE_USERDATA_0"
6810    "name": "SQ_THREAD_TRACE_USERDATA_1"
6815    "name": "SQ_THREAD_TRACE_USERDATA_2"
6820    "name": "SQ_THREAD_TRACE_USERDATA_3"
6825    "name": "SQC_CACHES",
6831    "name": "TA_CS_BC_BASE_ADDR"
6836    "name": "TA_CS_BC_BASE_ADDR_HI",
6842    "name": "DB_OCCLUSION_COUNT0_LOW"
6847    "name": "DB_OCCLUSION_COUNT0_HI",
6853    "name": "DB_OCCLUSION_COUNT1_LOW"
6858    "name": "DB_OCCLUSION_COUNT1_HI",
6864    "name": "DB_OCCLUSION_COUNT2_LOW"
6869    "name": "DB_OCCLUSION_COUNT2_HI",
6875    "name": "DB_OCCLUSION_COUNT3_LOW"
6880    "name": "DB_OCCLUSION_COUNT3_HI",
6886    "name": "DB_ZPASS_COUNT_LOW"
6891    "name": "DB_ZPASS_COUNT_HI",
6897    "name": "GDS_RD_ADDR"
6902    "name": "GDS_RD_DATA"
6907    "name": "GDS_RD_BURST_ADDR"
6912    "name": "GDS_RD_BURST_COUNT"
6917    "name": "GDS_RD_BURST_DATA"
6922    "name": "GDS_WR_ADDR"
6927    "name": "GDS_WR_DATA"
6932    "name": "GDS_WR_BURST_ADDR"
6937    "name": "GDS_WR_BURST_DATA"
6942    "name": "GDS_WRITE_COMPLETE"
6947    "name": "GDS_ATOM_CNTL",
6953    "name": "GDS_ATOM_COMPLETE",
6959    "name": "GDS_ATOM_BASE",
6965    "name": "GDS_ATOM_SIZE",
6971    "name": "GDS_ATOM_OFFSET0",
6977    "name": "GDS_ATOM_OFFSET1",
6983    "name": "GDS_ATOM_DST"
6988    "name": "GDS_ATOM_OP",
6994    "name": "GDS_ATOM_SRC0"
6999    "name": "GDS_ATOM_SRC0_U"
7004    "name": "GDS_ATOM_SRC1"
7009    "name": "GDS_ATOM_SRC1_U"
7014    "name": "GDS_ATOM_READ0"
7019    "name": "GDS_ATOM_READ0_U"
7024    "name": "GDS_ATOM_READ1"
7029    "name": "GDS_ATOM_READ1_U"
7034    "name": "GDS_GWS_RESOURCE_CNTL",
7040    "name": "GDS_GWS_RESOURCE",
7046    "name": "GDS_GWS_RESOURCE_CNT",
7052    "name": "GDS_OA_CNTL",
7058    "name": "GDS_OA_COUNTER"
7063    "name": "GDS_OA_ADDRESS",
7069    "name": "GDS_OA_INCDEC",
7075    "name": "GDS_OA_RING_SIZE"
7080    "name": "CPG_PERFCOUNTER1_LO"
7085    "name": "CPG_PERFCOUNTER1_HI"
7090    "name": "CPG_PERFCOUNTER0_LO"
7095    "name": "CPG_PERFCOUNTER0_HI"
7100    "name": "CPC_PERFCOUNTER1_LO"
7105    "name": "CPC_PERFCOUNTER1_HI"
7110    "name": "CPC_PERFCOUNTER0_LO"
7115    "name": "CPC_PERFCOUNTER0_HI"
7120    "name": "CPF_PERFCOUNTER1_LO"
7125    "name": "CPF_PERFCOUNTER1_HI"
7130    "name": "CPF_PERFCOUNTER0_LO"
7135    "name": "CPF_PERFCOUNTER0_HI"
7140    "name": "GRBM_PERFCOUNTER0_LO"
7145    "name": "GRBM_PERFCOUNTER0_HI"
7150    "name": "GRBM_PERFCOUNTER1_LO"
7155    "name": "GRBM_PERFCOUNTER1_HI"
7160    "name": "GRBM_SE0_PERFCOUNTER_LO"
7165    "name": "GRBM_SE0_PERFCOUNTER_HI"
7170    "name": "GRBM_SE1_PERFCOUNTER_LO"
7175    "name": "GRBM_SE1_PERFCOUNTER_HI"
7180    "name": "GRBM_SE2_PERFCOUNTER_LO"
7185    "name": "GRBM_SE2_PERFCOUNTER_HI"
7190    "name": "GRBM_SE3_PERFCOUNTER_LO"
7195    "name": "GRBM_SE3_PERFCOUNTER_HI"
7200    "name": "WD_PERFCOUNTER0_LO"
7205    "name": "WD_PERFCOUNTER0_HI"
7210    "name": "WD_PERFCOUNTER1_LO"
7215    "name": "WD_PERFCOUNTER1_HI"
7220    "name": "WD_PERFCOUNTER2_LO"
7225    "name": "WD_PERFCOUNTER2_HI"
7230    "name": "WD_PERFCOUNTER3_LO"
7235    "name": "WD_PERFCOUNTER3_HI"
7240    "name": "IA_PERFCOUNTER0_LO"
7245    "name": "IA_PERFCOUNTER0_HI"
7250    "name": "IA_PERFCOUNTER1_LO"
7255    "name": "IA_PERFCOUNTER1_HI"
7260    "name": "IA_PERFCOUNTER2_LO"
7265    "name": "IA_PERFCOUNTER2_HI"
7270    "name": "IA_PERFCOUNTER3_LO"
7275    "name": "IA_PERFCOUNTER3_HI"
7280    "name": "VGT_PERFCOUNTER0_LO"
7285    "name": "VGT_PERFCOUNTER0_HI"
7290    "name": "VGT_PERFCOUNTER1_LO"
7295    "name": "VGT_PERFCOUNTER1_HI"
7300    "name": "VGT_PERFCOUNTER2_LO"
7305    "name": "VGT_PERFCOUNTER2_HI"
7310    "name": "VGT_PERFCOUNTER3_LO"
7315    "name": "VGT_PERFCOUNTER3_HI"
7320    "name": "PA_SU_PERFCOUNTER0_LO"
7325    "name": "PA_SU_PERFCOUNTER0_HI",
7331    "name": "PA_SU_PERFCOUNTER1_LO"
7336    "name": "PA_SU_PERFCOUNTER1_HI",
7342    "name": "PA_SU_PERFCOUNTER2_LO"
7347    "name": "PA_SU_PERFCOUNTER2_HI",
7353    "name": "PA_SU_PERFCOUNTER3_LO"
7358    "name": "PA_SU_PERFCOUNTER3_HI",
7364    "name": "PA_SC_PERFCOUNTER0_LO"
7369    "name": "PA_SC_PERFCOUNTER0_HI"
7374    "name": "PA_SC_PERFCOUNTER1_LO"
7379    "name": "PA_SC_PERFCOUNTER1_HI"
7384    "name": "PA_SC_PERFCOUNTER2_LO"
7389    "name": "PA_SC_PERFCOUNTER2_HI"
7394    "name": "PA_SC_PERFCOUNTER3_LO"
7399    "name": "PA_SC_PERFCOUNTER3_HI"
7404    "name": "PA_SC_PERFCOUNTER4_LO"
7409    "name": "PA_SC_PERFCOUNTER4_HI"
7414    "name": "PA_SC_PERFCOUNTER5_LO"
7419    "name": "PA_SC_PERFCOUNTER5_HI"
7424    "name": "PA_SC_PERFCOUNTER6_LO"
7429    "name": "PA_SC_PERFCOUNTER6_HI"
7434    "name": "PA_SC_PERFCOUNTER7_LO"
7439    "name": "PA_SC_PERFCOUNTER7_HI"
7444    "name": "SPI_PERFCOUNTER0_HI"
7449    "name": "SPI_PERFCOUNTER0_LO"
7454    "name": "SPI_PERFCOUNTER1_HI"
7459    "name": "SPI_PERFCOUNTER1_LO"
7464    "name": "SPI_PERFCOUNTER2_HI"
7469    "name": "SPI_PERFCOUNTER2_LO"
7474    "name": "SPI_PERFCOUNTER3_HI"
7479    "name": "SPI_PERFCOUNTER3_LO"
7484    "name": "SPI_PERFCOUNTER4_HI"
7489    "name": "SPI_PERFCOUNTER4_LO"
7494    "name": "SPI_PERFCOUNTER5_HI"
7499    "name": "SPI_PERFCOUNTER5_LO"
7504    "name": "SQ_PERFCOUNTER0_LO"
7509    "name": "SQ_PERFCOUNTER0_HI"
7514    "name": "SQ_PERFCOUNTER1_LO"
7519    "name": "SQ_PERFCOUNTER1_HI"
7524    "name": "SQ_PERFCOUNTER2_LO"
7529    "name": "SQ_PERFCOUNTER2_HI"
7534    "name": "SQ_PERFCOUNTER3_LO"
7539    "name": "SQ_PERFCOUNTER3_HI"
7544    "name": "SQ_PERFCOUNTER4_LO"
7549    "name": "SQ_PERFCOUNTER4_HI"
7554    "name": "SQ_PERFCOUNTER5_LO"
7559    "name": "SQ_PERFCOUNTER5_HI"
7564    "name": "SQ_PERFCOUNTER6_LO"
7569    "name": "SQ_PERFCOUNTER6_HI"
7574    "name": "SQ_PERFCOUNTER7_LO"
7579    "name": "SQ_PERFCOUNTER7_HI"
7584    "name": "SQ_PERFCOUNTER8_LO"
7589    "name": "SQ_PERFCOUNTER8_HI"
7594    "name": "SQ_PERFCOUNTER9_LO"
7599    "name": "SQ_PERFCOUNTER9_HI"
7604    "name": "SQ_PERFCOUNTER10_LO"
7609    "name": "SQ_PERFCOUNTER10_HI"
7614    "name": "SQ_PERFCOUNTER11_LO"
7619    "name": "SQ_PERFCOUNTER11_HI"
7624    "name": "SQ_PERFCOUNTER12_LO"
7629    "name": "SQ_PERFCOUNTER12_HI"
7634    "name": "SQ_PERFCOUNTER13_LO"
7639    "name": "SQ_PERFCOUNTER13_HI"
7644    "name": "SQ_PERFCOUNTER14_LO"
7649    "name": "SQ_PERFCOUNTER14_HI"
7654    "name": "SQ_PERFCOUNTER15_LO"
7659    "name": "SQ_PERFCOUNTER15_HI"
7664    "name": "SX_PERFCOUNTER0_LO"
7669    "name": "SX_PERFCOUNTER0_HI"
7674    "name": "SX_PERFCOUNTER1_LO"
7679    "name": "SX_PERFCOUNTER1_HI"
7684    "name": "SX_PERFCOUNTER2_LO"
7689    "name": "SX_PERFCOUNTER2_HI"
7694    "name": "SX_PERFCOUNTER3_LO"
7699    "name": "SX_PERFCOUNTER3_HI"
7704    "name": "GDS_PERFCOUNTER0_LO"
7709    "name": "GDS_PERFCOUNTER0_HI"
7714    "name": "GDS_PERFCOUNTER1_LO"
7719    "name": "GDS_PERFCOUNTER1_HI"
7724    "name": "GDS_PERFCOUNTER2_LO"
7729    "name": "GDS_PERFCOUNTER2_HI"
7734    "name": "GDS_PERFCOUNTER3_LO"
7739    "name": "GDS_PERFCOUNTER3_HI"
7744    "name": "TA_PERFCOUNTER0_LO"
7749    "name": "TA_PERFCOUNTER0_HI"
7754    "name": "TA_PERFCOUNTER1_LO"
7759    "name": "TA_PERFCOUNTER1_HI"
7764    "name": "TD_PERFCOUNTER0_LO"
7769    "name": "TD_PERFCOUNTER0_HI"
7774    "name": "TD_PERFCOUNTER1_LO"
7779    "name": "TD_PERFCOUNTER1_HI"
7784    "name": "TCP_PERFCOUNTER0_LO"
7789    "name": "TCP_PERFCOUNTER0_HI"
7794    "name": "TCP_PERFCOUNTER1_LO"
7799    "name": "TCP_PERFCOUNTER1_HI"
7804    "name": "TCP_PERFCOUNTER2_LO"
7809    "name": "TCP_PERFCOUNTER2_HI"
7814    "name": "TCP_PERFCOUNTER3_LO"
7819    "name": "TCP_PERFCOUNTER3_HI"
7824    "name": "TCC_PERFCOUNTER0_LO"
7829    "name": "TCC_PERFCOUNTER0_HI"
7834    "name": "TCC_PERFCOUNTER1_LO"
7839    "name": "TCC_PERFCOUNTER1_HI"
7844    "name": "TCC_PERFCOUNTER2_LO"
7849    "name": "TCC_PERFCOUNTER2_HI"
7854    "name": "TCC_PERFCOUNTER3_LO"
7859    "name": "TCC_PERFCOUNTER3_HI"
7864    "name": "TCA_PERFCOUNTER0_LO"
7869    "name": "TCA_PERFCOUNTER0_HI"
7874    "name": "TCA_PERFCOUNTER1_LO"
7879    "name": "TCA_PERFCOUNTER1_HI"
7884    "name": "TCA_PERFCOUNTER2_LO"
7889    "name": "TCA_PERFCOUNTER2_HI"
7894    "name": "TCA_PERFCOUNTER3_LO"
7899    "name": "TCA_PERFCOUNTER3_HI"
7904    "name": "TCS_PERFCOUNTER0_LO"
7909    "name": "TCS_PERFCOUNTER0_HI"
7914    "name": "TCS_PERFCOUNTER1_LO"
7919    "name": "TCS_PERFCOUNTER1_HI"
7924    "name": "TCS_PERFCOUNTER2_LO"
7929    "name": "TCS_PERFCOUNTER2_HI"
7934    "name": "TCS_PERFCOUNTER3_LO"
7939    "name": "TCS_PERFCOUNTER3_HI"
7944    "name": "CB_PERFCOUNTER0_LO"
7949    "name": "CB_PERFCOUNTER0_HI"
7954    "name": "CB_PERFCOUNTER1_LO"
7959    "name": "CB_PERFCOUNTER1_HI"
7964    "name": "CB_PERFCOUNTER2_LO"
7969    "name": "CB_PERFCOUNTER2_HI"
7974    "name": "CB_PERFCOUNTER3_LO"
7979    "name": "CB_PERFCOUNTER3_HI"
7984    "name": "DB_PERFCOUNTER0_LO"
7989    "name": "DB_PERFCOUNTER0_HI"
7994    "name": "DB_PERFCOUNTER1_LO"
7999    "name": "DB_PERFCOUNTER1_HI"
8004    "name": "DB_PERFCOUNTER2_LO"
8009    "name": "DB_PERFCOUNTER2_HI"
8014    "name": "DB_PERFCOUNTER3_LO"
8019    "name": "DB_PERFCOUNTER3_HI"
8024    "name": "RLC_PERFCOUNTER0_LO"
8029    "name": "RLC_PERFCOUNTER0_HI"
8034    "name": "RLC_PERFCOUNTER1_LO"
8039    "name": "RLC_PERFCOUNTER1_HI"
8044    "name": "CPG_PERFCOUNTER1_SELECT",
8050    "name": "CPG_PERFCOUNTER0_SELECT1",
8056    "name": "CPG_PERFCOUNTER0_SELECT",
8062    "name": "CPC_PERFCOUNTER1_SELECT",
8068    "name": "CPC_PERFCOUNTER0_SELECT1",
8074    "name": "CPF_PERFCOUNTER1_SELECT",
8080    "name": "CPF_PERFCOUNTER0_SELECT1",
8086    "name": "CPF_PERFCOUNTER0_SELECT",
8092    "name": "CP_PERFMON_CNTL",
8098    "name": "CPC_PERFCOUNTER0_SELECT",
8104    "name": "CP_DRAW_OBJECT"
8109    "name": "CP_DRAW_OBJECT_COUNTER",
8115    "name": "CP_DRAW_WINDOW_MASK_HI"
8120    "name": "CP_DRAW_WINDOW_HI"
8125    "name": "CP_DRAW_WINDOW_LO",
8131    "name": "CP_DRAW_WINDOW_CNTL",
8137    "name": "GRBM_PERFCOUNTER0_SELECT",
8143    "name": "GRBM_PERFCOUNTER1_SELECT",
8149    "name": "GRBM_SE0_PERFCOUNTER_SELECT",
8155    "name": "GRBM_SE1_PERFCOUNTER_SELECT",
8161    "name": "GRBM_SE2_PERFCOUNTER_SELECT",
8167    "name": "GRBM_SE3_PERFCOUNTER_SELECT",
8173    "name": "WD_PERFCOUNTER0_SELECT",
8179    "name": "WD_PERFCOUNTER1_SELECT",
8185    "name": "WD_PERFCOUNTER2_SELECT",
8191    "name": "WD_PERFCOUNTER3_SELECT",
8197    "name": "IA_PERFCOUNTER0_SELECT",
8203    "name": "IA_PERFCOUNTER1_SELECT",
8209    "name": "IA_PERFCOUNTER2_SELECT",
8215    "name": "IA_PERFCOUNTER3_SELECT",
8221    "name": "IA_PERFCOUNTER0_SELECT1",
8227    "name": "VGT_PERFCOUNTER0_SELECT",
8233    "name": "VGT_PERFCOUNTER1_SELECT",
8239    "name": "VGT_PERFCOUNTER2_SELECT",
8245    "name": "VGT_PERFCOUNTER3_SELECT",
8251    "name": "VGT_PERFCOUNTER0_SELECT1",
8257    "name": "VGT_PERFCOUNTER1_SELECT1",
8263    "name": "VGT_PERFCOUNTER_SEID_MASK",
8269    "name": "PA_SU_PERFCOUNTER0_SELECT",
8275    "name": "PA_SU_PERFCOUNTER0_SELECT1",
8281    "name": "PA_SU_PERFCOUNTER1_SELECT",
8287    "name": "PA_SU_PERFCOUNTER1_SELECT1",
8293    "name": "PA_SU_PERFCOUNTER2_SELECT",
8299    "name": "PA_SU_PERFCOUNTER3_SELECT",
8305    "name": "PA_SC_PERFCOUNTER0_SELECT",
8311    "name": "PA_SC_PERFCOUNTER0_SELECT1",
8317    "name": "PA_SC_PERFCOUNTER1_SELECT",
8323    "name": "PA_SC_PERFCOUNTER2_SELECT",
8329    "name": "PA_SC_PERFCOUNTER3_SELECT",
8335    "name": "PA_SC_PERFCOUNTER4_SELECT",
8341    "name": "PA_SC_PERFCOUNTER5_SELECT",
8347    "name": "PA_SC_PERFCOUNTER6_SELECT",
8353    "name": "PA_SC_PERFCOUNTER7_SELECT",
8359    "name": "SPI_PERFCOUNTER0_SELECT",
8365    "name": "SPI_PERFCOUNTER1_SELECT",
8371    "name": "SPI_PERFCOUNTER2_SELECT",
8377    "name": "SPI_PERFCOUNTER3_SELECT",
8383    "name": "SPI_PERFCOUNTER0_SELECT1",
8389    "name": "SPI_PERFCOUNTER1_SELECT1",
8395    "name": "SPI_PERFCOUNTER2_SELECT1",
8401    "name": "SPI_PERFCOUNTER3_SELECT1",
8407    "name": "SPI_PERFCOUNTER4_SELECT",
8413    "name": "SPI_PERFCOUNTER5_SELECT",
8419    "name": "SPI_PERFCOUNTER_BINS",
8425    "name": "SQ_PERFCOUNTER0_SELECT",
8431    "name": "SQ_PERFCOUNTER1_SELECT",
8437    "name": "SQ_PERFCOUNTER2_SELECT",
8443    "name": "SQ_PERFCOUNTER3_SELECT",
8449    "name": "SQ_PERFCOUNTER4_SELECT",
8455    "name": "SQ_PERFCOUNTER5_SELECT",
8461    "name": "SQ_PERFCOUNTER6_SELECT",
8467    "name": "SQ_PERFCOUNTER7_SELECT",
8473    "name": "SQ_PERFCOUNTER8_SELECT",
8479    "name": "SQ_PERFCOUNTER9_SELECT",
8485    "name": "SQ_PERFCOUNTER10_SELECT",
8491    "name": "SQ_PERFCOUNTER11_SELECT",
8497    "name": "SQ_PERFCOUNTER12_SELECT",
8503    "name": "SQ_PERFCOUNTER13_SELECT",
8509    "name": "SQ_PERFCOUNTER14_SELECT",
8515    "name": "SQ_PERFCOUNTER15_SELECT",
8521    "name": "SQ_PERFCOUNTER_CTRL",
8527    "name": "SQ_PERFCOUNTER_MASK",
8533    "name": "SQ_PERFCOUNTER_CTRL2",
8539    "name": "SX_PERFCOUNTER0_SELECT",
8545    "name": "SX_PERFCOUNTER1_SELECT",
8551    "name": "SX_PERFCOUNTER2_SELECT",
8557    "name": "SX_PERFCOUNTER3_SELECT",
8563    "name": "SX_PERFCOUNTER0_SELECT1",
8569    "name": "SX_PERFCOUNTER1_SELECT1",
8575    "name": "GDS_PERFCOUNTER0_SELECT",
8581    "name": "GDS_PERFCOUNTER1_SELECT",
8587    "name": "GDS_PERFCOUNTER2_SELECT",
8593    "name": "GDS_PERFCOUNTER3_SELECT",
8599    "name": "GDS_PERFCOUNTER0_SELECT1",
8605    "name": "TA_PERFCOUNTER0_SELECT",
8611    "name": "TA_PERFCOUNTER0_SELECT1",
8617    "name": "TA_PERFCOUNTER1_SELECT",
8623    "name": "TD_PERFCOUNTER0_SELECT",
8629    "name": "TD_PERFCOUNTER0_SELECT1",
8635    "name": "TD_PERFCOUNTER1_SELECT",
8641    "name": "TCP_PERFCOUNTER0_SELECT",
8647    "name": "TCP_PERFCOUNTER0_SELECT1",
8653    "name": "TCP_PERFCOUNTER1_SELECT",
8659    "name": "TCP_PERFCOUNTER1_SELECT1",
8665    "name": "TCP_PERFCOUNTER2_SELECT",
8671    "name": "TCP_PERFCOUNTER3_SELECT",
8677    "name": "TCC_PERFCOUNTER0_SELECT",
8683    "name": "TCC_PERFCOUNTER0_SELECT1",
8689    "name": "TCC_PERFCOUNTER1_SELECT",
8695    "name": "TCC_PERFCOUNTER1_SELECT1",
8701    "name": "TCC_PERFCOUNTER2_SELECT",
8707    "name": "TCC_PERFCOUNTER3_SELECT",
8713    "name": "TCA_PERFCOUNTER0_SELECT",
8719    "name": "TCA_PERFCOUNTER0_SELECT1",
8725    "name": "TCA_PERFCOUNTER1_SELECT",
8731    "name": "TCA_PERFCOUNTER1_SELECT1",
8737    "name": "TCA_PERFCOUNTER2_SELECT",
8743    "name": "TCA_PERFCOUNTER3_SELECT",
8749    "name": "TCS_PERFCOUNTER0_SELECT",
8755    "name": "TCS_PERFCOUNTER0_SELECT1",
8761    "name": "TCS_PERFCOUNTER1_SELECT",
8767    "name": "TCS_PERFCOUNTER2_SELECT",
8773    "name": "TCS_PERFCOUNTER3_SELECT",
8779    "name": "CB_PERFCOUNTER_FILTER",
8785    "name": "CB_PERFCOUNTER0_SELECT",
8791    "name": "CB_PERFCOUNTER0_SELECT1",
8797    "name": "CB_PERFCOUNTER1_SELECT",
8803    "name": "CB_PERFCOUNTER2_SELECT",
8809    "name": "CB_PERFCOUNTER3_SELECT",
8815    "name": "DB_PERFCOUNTER0_SELECT",
8821    "name": "DB_PERFCOUNTER0_SELECT1",
8827    "name": "DB_PERFCOUNTER1_SELECT",
8833    "name": "DB_PERFCOUNTER1_SELECT1",
8839    "name": "DB_PERFCOUNTER2_SELECT",
8845    "name": "DB_PERFCOUNTER3_SELECT",
8851    "name": "RLC_SPM_PERFMON_CNTL",
8857    "name": "RLC_SPM_PERFMON_RING_BASE_LO"
8862    "name": "RLC_SPM_PERFMON_RING_BASE_HI",
8868    "name": "RLC_SPM_PERFMON_RING_SIZE"
8873    "name": "RLC_SPM_PERFMON_SEGMENT_SIZE",
8879    "name": "RLC_SPM_SE_MUXSEL_ADDR"
8884    "name": "RLC_SPM_SE_MUXSEL_DATA"
8889    "name": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY",
8895    "name": "RLC_SPM_CPC_PERFMON_SAMPLE_DELAY",
8901    "name": "RLC_SPM_CPF_PERFMON_SAMPLE_DELAY",
8907    "name": "RLC_SPM_CB_PERFMON_SAMPLE_DELAY",
8913    "name": "RLC_SPM_DB_PERFMON_SAMPLE_DELAY",
8919    "name": "RLC_SPM_PA_PERFMON_SAMPLE_DELAY",
8925    "name": "RLC_SPM_GDS_PERFMON_SAMPLE_DELAY",
8931    "name": "RLC_SPM_IA_PERFMON_SAMPLE_DELAY",
8937    "name": "RLC_SPM_SC_PERFMON_SAMPLE_DELAY",
8943    "name": "RLC_SPM_TCC_PERFMON_SAMPLE_DELAY",
8949    "name": "RLC_SPM_TCA_PERFMON_SAMPLE_DELAY",
8955    "name": "RLC_SPM_TCP_PERFMON_SAMPLE_DELAY",
8961    "name": "RLC_SPM_TA_PERFMON_SAMPLE_DELAY",
8967    "name": "RLC_SPM_TD_PERFMON_SAMPLE_DELAY",
8973    "name": "RLC_SPM_VGT_PERFMON_SAMPLE_DELAY",
8979    "name": "RLC_SPM_SPI_PERFMON_SAMPLE_DELAY",
8985    "name": "RLC_SPM_SQG_PERFMON_SAMPLE_DELAY",
8991    "name": "RLC_SPM_TCS_PERFMON_SAMPLE_DELAY",
8997    "name": "RLC_SPM_SX_PERFMON_SAMPLE_DELAY",
9003    "name": "RLC_SPM_GLOBAL_MUXSEL_ADDR"
9008    "name": "RLC_SPM_GLOBAL_MUXSEL_DATA"
9013    "name": "RLC_SPM_RING_RDPTR"
9018    "name": "RLC_SPM_SEGMENT_THRESHOLD"
9023    "name": "RLC_SPM_DBR0_PERFMON_SAMPLE_DELAY",
9029    "name": "RLC_SPM_DBR1_PERFMON_SAMPLE_DELAY",
9035    "name": "RLC_SPM_CBR0_PERFMON_SAMPLE_DELAY",
9041    "name": "RLC_SPM_CBR1_PERFMON_SAMPLE_DELAY",
9047    "name": "RLC_PERFMON_CNTL",
9053    "name": "RLC_PERFCOUNTER0_SELECT",
9059    "name": "RLC_PERFCOUNTER1_SELECT",
9066     {"bits": [0, 4], "enum_ref": "BlendOp", "name": "COLOR_SRCBLEND"},
9067     {"bits": [5, 7], "enum_ref": "CombFunc", "name": "COLOR_COMB_FCN"},
9068     {"bits": [8, 12], "enum_ref": "BlendOp", "name": "COLOR_DESTBLEND"},
9069     {"bits": [16, 20], "enum_ref": "BlendOp", "name": "ALPHA_SRCBLEND"},
9070     {"bits": [21, 23], "enum_ref": "CombFunc", "name": "ALPHA_COMB_FCN"},
9071     {"bits": [24, 28], "enum_ref": "BlendOp", "name": "ALPHA_DESTBLEND"},
9072     {"bits": [29, 29], "name": "SEPARATE_ALPHA_BLEND"},
9073     {"bits": [30, 30], "name": "ENABLE"},
9074     {"bits": [31, 31], "name": "DISABLE_ROP3"}
9079     {"bits": [0, 4], "name": "TILE_MODE_INDEX"},
9080     {"bits": [5, 9], "name": "FMASK_TILE_MODE_INDEX"},
9081     {"bits": [10, 11], "name": "FMASK_BANK_HEIGHT"},
9082     {"bits": [12, 14], "name": "NUM_SAMPLES"},
9083     {"bits": [15, 16], "name": "NUM_FRAGMENTS"},
9084     {"bits": [17, 17], "name": "FORCE_DST_ALPHA_1"}
9089     {"bits": [0, 13], "name": "TILE_MAX"}
9094     {"bits": [0, 1], "enum_ref": "SurfaceEndian", "name": "ENDIAN"},
9095     {"bits": [2, 6], "enum_ref": "ColorFormat", "name": "FORMAT"},
9096     {"bits": [7, 7], "name": "LINEAR_GENERAL"},
9097     {"bits": [8, 10], "enum_ref": "SurfaceNumber", "name": "NUMBER_TYPE"},
9098     {"bits": [11, 12], "enum_ref": "SurfaceSwap", "name": "COMP_SWAP"},
9099     {"bits": [13, 13], "name": "FAST_CLEAR"},
9100     {"bits": [14, 14], "name": "COMPRESSION"},
9101     {"bits": [15, 15], "name": "BLEND_CLAMP"},
9102     {"bits": [16, 16], "name": "BLEND_BYPASS"},
9103     {"bits": [17, 17], "name": "SIMPLE_FLOAT"},
9104     {"bits": [18, 18], "name": "ROUND_MODE"},
9105     {"bits": [19, 19], "name": "CMASK_IS_LINEAR"},
9106     {"bits": [20, 22], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DONT_RD_DST"},
9107     {"bits": [23, 25], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DISCARD_PIXEL"},
9108     {"bits": [26, 26], "name": "FMASK_COMPRESSION_DISABLE"}
9113     {"bits": [0, 10], "name": "TILE_MAX"},
9114     {"bits": [20, 30], "name": "FMASK_TILE_MAX"}
9119     {"bits": [0, 21], "name": "TILE_MAX"}
9124     {"bits": [0, 10], "name": "SLICE_START"},
9125     {"bits": [13, 23], "name": "SLICE_MAX"}
9130     {"bits": [3, 3], "name": "DEGAMMA_ENABLE"},
9131     {"bits": [4, 6], "enum_ref": "CBMode", "name": "MODE"},
9132     {"bits": [16, 23], "enum_ref": "ROP3", "name": "ROP3"}
9137     {"bits": [0, 8], "name": "PERF_SEL"},
9138     {"bits": [10, 18], "name": "PERF_SEL1"},
9139     {"bits": [20, 23], "name": "CNTR_MODE"},
9140     {"bits": [24, 27], "name": "PERF_MODE1"},
9141     {"bits": [28, 31], "name": "PERF_MODE"}
9146     {"bits": [0, 8], "name": "PERF_SEL2"},
9147     {"bits": [10, 18], "name": "PERF_SEL3"},
9148     {"bits": [24, 27], "name": "PERF_MODE3"},
9149     {"bits": [28, 31], "name": "PERF_MODE2"}
9154     {"bits": [0, 8], "name": "PERF_SEL"},
9155     {"bits": [28, 31], "name": "PERF_MODE"}
9160     {"bits": [0, 0], "name": "OP_FILTER_ENABLE"},
9161     {"bits": [1, 3], "enum_ref": "CBPerfOpFilterSel", "name": "OP_FILTER_SEL"},
9162     {"bits": [4, 4], "name": "FORMAT_FILTER_ENABLE"},
9163     {"bits": [5, 9], "name": "FORMAT_FILTER_SEL"},
9164     {"bits": [10, 10], "name": "CLEAR_FILTER_ENABLE"},
9165     {"bits": [11, 11], "enum_ref": "CBPerfClearFilterSel", "name": "CLEAR_FILTER_SEL"},
9166     {"bits": [12, 12], "name": "MRT_FILTER_ENABLE"},
9167     {"bits": [13, 15], "name": "MRT_FILTER_SEL"},
9168     {"bits": [17, 17], "name": "NUM_SAMPLES_FILTER_ENABLE"},
9169     {"bits": [18, 20], "name": "NUM_SAMPLES_FILTER_SEL"},
9170     {"bits": [21, 21], "name": "NUM_FRAGMENTS_FILTER_ENABLE"},
9171     {"bits": [22, 23], "name": "NUM_FRAGMENTS_FILTER_SEL"}
9176     {"bits": [0, 3], "name": "OUTPUT0_ENABLE"},
9177     {"bits": [4, 7], "name": "OUTPUT1_ENABLE"},
9178     {"bits": [8, 11], "name": "OUTPUT2_ENABLE"},
9179     {"bits": [12, 15], "name": "OUTPUT3_ENABLE"},
9180     {"bits": [16, 19], "name": "OUTPUT4_ENABLE"},
9181     {"bits": [20, 23], "name": "OUTPUT5_ENABLE"},
9182     {"bits": [24, 27], "name": "OUTPUT6_ENABLE"},
9183     {"bits": [28, 31], "name": "OUTPUT7_ENABLE"}
9188     {"bits": [0, 3], "name": "TARGET0_ENABLE"},
9189     {"bits": [4, 7], "name": "TARGET1_ENABLE"},
9190     {"bits": [8, 11], "name": "TARGET2_ENABLE"},
9191     {"bits": [12, 15], "name": "TARGET3_ENABLE"},
9192     {"bits": [16, 19], "name": "TARGET4_ENABLE"},
9193     {"bits": [20, 23], "name": "TARGET5_ENABLE"},
9194     {"bits": [24, 27], "name": "TARGET6_ENABLE"},
9195     {"bits": [28, 31], "name": "TARGET7_ENABLE"}
9200     {"bits": [0, 0], "name": "COMPUTE_SHADER_EN"},
9201     {"bits": [1, 1], "name": "PARTIAL_TG_EN"},
9202     {"bits": [2, 2], "name": "FORCE_START_AT_000"},
9203     {"bits": [3, 3], "name": "ORDERED_APPEND_ENBL"},
9204     {"bits": [4, 4], "name": "ORDERED_APPEND_MODE"},
9205     {"bits": [5, 5], "name": "USE_THREAD_DIMENSIONS"},
9206     {"bits": [6, 6], "name": "ORDER_MODE"},
9207     {"bits": [7, 9], "name": "DISPATCH_CACHE_CNTL"},
9208     {"bits": [10, 10], "name": "SCALAR_L1_INV_VOL"},
9209     {"bits": [11, 11], "name": "VECTOR_L1_INV_VOL"},
9210     {"bits": [12, 12], "name": "DATA_ATC"},
9211     {"bits": [14, 14], "name": "RESTORE"}
9216     {"bits": [0, 1], "name": "SEND_SEID"},
9217     {"bits": [2, 2], "name": "RESERVED2"},
9218     {"bits": [3, 3], "name": "RESERVED3"},
9219     {"bits": [4, 4], "name": "RESERVED4"}
9224     {"bits": [0, 15], "name": "NUM_THREAD_FULL"},
9225     {"bits": [16, 31], "name": "NUM_THREAD_PARTIAL"}
9230     {"bits": [0, 0], "name": "PERFCOUNT_ENABLE"}
9235     {"bits": [0, 7], "name": "DATA"},
9236     {"bits": [8, 8], "name": "INST_ATC"}
9241     {"bits": [0, 5], "name": "VGPRS"},
9242     {"bits": [6, 9], "name": "SGPRS"},
9243     {"bits": [10, 11], "name": "PRIORITY"},
9244     {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
9245     {"bits": [20, 20], "name": "PRIV"},
9246     {"bits": [21, 21], "name": "DX10_CLAMP"},
9247     {"bits": [22, 22], "name": "DEBUG_MODE"},
9248     {"bits": [23, 23], "name": "IEEE_MODE"},
9249     {"bits": [24, 24], "name": "BULKY"},
9250     {"bits": [25, 25], "name": "CDBG_USER"}
9255     {"bits": [0, 0], "name": "SCRATCH_EN"},
9256     {"bits": [1, 5], "name": "USER_SGPR"},
9257     {"bits": [6, 6], "name": "TRAP_PRESENT"},
9258     {"bits": [7, 7], "name": "TGID_X_EN"},
9259     {"bits": [8, 8], "name": "TGID_Y_EN"},
9260     {"bits": [9, 9], "name": "TGID_Z_EN"},
9261     {"bits": [10, 10], "name": "TG_SIZE_EN"},
9262     {"bits": [11, 12], "name": "TIDIG_COMP_CNT"},
9263     {"bits": [13, 14], "name": "EXCP_EN_MSB"},
9264     {"bits": [15, 23], "name": "LDS_SIZE"},
9265     {"bits": [24, 30], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
9270     {"bits": [0, 0], "name": "PIPELINESTAT_ENABLE"}
9275     {"bits": [0, 9], "name": "WAVES_PER_SH"},
9276     {"bits": [12, 15], "name": "TG_PER_CU"},
9277     {"bits": [16, 21], "name": "LOCK_THRESHOLD"},
9278     {"bits": [22, 22], "name": "SIMD_DEST_CNTL"},
9279     {"bits": [23, 23], "name": "FORCE_SIMD_DIST"},
9280     {"bits": [24, 26], "name": "CU_GROUP_COUNT"}
9285     {"bits": [0, 15], "name": "SH0_CU_EN"},
9286     {"bits": [16, 31], "name": "SH1_CU_EN"}
9291     {"bits": [0, 7], "name": "DATA"}
9296     {"bits": [0, 0], "name": "THREAD_TRACE_ENABLE"}
9301     {"bits": [0, 11], "name": "WAVES"},
9302     {"bits": [12, 24], "name": "WAVESIZE"}
9307     {"bits": [0, 3], "name": "DATA"}
9312     {"bits": [0, 5], "name": "PERF_SEL"},
9313     {"bits": [10, 15], "name": "PERF_SEL1"},
9314     {"bits": [20, 23], "name": "CNTR_MODE"}
9319     {"bits": [0, 5], "name": "PERF_SEL2"},
9320     {"bits": [10, 15], "name": "PERF_SEL3"}
9325     {"bits": [0, 5], "name": "PERF_SEL"}
9330     {"bits": [0, 15], "name": "MEM_ADDR_HI"},
9331     {"bits": [16, 16], "name": "CS_PS_SEL"},
9332     {"bits": [29, 31], "name": "COMMAND"}
9337     {"bits": [2, 31], "name": "MEM_ADDR_LO"}
9342     {"bits": [0, 15], "name": "IB1_BASE_HI"}
9347     {"bits": [2, 31], "name": "IB1_BASE_LO"}
9352     {"bits": [0, 19], "name": "IB1_BUFSZ"}
9357     {"bits": [0, 15], "name": "IB2_BASE_HI"}
9362     {"bits": [2, 31], "name": "IB2_BASE_LO"}
9367     {"bits": [0, 19], "name": "IB2_BUFSZ"}
9372     {"bits": [0, 15], "name": "INIT_BASE_HI"}
9377     {"bits": [5, 31], "name": "INIT_BASE_LO"}
9382     {"bits": [0, 11], "name": "INIT_BUFSZ"}
9387     {"bits": [0, 7], "name": "COHER_BASE_HI_256B"}
9392     {"bits": [0, 0], "name": "DEST_BASE_0_ENA"},
9393     {"bits": [1, 1], "name": "DEST_BASE_1_ENA"},
9394     {"bits": [6, 6], "name": "CB0_DEST_BASE_ENA"},
9395     {"bits": [7, 7], "name": "CB1_DEST_BASE_ENA"},
9396     {"bits": [8, 8], "name": "CB2_DEST_BASE_ENA"},
9397     {"bits": [9, 9], "name": "CB3_DEST_BASE_ENA"},
9398     {"bits": [10, 10], "name": "CB4_DEST_BASE_ENA"},
9399     {"bits": [11, 11], "name": "CB5_DEST_BASE_ENA"},
9400     {"bits": [12, 12], "name": "CB6_DEST_BASE_ENA"},
9401     {"bits": [13, 13], "name": "CB7_DEST_BASE_ENA"},
9402     {"bits": [14, 14], "name": "DB_DEST_BASE_ENA"},
9403     {"bits": [15, 15], "name": "TCL1_VOL_ACTION_ENA"},
9404     {"bits": [16, 16], "name": "TC_VOL_ACTION_ENA"},
9405     {"bits": [18, 18], "name": "TC_WB_ACTION_ENA"},
9406     {"bits": [19, 19], "name": "DEST_BASE_2_ENA"},
9407     {"bits": [21, 21], "name": "DEST_BASE_3_ENA"},
9408     {"bits": [22, 22], "name": "TCL1_ACTION_ENA"},
9409     {"bits": [23, 23], "name": "TC_ACTION_ENA"},
9410     {"bits": [25, 25], "name": "CB_ACTION_ENA"},
9411     {"bits": [26, 26], "name": "DB_ACTION_ENA"},
9412     {"bits": [27, 27], "name": "SH_KCACHE_ACTION_ENA"},
9413     {"bits": [28, 28], "name": "SH_KCACHE_VOL_ACTION_ENA"},
9414     {"bits": [29, 29], "name": "SH_ICACHE_ACTION_ENA"}
9419     {"bits": [0, 7], "name": "COHER_SIZE_HI_256B"}
9424     {"bits": [0, 5], "name": "START_DELAY_COUNT"}
9429     {"bits": [0, 7], "name": "MATCHING_GFX_CNTX"},
9430     {"bits": [24, 25], "name": "MEID"},
9431     {"bits": [30, 30], "name": "PHASE1_STATUS"},
9432     {"bits": [31, 31], "name": "STATUS"}
9437     {"bits": [0, 0], "name": "MEC1_LOAD_BUSY"},
9438     {"bits": [1, 1], "name": "MEC1_SEMAPOHRE_BUSY"},
9439     {"bits": [2, 2], "name": "MEC1_MUTEX_BUSY"},
9440     {"bits": [3, 3], "name": "MEC1_MESSAGE_BUSY"},
9441     {"bits": [4, 4], "name": "MEC1_EOP_QUEUE_BUSY"},
9442     {"bits": [5, 5], "name": "MEC1_IQ_QUEUE_BUSY"},
9443     {"bits": [6, 6], "name": "MEC1_IB_QUEUE_BUSY"},
9444     {"bits": [7, 7], "name": "MEC1_TC_BUSY"},
9445     {"bits": [8, 8], "name": "MEC1_DMA_BUSY"},
9446     {"bits": [9, 9], "name": "MEC1_PARTIAL_FLUSH_BUSY"},
9447     {"bits": [10, 10], "name": "MEC1_PIPE0_BUSY"},
9448     {"bits": [11, 11], "name": "MEC1_PIPE1_BUSY"},
9449     {"bits": [12, 12], "name": "MEC1_PIPE2_BUSY"},
9450     {"bits": [13, 13], "name": "MEC1_PIPE3_BUSY"},
9451     {"bits": [16, 16], "name": "MEC2_LOAD_BUSY"},
9452     {"bits": [17, 17], "name": "MEC2_SEMAPOHRE_BUSY"},
9453     {"bits": [18, 18], "name": "MEC2_MUTEX_BUSY"},
9454     {"bits": [19, 19], "name": "MEC2_MESSAGE_BUSY"},
9455     {"bits": [20, 20], "name": "MEC2_EOP_QUEUE_BUSY"},
9456     {"bits": [21, 21], "name": "MEC2_IQ_QUEUE_BUSY"},
9457     {"bits": [22, 22], "name": "MEC2_IB_QUEUE_BUSY"},
9458     {"bits": [23, 23], "name": "MEC2_TC_BUSY"},
9459     {"bits": [24, 24], "name": "MEC2_DMA_BUSY"},
9460     {"bits": [25, 25], "name": "MEC2_PARTIAL_FLUSH_BUSY"},
9461     {"bits": [26, 26], "name": "MEC2_PIPE0_BUSY"},
9462     {"bits": [27, 27], "name": "MEC2_PIPE1_BUSY"},
9463     {"bits": [28, 28], "name": "MEC2_PIPE2_BUSY"},
9464     {"bits": [29, 29], "name": "MEC2_PIPE3_BUSY"}
9469     {"bits": [0, 5], "name": "FREE_COUNT"}
9474     {"bits": [0, 3], "name": "COUNT"}
9479     {"bits": [0, 4], "name": "PACK_DELAY_CNT"}
9484     {"bits": [0, 7], "name": "SCRATCH_INDEX"}
9489     {"bits": [0, 0], "name": "MIU_RDREQ_FREE_STALL"},
9490     {"bits": [1, 1], "name": "MIU_WRREQ_FREE_STALL"},
9491     {"bits": [3, 3], "name": "RCIU_TX_FREE_STALL"},
9492     {"bits": [4, 4], "name": "RCIU_PRIV_VIOLATION"},
9493     {"bits": [6, 6], "name": "TCIU_TX_FREE_STALL"},
9494     {"bits": [8, 8], "name": "MEC1_DECODING_PACKET"},
9495     {"bits": [9, 9], "name": "MEC1_WAIT_ON_RCIU"},
9496     {"bits": [10, 10], "name": "MEC1_WAIT_ON_RCIU_READ"},
9497     {"bits": [11, 11], "name": "MEC1_WAIT_ON_MC_READ"},
9498     {"bits": [12, 12], "name": "MEC1_WAIT_ON_MC_WR_ACK"},
9499     {"bits": [13, 13], "name": "MEC1_WAIT_ON_ROQ_DATA"},
9500     {"bits": [16, 16], "name": "MEC2_DECODING_PACKET"},
9501     {"bits": [17, 17], "name": "MEC2_WAIT_ON_RCIU"},
9502     {"bits": [18, 18], "name": "MEC2_WAIT_ON_RCIU_READ"},
9503     {"bits": [19, 19], "name": "MEC2_WAIT_ON_MC_READ"},
9504     {"bits": [20, 20], "name": "MEC2_WAIT_ON_MC_WR_ACK"},
9505     {"bits": [21, 21], "name": "MEC2_WAIT_ON_ROQ_DATA"}
9510     {"bits": [0, 0], "name": "MEC1_BUSY"},
9511     {"bits": [1, 1], "name": "MEC2_BUSY"},
9512     {"bits": [2, 2], "name": "DC0_BUSY"},
9513     {"bits": [3, 3], "name": "DC1_BUSY"},
9514     {"bits": [4, 4], "name": "RCIU1_BUSY"},
9515     {"bits": [5, 5], "name": "RCIU2_BUSY"},
9516     {"bits": [6, 6], "name": "ROQ1_BUSY"},
9517     {"bits": [7, 7], "name": "ROQ2_BUSY"},
9518     {"bits": [8, 8], "name": "MIU_RDREQ_BUSY"},
9519     {"bits": [9, 9], "name": "MIU_WRREQ_BUSY"},
9520     {"bits": [10, 10], "name": "TCIU_BUSY"},
9521     {"bits": [11, 11], "name": "SCRATCH_RAM_BUSY"},
9522     {"bits": [12, 12], "name": "QU_BUSY"},
9523     {"bits": [29, 29], "name": "CPG_CPC_BUSY"},
9524     {"bits": [30, 30], "name": "CPF_CPC_BUSY"},
9525     {"bits": [31, 31], "name": "CPC_BUSY"}
9530     {"bits": [0, 0], "name": "REG_BUS_FIFO_BUSY"},
9531     {"bits": [1, 1], "name": "CSF_RING_BUSY"},
9532     {"bits": [2, 2], "name": "CSF_INDIRECT1_BUSY"},
9533     {"bits": [3, 3], "name": "CSF_INDIRECT2_BUSY"},
9534     {"bits": [4, 4], "name": "CSF_STATE_BUSY"},
9535     {"bits": [5, 5], "name": "CSF_CE_INDR1_BUSY"},
9536     {"bits": [6, 6], "name": "CSF_CE_INDR2_BUSY"},
9537     {"bits": [7, 7], "name": "CSF_ARBITER_BUSY"},
9538     {"bits": [8, 8], "name": "CSF_INPUT_BUSY"},
9539     {"bits": [9, 9], "name": "OUTSTANDING_READ_TAGS"},
9540     {"bits": [11, 11], "name": "HPD_PROCESSING_EOP_BUSY"},
9541     {"bits": [12, 12], "name": "HQD_DISPATCH_BUSY"},
9542     {"bits": [13, 13], "name": "HQD_IQ_TIMER_BUSY"},
9543     {"bits": [14, 14], "name": "HQD_DMA_OFFLOAD_BUSY"},
9544     {"bits": [15, 15], "name": "HQD_WAIT_SEMAPHORE_BUSY"},
9545     {"bits": [16, 16], "name": "HQD_SIGNAL_SEMAPHORE_BUSY"},
9546     {"bits": [17, 17], "name": "HQD_MESSAGE_BUSY"},
9547     {"bits": [18, 18], "name": "HQD_PQ_FETCHER_BUSY"},
9548     {"bits": [19, 19], "name": "HQD_IB_FETCHER_BUSY"},
9549     {"bits": [20, 20], "name": "HQD_IQ_FETCHER_BUSY"},
9550     {"bits": [21, 21], "name": "HQD_EOP_FETCHER_BUSY"},
9551     {"bits": [22, 22], "name": "HQD_CONSUMED_RPTR_BUSY"},
9552     {"bits": [23, 23], "name": "HQD_FETCHER_ARB_BUSY"},
9553     {"bits": [24, 24], "name": "HQD_ROQ_ALIGN_BUSY"},
9554     {"bits": [25, 25], "name": "HQD_ROQ_EOP_BUSY"},
9555     {"bits": [26, 26], "name": "HQD_ROQ_IQ_BUSY"},
9556     {"bits": [27, 27], "name": "HQD_ROQ_PQ_BUSY"},
9557     {"bits": [28, 28], "name": "HQD_ROQ_IB_BUSY"},
9558     {"bits": [29, 29], "name": "HQD_WPTR_POLL_BUSY"},
9559     {"bits": [30, 30], "name": "HQD_PQ_BUSY"},
9560     {"bits": [31, 31], "name": "HQD_IB_BUSY"}
9565     {"bits": [0, 0], "name": "RING_FETCHING_DATA"},
9566     {"bits": [1, 1], "name": "INDR1_FETCHING_DATA"},
9567     {"bits": [2, 2], "name": "INDR2_FETCHING_DATA"},
9568     {"bits": [3, 3], "name": "STATE_FETCHING_DATA"},
9569     {"bits": [4, 4], "name": "MIU_WAITING_ON_RDREQ_FREE"},
9570     {"bits": [5, 5], "name": "TCIU_WAITING_ON_FREE"},
9571     {"bits": [6, 6], "name": "TCIU_WAITING_ON_TAGS"}
9576     {"bits": [0, 0], "name": "POST_WPTR_GFX_BUSY"},
9577     {"bits": [1, 1], "name": "CSF_BUSY"},
9578     {"bits": [2, 2], "name": "MIU_RDREQ_BUSY"},
9579     {"bits": [3, 3], "name": "MIU_WRREQ_BUSY"},
9580     {"bits": [4, 4], "name": "ROQ_ALIGN_BUSY"},
9581     {"bits": [5, 5], "name": "ROQ_RING_BUSY"},
9582     {"bits": [6, 6], "name": "ROQ_INDIRECT1_BUSY"},
9583     {"bits": [7, 7], "name": "ROQ_INDIRECT2_BUSY"},
9584     {"bits": [8, 8], "name": "ROQ_STATE_BUSY"},
9585     {"bits": [9, 9], "name": "ROQ_CE_RING_BUSY"},
9586     {"bits": [10, 10], "name": "ROQ_CE_INDIRECT1_BUSY"},
9587     {"bits": [11, 11], "name": "ROQ_CE_INDIRECT2_BUSY"},
9588     {"bits": [12, 12], "name": "SEMAPHORE_BUSY"},
9589     {"bits": [13, 13], "name": "INTERRUPT_BUSY"},
9590     {"bits": [14, 14], "name": "TCIU_BUSY"},
9591     {"bits": [15, 15], "name": "HQD_BUSY"},
9592     {"bits": [30, 30], "name": "CPC_CPF_BUSY"},
9593     {"bits": [31, 31], "name": "CPF_BUSY"}
9598     {"bits": [4, 5], "name": "MIN_AVAILSZ"},
9599     {"bits": [16, 19], "name": "BUFFER_DEPTH"},
9600     {"bits": [28, 28], "name": "PIO_FIFO_EMPTY"},
9601     {"bits": [29, 29], "name": "PIO_FIFO_FULL"},
9602     {"bits": [30, 31], "name": "PIO_COUNT"}
9607     {"bits": [0, 20], "name": "BYTE_COUNT"},
9608     {"bits": [21, 21], "name": "DIS_WC"},
9609     {"bits": [22, 23], "name": "SRC_SWAP"},
9610     {"bits": [24, 25], "name": "DST_SWAP"},
9611     {"bits": [26, 26], "name": "SAS"},
9612     {"bits": [27, 27], "name": "DAS"},
9613     {"bits": [28, 28], "name": "SAIC"},
9614     {"bits": [29, 29], "name": "DAIC"},
9615     {"bits": [30, 30], "name": "RAW_WAIT"}
9620     {"bits": [12, 12], "name": "SRC_ATC"},
9621     {"bits": [13, 14], "name": "SRC_CACHE_POLICY"},
9622     {"bits": [15, 15], "name": "SRC_VOLATILE"},
9623     {"bits": [20, 21], "name": "DST_SELECT"},
9624     {"bits": [24, 24], "name": "DST_ATC"},
9625     {"bits": [25, 26], "name": "DST_CACHE_POLICY"},
9626     {"bits": [27, 27], "name": "DST_VOLATILE"},
9627     {"bits": [29, 30], "name": "SRC_SELECT"}
9632     {"bits": [0, 15], "name": "DST_ADDR_HI"}
9637     {"bits": [0, 15], "name": "SRC_ADDR_HI"}
9642     {"bits": [0, 25], "name": "DMA_READ_TAG"},
9643     {"bits": [28, 28], "name": "DMA_READ_TAG_VALID"}
9648     {"bits": [0, 15], "name": "COUNT"}
9653     {"bits": [0, 0], "name": "DISABLE_DRAW_WINDOW_LO_MAX"},
9654     {"bits": [1, 1], "name": "DISABLE_DRAW_WINDOW_LO_MIN"},
9655     {"bits": [2, 2], "name": "DISABLE_DRAW_WINDOW_HI"},
9656     {"bits": [8, 8], "name": "MODE"}
9661     {"bits": [0, 15], "name": "MIN"},
9662     {"bits": [16, 31], "name": "MAX"}
9667     {"bits": [0, 15], "name": "ADDR_HI"}
9672     {"bits": [0, 1], "name": "ADDR_SWAP"},
9673     {"bits": [2, 31], "name": "ADDR_LO"}
9678     {"bits": [0, 15], "name": "CNTX_ID"},
9679     {"bits": [16, 17], "name": "DST_SEL"},
9680     {"bits": [24, 26], "name": "INT_SEL"},
9681     {"bits": [29, 31], "name": "DATA_SEL"}
9686     {"bits": [0, 6], "name": "WBINV_TC_OP"},
9687     {"bits": [12, 17], "name": "WBINV_ACTION_ENA"},
9688     {"bits": [25, 26], "name": "CACHE_CONTROL"},
9689     {"bits": [27, 27], "name": "EOP_VOLATILE"}
9694     {"bits": [0, 19], "name": "IB1_OFFSET"}
9699     {"bits": [0, 19], "name": "IB1_PREAMBLE_BEGIN"}
9704     {"bits": [0, 19], "name": "IB1_PREAMBLE_END"}
9709     {"bits": [0, 19], "name": "IB2_OFFSET"}
9714     {"bits": [0, 19], "name": "IB2_PREAMBLE_BEGIN"}
9719     {"bits": [0, 19], "name": "IB2_PREAMBLE_END"}
9724     {"bits": [0, 15], "name": "ME_MC_RADDR_HI"}
9729     {"bits": [0, 1], "name": "ME_MC_RADDR_SWAP"},
9730     {"bits": [2, 31], "name": "ME_MC_RADDR_LO"}
9735     {"bits": [0, 15], "name": "ME_MC_WADDR_HI"}
9740     {"bits": [0, 1], "name": "ME_MC_WADDR_SWAP"},
9741     {"bits": [2, 31], "name": "ME_MC_WADDR_LO"}
9746     {"bits": [0, 3], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"},
9747     {"bits": [4, 7], "enum_ref": "SPM_PERFMON_STATE", "name": "SPM_PERFMON_STATE"},
9748     {"bits": [8, 9], "enum_ref": "CP_PERFMON_ENABLE_MODE", "name": "PERFMON_ENABLE_MODE"},
9749     {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"}
9754     {"bits": [31, 31], "name": "PERFMON_ENABLE"}
9759     {"bits": [0, 7], "name": "IB_EN"}
9764     {"bits": [0, 0], "name": "CONFIG_REG_EN"},
9765     {"bits": [1, 1], "name": "CNTX_REG_EN"},
9766     {"bits": [15, 15], "name": "UCONFIG_REG_EN"},
9767     {"bits": [16, 16], "name": "SH_GFX_REG_EN"},
9768     {"bits": [24, 24], "name": "SH_CS_REG_EN"}
9773     {"bits": [0, 15], "name": "PIPE_STATS_ADDR_HI"}
9778     {"bits": [0, 1], "name": "PIPE_STATS_ADDR_SWAP"},
9779     {"bits": [2, 31], "name": "PIPE_STATS_ADDR_LO"}
9784     {"bits": [0, 19], "name": "RB_OFFSET"}
9789     {"bits": [0, 1], "name": "RINGID"}
9794     {"bits": [0, 15], "name": "SEM_ADDR_HI"},
9795     {"bits": [16, 16], "name": "SEM_USE_MAILBOX"},
9796     {"bits": [20, 20], "name": "SEM_SIGNAL_TYPE"},
9797     {"bits": [24, 25], "name": "SEM_CLIENT_CODE"},
9798     {"bits": [29, 31], "name": "SEM_SELECT"}
9803     {"bits": [0, 1], "name": "SEM_ADDR_SWAP"},
9804     {"bits": [3, 31], "name": "SEM_ADDR_LO"}
9809     {"bits": [0, 15], "name": "STREAM_OUT_ADDR_HI"}
9814     {"bits": [0, 1], "name": "STREAM_OUT_ADDR_SWAP"},
9815     {"bits": [2, 31], "name": "STREAM_OUT_ADDR_LO"}
9820     {"bits": [0, 0], "name": "OFFSET_UPDATE_DONE"}
9825     {"bits": [0, 15], "name": "ST_BASE_HI"}
9830     {"bits": [2, 31], "name": "ST_BASE_LO"}
9835     {"bits": [0, 19], "name": "ST_BUFSZ"}
9840     {"bits": [0, 3], "name": "VMID"}
9845     {"bits": [0, 2], "name": "SRC_STATE_ID"}
9850     {"bits": [0, 0], "name": "ALPHA_TO_MASK_ENABLE"},
9851     {"bits": [8, 9], "name": "ALPHA_TO_MASK_OFFSET0"},
9852     {"bits": [10, 11], "name": "ALPHA_TO_MASK_OFFSET1"},
9853     {"bits": [12, 13], "name": "ALPHA_TO_MASK_OFFSET2"},
9854     {"bits": [14, 15], "name": "ALPHA_TO_MASK_OFFSET3"},
9855     {"bits": [16, 16], "name": "OFFSET_ROUND"}
9860     {"bits": [0, 0], "name": "ZPASS_INCREMENT_DISABLE"},
9861     {"bits": [1, 1], "name": "PERFECT_ZPASS_COUNTS"},
9862     {"bits": [4, 6], "name": "SAMPLE_RATE"},
9863     {"bits": [8, 11], "name": "ZPASS_ENABLE"},
9864     {"bits": [12, 15], "name": "ZFAIL_ENABLE"},
9865     {"bits": [16, 19], "name": "SFAIL_ENABLE"},
9866     {"bits": [20, 23], "name": "DBFAIL_ENABLE"},
9867     {"bits": [24, 27], "name": "SLICE_EVEN_ENABLE"},
9868     {"bits": [28, 31], "name": "SLICE_ODD_ENABLE"}
9873     {"bits": [0, 0], "name": "STENCIL_ENABLE"},
9874     {"bits": [1, 1], "name": "Z_ENABLE"},
9875     {"bits": [2, 2], "name": "Z_WRITE_ENABLE"},
9876     {"bits": [3, 3], "name": "DEPTH_BOUNDS_ENABLE"},
9877     {"bits": [4, 6], "enum_ref": "CompareFrag", "name": "ZFUNC"},
9878     {"bits": [7, 7], "name": "BACKFACE_ENABLE"},
9879     {"bits": [8, 10], "enum_ref": "CompareFrag", "name": "STENCILFUNC"},
9880     {"bits": [20, 22], "enum_ref": "CompareFrag", "name": "STENCILFUNC_BF"},
9881     {"bits": [30, 30], "name": "ENABLE_COLOR_WRITES_ON_DEPTH_FAIL"},
9882     {"bits": [31, 31], "name": "DISABLE_COLOR_WRITES_ON_DEPTH_PASS"}
9887     {"bits": [0, 3], "name": "ADDR5_SWIZZLE_MASK"},
9888     {"bits": [4, 7], "enum_ref": "ArrayMode", "name": "ARRAY_MODE"},
9889     {"bits": [8, 12], "enum_ref": "PipeConfig", "name": "PIPE_CONFIG"},
9890     {"bits": [13, 14], "enum_ref": "BankWidth", "name": "BANK_WIDTH"},
9891     {"bits": [15, 16], "enum_ref": "BankHeight", "name": "BANK_HEIGHT"},
9892     {"bits": [17, 18], "enum_ref": "MacroTileAspect", "name": "MACRO_TILE_ASPECT"},
9893     {"bits": [19, 20], "enum_ref": "NumBanks", "name": "NUM_BANKS"}
9898     {"bits": [0, 10], "name": "PITCH_TILE_MAX"},
9899     {"bits": [11, 21], "name": "HEIGHT_TILE_MAX"}
9904     {"bits": [0, 21], "name": "SLICE_TILE_MAX"}
9909     {"bits": [0, 10], "name": "SLICE_START"},
9910     {"bits": [13, 23], "name": "SLICE_MAX"},
9911     {"bits": [24, 24], "name": "Z_READ_ONLY"},
9912     {"bits": [25, 25], "name": "STENCIL_READ_ONLY"}
9917     {"bits": [0, 2], "name": "MAX_ANCHOR_SAMPLES"},
9918     {"bits": [4, 6], "name": "PS_ITER_SAMPLES"},
9919     {"bits": [8, 10], "name": "MASK_EXPORT_NUM_SAMPLES"},
9920     {"bits": [12, 14], "name": "ALPHA_TO_MASK_NUM_SAMPLES"},
9921     {"bits": [16, 16], "name": "HIGH_QUALITY_INTERSECTIONS"},
9922     {"bits": [17, 17], "name": "INCOHERENT_EQAA_READS"},
9923     {"bits": [18, 18], "name": "INTERPOLATE_COMP_Z"},
9924     {"bits": [19, 19], "name": "INTERPOLATE_SRC_Z"},
9925     {"bits": [20, 20], "name": "STATIC_ANCHOR_ASSOCIATIONS"},
9926     {"bits": [21, 21], "name": "ALPHA_TO_MASK_EQAA_DISABLE"},
9927     {"bits": [24, 26], "name": "OVERRASTERIZATION_AMOUNT"},
9928     {"bits": [27, 27], "name": "ENABLE_POSTZ_OVERRASTERIZATION"}
9933     {"bits": [0, 0], "name": "LINEAR"},
9934     {"bits": [1, 1], "name": "FULL_CACHE"},
9935     {"bits": [2, 2], "name": "HTILE_USES_PRELOAD_WIN"},
9936     {"bits": [3, 3], "name": "PRELOAD"},
9937     {"bits": [4, 9], "name": "PREFETCH_WIDTH"},
9938     {"bits": [10, 15], "name": "PREFETCH_HEIGHT"},
9939     {"bits": [16, 16], "name": "DST_OUTSIDE_ZERO_TO_ONE"}
9944     {"bits": [0, 9], "name": "PERF_SEL"},
9945     {"bits": [10, 19], "name": "PERF_SEL1"},
9946     {"bits": [20, 23], "name": "CNTR_MODE"},
9947     {"bits": [24, 27], "name": "PERF_MODE1"},
9948     {"bits": [28, 31], "name": "PERF_MODE"}
9953     {"bits": [0, 9], "name": "PERF_SEL2"},
9954     {"bits": [10, 19], "name": "PERF_SEL3"},
9955     {"bits": [24, 27], "name": "PERF_MODE3"},
9956     {"bits": [28, 31], "name": "PERF_MODE2"}
9961     {"bits": [0, 7], "name": "START_X"},
9962     {"bits": [8, 15], "name": "START_Y"},
9963     {"bits": [16, 23], "name": "MAX_X"},
9964     {"bits": [24, 31], "name": "MAX_Y"}
9969     {"bits": [0, 0], "name": "DEPTH_CLEAR_ENABLE"},
9970     {"bits": [1, 1], "name": "STENCIL_CLEAR_ENABLE"},
9971     {"bits": [2, 2], "name": "DEPTH_COPY"},
9972     {"bits": [3, 3], "name": "STENCIL_COPY"},
9973     {"bits": [4, 4], "name": "RESUMMARIZE_ENABLE"},
9974     {"bits": [5, 5], "name": "STENCIL_COMPRESS_DISABLE"},
9975     {"bits": [6, 6], "name": "DEPTH_COMPRESS_DISABLE"},
9976     {"bits": [7, 7], "name": "COPY_CENTROID"},
9977     {"bits": [8, 11], "name": "COPY_SAMPLE"}
9982     {"bits": [0, 1], "enum_ref": "ForceControl", "name": "FORCE_HIZ_ENABLE"},
9983     {"bits": [2, 3], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE0"},
9984     {"bits": [4, 5], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE1"},
9985     {"bits": [6, 6], "name": "FORCE_SHADER_Z_ORDER"},
9986     {"bits": [7, 7], "name": "FAST_Z_DISABLE"},
9987     {"bits": [8, 8], "name": "FAST_STENCIL_DISABLE"},
9988     {"bits": [9, 9], "name": "NOOP_CULL_DISABLE"},
9989     {"bits": [10, 10], "name": "FORCE_COLOR_KILL"},
9990     {"bits": [11, 11], "name": "FORCE_Z_READ"},
9991     {"bits": [12, 12], "name": "FORCE_STENCIL_READ"},
9992     {"bits": [13, 14], "enum_ref": "ForceControl", "name": "FORCE_FULL_Z_RANGE"},
9993     {"bits": [15, 15], "name": "FORCE_QC_SMASK_CONFLICT"},
9994     {"bits": [16, 16], "name": "DISABLE_VIEWPORT_CLAMP"},
9995     {"bits": [17, 17], "name": "IGNORE_SC_ZRANGE"},
9996     {"bits": [18, 18], "name": "DISABLE_FULLY_COVERED"},
9997     {"bits": [19, 20], "enum_ref": "ZLimitSumm", "name": "FORCE_Z_LIMIT_SUMM"},
9998     {"bits": [21, 25], "name": "MAX_TILES_IN_DTT"},
9999     {"bits": [26, 26], "name": "DISABLE_TILE_RATE_TILES"},
10000     {"bits": [27, 27], "name": "FORCE_Z_DIRTY"},
10001     {"bits": [28, 28], "name": "FORCE_STENCIL_DIRTY"},
10002     {"bits": [29, 29], "name": "FORCE_Z_VALID"},
10003     {"bits": [30, 30], "name": "FORCE_STENCIL_VALID"},
10004     {"bits": [31, 31], "name": "PRESERVE_COMPRESSION"}
10009     {"bits": [0, 1], "enum_ref": "DbPSLControl", "name": "PARTIAL_SQUAD_LAUNCH_CONTROL"},
10010     {"bits": [2, 4], "name": "PARTIAL_SQUAD_LAUNCH_COUNTDOWN"},
10011     {"bits": [5, 5], "name": "DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION"},
10012     {"bits": [6, 6], "name": "DISABLE_SMEM_EXPCLEAR_OPTIMIZATION"},
10013     {"bits": [7, 7], "name": "DISABLE_COLOR_ON_VALIDATION"},
10014     {"bits": [8, 8], "name": "DECOMPRESS_Z_ON_FLUSH"},
10015     {"bits": [9, 9], "name": "DISABLE_REG_SNOOP"},
10016     {"bits": [10, 10], "name": "DEPTH_BOUNDS_HIER_DEPTH_DISABLE"},
10017     {"bits": [11, 11], "name": "SEPARATE_HIZS_FUNC_ENABLE"},
10018     {"bits": [12, 14], "enum_ref": "CompareFrag", "name": "HIZ_ZFUNC"},
10019     {"bits": [15, 17], "name": "HIS_SFUNC_FF"},
10020     {"bits": [18, 20], "name": "HIS_SFUNC_BF"},
10021     {"bits": [21, 21], "name": "PRESERVE_ZRANGE"},
10022     {"bits": [22, 22], "name": "PRESERVE_SRESULTS"},
10023     {"bits": [23, 23], "name": "DISABLE_FAST_PASS"}
10028     {"bits": [0, 0], "name": "Z_EXPORT_ENABLE"},
10029     {"bits": [1, 1], "name": "STENCIL_TEST_VAL_EXPORT_ENABLE"},
10030     {"bits": [2, 2], "name": "STENCIL_OP_VAL_EXPORT_ENABLE"},
10031     {"bits": [4, 5], "enum_ref": "ZOrder", "name": "Z_ORDER"},
10032     {"bits": [6, 6], "name": "KILL_ENABLE"},
10033     {"bits": [7, 7], "name": "COVERAGE_TO_MASK_ENABLE"},
10034     {"bits": [8, 8], "name": "MASK_EXPORT_ENABLE"},
10035     {"bits": [9, 9], "name": "EXEC_ON_HIER_FAIL"},
10036     {"bits": [10, 10], "name": "EXEC_ON_NOOP"},
10037     {"bits": [11, 11], "name": "ALPHA_TO_MASK_DISABLE"},
10038     {"bits": [12, 12], "name": "DEPTH_BEFORE_SHADER"},
10039     {"bits": [13, 14], "enum_ref": "ConservativeZExport", "name": "CONSERVATIVE_Z_EXPORT"}
10044     {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC0"},
10045     {"bits": [4, 11], "name": "COMPAREVALUE0"},
10046     {"bits": [12, 19], "name": "COMPAREMASK0"},
10047     {"bits": [24, 24], "name": "ENABLE0"}
10052     {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC1"},
10053     {"bits": [4, 11], "name": "COMPAREVALUE1"},
10054     {"bits": [12, 19], "name": "COMPAREMASK1"},
10055     {"bits": [24, 24], "name": "ENABLE1"}
10060     {"bits": [0, 7], "name": "STENCILTESTVAL"},
10061     {"bits": [8, 15], "name": "STENCILMASK"},
10062     {"bits": [16, 23], "name": "STENCILWRITEMASK"},
10063     {"bits": [24, 31], "name": "STENCILOPVAL"}
10068     {"bits": [0, 7], "name": "STENCILTESTVAL_BF"},
10069     {"bits": [8, 15], "name": "STENCILMASK_BF"},
10070     {"bits": [16, 23], "name": "STENCILWRITEMASK_BF"},
10071     {"bits": [24, 31], "name": "STENCILOPVAL_BF"}
10076     {"bits": [0, 7], "name": "CLEAR"}
10081     {"bits": [0, 3], "enum_ref": "StencilOp", "name": "STENCILFAIL"},
10082     {"bits": [4, 7], "enum_ref": "StencilOp", "name": "STENCILZPASS"},
10083     {"bits": [8, 11], "enum_ref": "StencilOp", "name": "STENCILZFAIL"},
10084     {"bits": [12, 15], "enum_ref": "StencilOp", "name": "STENCILFAIL_BF"},
10085     {"bits": [16, 19], "enum_ref": "StencilOp", "name": "STENCILZPASS_BF"},
10086     {"bits": [20, 23], "enum_ref": "StencilOp", "name": "STENCILZFAIL_BF"}
10091     {"bits": [0, 0], "enum_ref": "StencilFormat", "name": "FORMAT"},
10092     {"bits": [13, 15], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},
10093     {"bits": [20, 22], "name": "TILE_MODE_INDEX"},
10094     {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"},
10095     {"bits": [29, 29], "name": "TILE_STENCIL_DISABLE"}
10100     {"bits": [0, 30], "name": "COUNT_HI"}
10105     {"bits": [0, 1], "enum_ref": "ZFormat", "name": "FORMAT"},
10106     {"bits": [2, 3], "name": "NUM_SAMPLES"},
10107     {"bits": [13, 15], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},
10108     {"bits": [20, 22], "name": "TILE_MODE_INDEX"},
10109     {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"},
10110     {"bits": [28, 28], "name": "READ_SIZE"},
10111     {"bits": [29, 29], "name": "TILE_SURFACE_ENABLE"},
10112     {"bits": [31, 31], "name": "ZRANGE_PRECISION"}
10117     {"bits": [0, 2], "name": "NUM_PIPES"},
10118     {"bits": [4, 6], "name": "PIPE_INTERLEAVE_SIZE"},
10119     {"bits": [8, 10], "name": "BANK_INTERLEAVE_SIZE"},
10120     {"bits": [12, 13], "name": "NUM_SHADER_ENGINES"},
10121     {"bits": [16, 18], "name": "SHADER_ENGINE_TILE_SIZE"},
10122     {"bits": [20, 22], "name": "NUM_GPUS"},
10123     {"bits": [24, 25], "name": "MULTI_GPU_TILE_SIZE"},
10124     {"bits": [28, 29], "name": "ROW_SIZE"},
10125     {"bits": [30, 30], "name": "NUM_LOWER_PIPES"}
10130     {"bits": [0, 1], "enum_ref": "BankWidth", "name": "BANK_WIDTH"},
10131     {"bits": [2, 3], "enum_ref": "BankHeight", "name": "BANK_HEIGHT"},
10132     {"bits": [4, 5], "enum_ref": "MacroTileAspect", "name": "MACRO_TILE_ASPECT"},
10133     {"bits": [6, 7], "enum_ref": "NumBanks", "name": "NUM_BANKS"}
10138     {"bits": [2, 5], "enum_ref": "ArrayMode", "name": "ARRAY_MODE"},
10139     {"bits": [6, 10], "enum_ref": "PipeConfig", "name": "PIPE_CONFIG"},
10140     {"bits": [11, 13], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},
10141     {"bits": [22, 24], "enum_ref": "MicroTileMode", "name": "MICRO_TILE_MODE_NEW"},
10142     {"bits": [25, 26], "name": "SAMPLE_SPLIT"}
10147     {"bits": [0, 15], "name": "BASE"},
10148     {"bits": [16, 31], "name": "UNUSED"}
10153     {"bits": [0, 5], "name": "AINC"},
10154     {"bits": [6, 7], "name": "UNUSED1"},
10155     {"bits": [8, 8], "name": "DMODE"},
10156     {"bits": [9, 31], "name": "UNUSED2"}
10161     {"bits": [0, 0], "name": "COMPLETE"},
10162     {"bits": [1, 31], "name": "UNUSED"}
10167     {"bits": [0, 7], "name": "OFFSET0"},
10168     {"bits": [8, 31], "name": "UNUSED"}
10173     {"bits": [0, 7], "name": "OFFSET1"},
10174     {"bits": [8, 31], "name": "UNUSED"}
10179     {"bits": [0, 7], "name": "OP"},
10180     {"bits": [8, 31], "name": "UNUSED"}
10185     {"bits": [0, 15], "name": "SIZE"},
10186     {"bits": [16, 31], "name": "UNUSED"}
10191     {"bits": [0, 0], "name": "FLAG"},
10192     {"bits": [1, 12], "name": "COUNTER"},
10193     {"bits": [13, 13], "name": "TYPE"},
10194     {"bits": [14, 14], "name": "DED"},
10195     {"bits": [15, 15], "name": "RELEASE_ALL"},
10196     {"bits": [16, 26], "name": "HEAD_QUEUE"},
10197     {"bits": [27, 27], "name": "HEAD_VALID"},
10198     {"bits": [28, 28], "name": "HEAD_FLAG"},
10199     {"bits": [29, 31], "name": "UNUSED1"}
10204     {"bits": [0, 15], "name": "RESOURCE_CNT"},
10205     {"bits": [16, 31], "name": "UNUSED"}
10210     {"bits": [0, 5], "name": "INDEX"},
10211     {"bits": [6, 31], "name": "UNUSED"}
10216     {"bits": [0, 15], "name": "DS_ADDRESS"},
10217     {"bits": [16, 19], "name": "CRAWLER_TYPE"},
10218     {"bits": [20, 23], "name": "CRAWLER"},
10219     {"bits": [24, 29], "name": "UNUSED"},
10220     {"bits": [30, 30], "name": "NO_ALLOC"},
10221     {"bits": [31, 31], "name": "ENABLE"}
10226     {"bits": [0, 3], "name": "INDEX"},
10227     {"bits": [4, 31], "name": "UNUSED"}
10232     {"bits": [0, 30], "name": "VALUE"},
10233     {"bits": [31, 31], "name": "INCDEC"}
10238     {"bits": [0, 7], "name": "INSTANCE_INDEX"},
10239     {"bits": [8, 15], "name": "SH_INDEX"},
10240     {"bits": [16, 23], "name": "SE_INDEX"},
10241     {"bits": [29, 29], "name": "SH_BROADCAST_WRITES"},
10242     {"bits": [30, 30], "name": "INSTANCE_BROADCAST_WRITES"},
10243     {"bits": [31, 31], "name": "SE_BROADCAST_WRITES"}
10248     {"bits": [0, 5], "name": "PERF_SEL"},
10249     {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"},
10250     {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"},
10251     {"bits": [12, 12], "name": "VGT_BUSY_USER_DEFINED_MASK"},
10252     {"bits": [13, 13], "name": "TA_BUSY_USER_DEFINED_MASK"},
10253     {"bits": [14, 14], "name": "SX_BUSY_USER_DEFINED_MASK"},
10254     {"bits": [16, 16], "name": "SPI_BUSY_USER_DEFINED_MASK"},
10255     {"bits": [17, 17], "name": "SC_BUSY_USER_DEFINED_MASK"},
10256     {"bits": [18, 18], "name": "PA_BUSY_USER_DEFINED_MASK"},
10257     {"bits": [19, 19], "name": "GRBM_BUSY_USER_DEFINED_MASK"},
10258     {"bits": [20, 20], "name": "DB_BUSY_USER_DEFINED_MASK"},
10259     {"bits": [21, 21], "name": "CB_BUSY_USER_DEFINED_MASK"},
10260     {"bits": [22, 22], "name": "CP_BUSY_USER_DEFINED_MASK"},
10261     {"bits": [23, 23], "name": "IA_BUSY_USER_DEFINED_MASK"},
10262     {"bits": [24, 24], "name": "GDS_BUSY_USER_DEFINED_MASK"},
10263     {"bits": [25, 25], "name": "BCI_BUSY_USER_DEFINED_MASK"},
10264     {"bits": [26, 26], "name": "RLC_BUSY_USER_DEFINED_MASK"},
10265     {"bits": [27, 27], "name": "TC_BUSY_USER_DEFINED_MASK"},
10266     {"bits": [28, 28], "name": "WD_BUSY_USER_DEFINED_MASK"}
10271     {"bits": [0, 5], "name": "PERF_SEL"},
10272     {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"},
10273     {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"},
10274     {"bits": [12, 12], "name": "TA_BUSY_USER_DEFINED_MASK"},
10275     {"bits": [13, 13], "name": "SX_BUSY_USER_DEFINED_MASK"},
10276     {"bits": [15, 15], "name": "SPI_BUSY_USER_DEFINED_MASK"},
10277     {"bits": [16, 16], "name": "SC_BUSY_USER_DEFINED_MASK"},
10278     {"bits": [17, 17], "name": "DB_BUSY_USER_DEFINED_MASK"},
10279     {"bits": [18, 18], "name": "CB_BUSY_USER_DEFINED_MASK"},
10280     {"bits": [19, 19], "name": "VGT_BUSY_USER_DEFINED_MASK"},
10281     {"bits": [20, 20], "name": "PA_BUSY_USER_DEFINED_MASK"},
10282     {"bits": [21, 21], "name": "BCI_BUSY_USER_DEFINED_MASK"}
10287     {"bits": [0, 3], "name": "ME0PIPE0_CMDFIFO_AVAIL"},
10288     {"bits": [5, 5], "name": "SRBM_RQ_PENDING"},
10289     {"bits": [7, 7], "name": "ME0PIPE0_CF_RQ_PENDING"},
10290     {"bits": [8, 8], "name": "ME0PIPE0_PF_RQ_PENDING"},
10291     {"bits": [9, 9], "name": "GDS_DMA_RQ_PENDING"},
10292     {"bits": [12, 12], "name": "DB_CLEAN"},
10293     {"bits": [13, 13], "name": "CB_CLEAN"},
10294     {"bits": [14, 14], "name": "TA_BUSY"},
10295     {"bits": [15, 15], "name": "GDS_BUSY"},
10296     {"bits": [16, 16], "name": "WD_BUSY_NO_DMA"},
10297     {"bits": [17, 17], "name": "VGT_BUSY"},
10298     {"bits": [18, 18], "name": "IA_BUSY_NO_DMA"},
10299     {"bits": [19, 19], "name": "IA_BUSY"},
10300     {"bits": [20, 20], "name": "SX_BUSY"},
10301     {"bits": [21, 21], "name": "WD_BUSY"},
10302     {"bits": [22, 22], "name": "SPI_BUSY"},
10303     {"bits": [23, 23], "name": "BCI_BUSY"},
10304     {"bits": [24, 24], "name": "SC_BUSY"},
10305     {"bits": [25, 25], "name": "PA_BUSY"},
10306     {"bits": [26, 26], "name": "DB_BUSY"},
10307     {"bits": [28, 28], "name": "CP_COHERENCY_BUSY"},
10308     {"bits": [29, 29], "name": "CP_BUSY"},
10309     {"bits": [30, 30], "name": "CB_BUSY"},
10310     {"bits": [31, 31], "name": "GUI_ACTIVE"}
10315     {"bits": [0, 3], "name": "ME0PIPE1_CMDFIFO_AVAIL"},
10316     {"bits": [4, 4], "name": "ME0PIPE1_CF_RQ_PENDING"},
10317     {"bits": [5, 5], "name": "ME0PIPE1_PF_RQ_PENDING"},
10318     {"bits": [6, 6], "name": "ME1PIPE0_RQ_PENDING"},
10319     {"bits": [7, 7], "name": "ME1PIPE1_RQ_PENDING"},
10320     {"bits": [8, 8], "name": "ME1PIPE2_RQ_PENDING"},
10321     {"bits": [9, 9], "name": "ME1PIPE3_RQ_PENDING"},
10322     {"bits": [10, 10], "name": "ME2PIPE0_RQ_PENDING"},
10323     {"bits": [11, 11], "name": "ME2PIPE1_RQ_PENDING"},
10324     {"bits": [12, 12], "name": "ME2PIPE2_RQ_PENDING"},
10325     {"bits": [13, 13], "name": "ME2PIPE3_RQ_PENDING"},
10326     {"bits": [14, 14], "name": "RLC_RQ_PENDING"},
10327     {"bits": [24, 24], "name": "RLC_BUSY"},
10328     {"bits": [25, 25], "name": "TC_BUSY"},
10329     {"bits": [28, 28], "name": "CPF_BUSY"},
10330     {"bits": [29, 29], "name": "CPC_BUSY"},
10331     {"bits": [30, 30], "name": "CPG_BUSY"}
10336     {"bits": [1, 1], "name": "DB_CLEAN"},
10337     {"bits": [2, 2], "name": "CB_CLEAN"},
10338     {"bits": [22, 22], "name": "BCI_BUSY"},
10339     {"bits": [23, 23], "name": "VGT_BUSY"},
10340     {"bits": [24, 24], "name": "PA_BUSY"},
10341     {"bits": [25, 25], "name": "TA_BUSY"},
10342     {"bits": [26, 26], "name": "SX_BUSY"},
10343     {"bits": [27, 27], "name": "SPI_BUSY"},
10344     {"bits": [29, 29], "name": "SC_BUSY"},
10345     {"bits": [30, 30], "name": "DB_BUSY"},
10346     {"bits": [31, 31], "name": "CB_BUSY"}
10351     {"bits": [0, 15], "name": "PRIMGROUP_SIZE"},
10352     {"bits": [16, 16], "name": "PARTIAL_VS_WAVE_ON"},
10353     {"bits": [17, 17], "name": "SWITCH_ON_EOP"},
10354     {"bits": [18, 18], "name": "PARTIAL_ES_WAVE_ON"},
10355     {"bits": [19, 19], "name": "SWITCH_ON_EOI"},
10356     {"bits": [20, 20], "name": "WD_SWITCH_ON_EOP"}
10361     {"bits": [0, 0], "name": "UCP_ENA_0"},
10362     {"bits": [1, 1], "name": "UCP_ENA_1"},
10363     {"bits": [2, 2], "name": "UCP_ENA_2"},
10364     {"bits": [3, 3], "name": "UCP_ENA_3"},
10365     {"bits": [4, 4], "name": "UCP_ENA_4"},
10366     {"bits": [5, 5], "name": "UCP_ENA_5"},
10367     {"bits": [13, 13], "name": "PS_UCP_Y_SCALE_NEG"},
10368     {"bits": [14, 15], "name": "PS_UCP_MODE"},
10369     {"bits": [16, 16], "name": "CLIP_DISABLE"},
10370     {"bits": [17, 17], "name": "UCP_CULL_ONLY_ENA"},
10371     {"bits": [18, 18], "name": "BOUNDARY_EDGE_FLAG_ENA"},
10372     {"bits": [19, 19], "name": "DX_CLIP_SPACE_DEF"},
10373     {"bits": [20, 20], "name": "DIS_CLIP_ERR_DETECT"},
10374     {"bits": [21, 21], "name": "VTX_KILL_OR"},
10375     {"bits": [22, 22], "name": "DX_RASTERIZATION_KILL"},
10376     {"bits": [24, 24], "name": "DX_LINEAR_ATTR_CLIP_ENA"},
10377     {"bits": [25, 25], "name": "VTE_VPORT_PROVOKE_DISABLE"},
10378     {"bits": [26, 26], "name": "ZCLIP_NEAR_DISABLE"},
10379     {"bits": [27, 27], "name": "ZCLIP_FAR_DISABLE"}
10384     {"bits": [0, 0], "name": "VTE_XY_INF_DISCARD"},
10385     {"bits": [1, 1], "name": "VTE_Z_INF_DISCARD"},
10386     {"bits": [2, 2], "name": "VTE_W_INF_DISCARD"},
10387     {"bits": [3, 3], "name": "VTE_0XNANINF_IS_0"},
10388     {"bits": [4, 4], "name": "VTE_XY_NAN_RETAIN"},
10389     {"bits": [5, 5], "name": "VTE_Z_NAN_RETAIN"},
10390     {"bits": [6, 6], "name": "VTE_W_NAN_RETAIN"},
10391     {"bits": [7, 7], "name": "VTE_W_RECIP_NAN_IS_0"},
10392     {"bits": [8, 8], "name": "VS_XY_NAN_TO_INF"},
10393     {"bits": [9, 9], "name": "VS_XY_INF_RETAIN"},
10394     {"bits": [10, 10], "name": "VS_Z_NAN_TO_INF"},
10395     {"bits": [11, 11], "name": "VS_Z_INF_RETAIN"},
10396     {"bits": [12, 12], "name": "VS_W_NAN_TO_INF"},
10397     {"bits": [13, 13], "name": "VS_W_INF_RETAIN"},
10398     {"bits": [14, 14], "name": "VS_CLIP_DIST_INF_DISCARD"},
10399     {"bits": [20, 20], "name": "VTE_NO_OUTPUT_NEG_0"}
10404     {"bits": [0, 0], "name": "CLIP_DIST_ENA_0"},
10405     {"bits": [1, 1], "name": "CLIP_DIST_ENA_1"},
10406     {"bits": [2, 2], "name": "CLIP_DIST_ENA_2"},
10407     {"bits": [3, 3], "name": "CLIP_DIST_ENA_3"},
10408     {"bits": [4, 4], "name": "CLIP_DIST_ENA_4"},
10409     {"bits": [5, 5], "name": "CLIP_DIST_ENA_5"},
10410     {"bits": [6, 6], "name": "CLIP_DIST_ENA_6"},
10411     {"bits": [7, 7], "name": "CLIP_DIST_ENA_7"},
10412     {"bits": [8, 8], "name": "CULL_DIST_ENA_0"},
10413     {"bits": [9, 9], "name": "CULL_DIST_ENA_1"},
10414     {"bits": [10, 10], "name": "CULL_DIST_ENA_2"},
10415     {"bits": [11, 11], "name": "CULL_DIST_ENA_3"},
10416     {"bits": [12, 12], "name": "CULL_DIST_ENA_4"},
10417     {"bits": [13, 13], "name": "CULL_DIST_ENA_5"},
10418     {"bits": [14, 14], "name": "CULL_DIST_ENA_6"},
10419     {"bits": [15, 15], "name": "CULL_DIST_ENA_7"},
10420     {"bits": [16, 16], "name": "USE_VTX_POINT_SIZE"},
10421     {"bits": [17, 17], "name": "USE_VTX_EDGE_FLAG"},
10422     {"bits": [18, 18], "name": "USE_VTX_RENDER_TARGET_INDX"},
10423     {"bits": [19, 19], "name": "USE_VTX_VIEWPORT_INDX"},
10424     {"bits": [20, 20], "name": "USE_VTX_KILL_FLAG"},
10425     {"bits": [21, 21], "name": "VS_OUT_MISC_VEC_ENA"},
10426     {"bits": [22, 22], "name": "VS_OUT_CCDIST0_VEC_ENA"},
10427     {"bits": [23, 23], "name": "VS_OUT_CCDIST1_VEC_ENA"},
10428     {"bits": [24, 24], "name": "VS_OUT_MISC_SIDE_BUS_ENA"},
10429     {"bits": [25, 25], "name": "USE_VTX_GS_CUT_FLAG"}
10434     {"bits": [0, 0], "name": "VPORT_X_SCALE_ENA"},
10435     {"bits": [1, 1], "name": "VPORT_X_OFFSET_ENA"},
10436     {"bits": [2, 2], "name": "VPORT_Y_SCALE_ENA"},
10437     {"bits": [3, 3], "name": "VPORT_Y_OFFSET_ENA"},
10438     {"bits": [4, 4], "name": "VPORT_Z_SCALE_ENA"},
10439     {"bits": [5, 5], "name": "VPORT_Z_OFFSET_ENA"},
10440     {"bits": [8, 8], "name": "VTX_XY_FMT"},
10441     {"bits": [9, 9], "name": "VTX_Z_FMT"},
10442     {"bits": [10, 10], "name": "VTX_W0_FMT"},
10443     {"bits": [11, 11], "name": "PERFCOUNTER_REF"}
10448     {"bits": [0, 2], "name": "MSAA_NUM_SAMPLES"},
10449     {"bits": [4, 4], "name": "AA_MASK_CENTROID_DTMN"},
10450     {"bits": [13, 16], "name": "MAX_SAMPLE_DIST"},
10451     {"bits": [20, 22], "name": "MSAA_EXPOSED_SAMPLES"},
10452     {"bits": [24, 25], "name": "DETAIL_TO_EXPOSED_MODE"}
10457     {"bits": [0, 15], "name": "AA_MASK_X0Y0"},
10458     {"bits": [16, 31], "name": "AA_MASK_X1Y0"}
10463     {"bits": [0, 15], "name": "AA_MASK_X0Y1"},
10464     {"bits": [16, 31], "name": "AA_MASK_X1Y1"}
10469     {"bits": [0, 3], "name": "S0_X"},
10470     {"bits": [4, 7], "name": "S0_Y"},
10471     {"bits": [8, 11], "name": "S1_X"},
10472     {"bits": [12, 15], "name": "S1_Y"},
10473     {"bits": [16, 19], "name": "S2_X"},
10474     {"bits": [20, 23], "name": "S2_Y"},
10475     {"bits": [24, 27], "name": "S3_X"},
10476     {"bits": [28, 31], "name": "S3_Y"}
10481     {"bits": [0, 3], "name": "S4_X"},
10482     {"bits": [4, 7], "name": "S4_Y"},
10483     {"bits": [8, 11], "name": "S5_X"},
10484     {"bits": [12, 15], "name": "S5_Y"},
10485     {"bits": [16, 19], "name": "S6_X"},
10486     {"bits": [20, 23], "name": "S6_Y"},
10487     {"bits": [24, 27], "name": "S7_X"},
10488     {"bits": [28, 31], "name": "S7_Y"}
10493     {"bits": [0, 3], "name": "S8_X"},
10494     {"bits": [4, 7], "name": "S8_Y"},
10495     {"bits": [8, 11], "name": "S9_X"},
10496     {"bits": [12, 15], "name": "S9_Y"},
10497     {"bits": [16, 19], "name": "S10_X"},
10498     {"bits": [20, 23], "name": "S10_Y"},
10499     {"bits": [24, 27], "name": "S11_X"},
10500     {"bits": [28, 31], "name": "S11_Y"}
10505     {"bits": [0, 3], "name": "S12_X"},
10506     {"bits": [4, 7], "name": "S12_Y"},
10507     {"bits": [8, 11], "name": "S13_X"},
10508     {"bits": [12, 15], "name": "S13_Y"},
10509     {"bits": [16, 19], "name": "S14_X"},
10510     {"bits": [20, 23], "name": "S14_Y"},
10511     {"bits": [24, 27], "name": "S15_X"},
10512     {"bits": [28, 31], "name": "S15_Y"}
10517     {"bits": [0, 3], "name": "DISTANCE_0"},
10518     {"bits": [4, 7], "name": "DISTANCE_1"},
10519     {"bits": [8, 11], "name": "DISTANCE_2"},
10520     {"bits": [12, 15], "name": "DISTANCE_3"},
10521     {"bits": [16, 19], "name": "DISTANCE_4"},
10522     {"bits": [20, 23], "name": "DISTANCE_5"},
10523     {"bits": [24, 27], "name": "DISTANCE_6"},
10524     {"bits": [28, 31], "name": "DISTANCE_7"}
10529     {"bits": [0, 3], "name": "DISTANCE_8"},
10530     {"bits": [4, 7], "name": "DISTANCE_9"},
10531     {"bits": [8, 11], "name": "DISTANCE_10"},
10532     {"bits": [12, 15], "name": "DISTANCE_11"},
10533     {"bits": [16, 19], "name": "DISTANCE_12"},
10534     {"bits": [20, 23], "name": "DISTANCE_13"},
10535     {"bits": [24, 27], "name": "DISTANCE_14"},
10536     {"bits": [28, 31], "name": "DISTANCE_15"}
10541     {"bits": [0, 14], "name": "BR_X"},
10542     {"bits": [16, 30], "name": "BR_Y"}
10547     {"bits": [0, 14], "name": "TL_X"},
10548     {"bits": [16, 30], "name": "TL_Y"}
10553     {"bits": [0, 15], "enum_ref": "CLIP_RULE", "name": "CLIP_RULE"}
10558     {"bits": [0, 3], "name": "ER_TRI"},
10559     {"bits": [4, 7], "name": "ER_POINT"},
10560     {"bits": [8, 11], "name": "ER_RECT"},
10561     {"bits": [12, 17], "name": "ER_LINE_LR"},
10562     {"bits": [18, 23], "name": "ER_LINE_RL"},
10563     {"bits": [24, 27], "name": "ER_LINE_TB"},
10564     {"bits": [28, 31], "name": "ER_LINE_BT"}
10569     {"bits": [0, 14], "name": "TL_X"},
10570     {"bits": [16, 30], "name": "TL_Y"},
10571     {"bits": [31, 31], "name": "WINDOW_OFFSET_DISABLE"}
10576     {"bits": [9, 9], "name": "EXPAND_LINE_WIDTH"},
10577     {"bits": [10, 10], "name": "LAST_PIXEL"},
10578     {"bits": [11, 11], "name": "PERPENDICULAR_ENDCAP_ENA"},
10579     {"bits": [12, 12], "name": "DX10_DIAMOND_TEST_ENA"}
10584     {"bits": [0, 15], "name": "LINE_PATTERN"},
10585     {"bits": [16, 23], "name": "REPEAT_COUNT"},
10586     {"bits": [28, 28], "name": "PATTERN_BIT_ORDER"},
10587     {"bits": [29, 30], "name": "AUTO_RESET_CNTL"}
10592     {"bits": [0, 3], "name": "CURRENT_PTR"},
10593     {"bits": [8, 15], "name": "CURRENT_COUNT"}
10598     {"bits": [0, 0], "name": "MSAA_ENABLE"},
10599     {"bits": [1, 1], "name": "VPORT_SCISSOR_ENABLE"},
10600     {"bits": [2, 2], "name": "LINE_STIPPLE_ENABLE"},
10601     {"bits": [3, 3], "name": "SEND_UNLIT_STILES_TO_PKR"}
10606     {"bits": [0, 0], "name": "WALK_SIZE"},
10607     {"bits": [1, 1], "name": "WALK_ALIGNMENT"},
10608     {"bits": [2, 2], "name": "WALK_ALIGN8_PRIM_FITS_ST"},
10609     {"bits": [3, 3], "name": "WALK_FENCE_ENABLE"},
10610     {"bits": [4, 6], "name": "WALK_FENCE_SIZE"},
10611     {"bits": [7, 7], "name": "SUPERTILE_WALK_ORDER_ENABLE"},
10612     {"bits": [8, 8], "name": "TILE_WALK_ORDER_ENABLE"},
10613     {"bits": [9, 9], "name": "TILE_COVER_DISABLE"},
10614     {"bits": [10, 10], "name": "TILE_COVER_NO_SCISSOR"},
10615     {"bits": [11, 11], "name": "ZMM_LINE_EXTENT"},
10616     {"bits": [12, 12], "name": "ZMM_LINE_OFFSET"},
10617     {"bits": [13, 13], "name": "ZMM_RECT_EXTENT"},
10618     {"bits": [14, 14], "name": "KILL_PIX_POST_HI_Z"},
10619     {"bits": [15, 15], "name": "KILL_PIX_POST_DETAIL_MASK"},
10620     {"bits": [16, 16], "name": "PS_ITER_SAMPLE"},
10621     {"bits": [17, 17], "name": "MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE"},
10622     {"bits": [18, 18], "name": "MULTI_GPU_SUPERTILE_ENABLE"},
10623     {"bits": [19, 19], "name": "GPU_ID_OVERRIDE_ENABLE"},
10624     {"bits": [20, 23], "name": "GPU_ID_OVERRIDE"},
10625     {"bits": [24, 24], "name": "MULTI_GPU_PRIM_DISCARD_ENABLE"},
10626     {"bits": [25, 25], "name": "FORCE_EOV_CNTDWN_ENABLE"},
10627     {"bits": [26, 26], "name": "FORCE_EOV_REZ_ENABLE"},
10628     {"bits": [27, 27], "name": "OUT_OF_ORDER_PRIMITIVE_ENABLE"},
10629     {"bits": [28, 30], "name": "OUT_OF_ORDER_WATER_MARK"}
10634     {"bits": [0, 13], "name": "X_COORD"}
10639     {"bits": [0, 0], "name": "ENABLE_HV_PRE_SHADER"},
10640     {"bits": [1, 1], "name": "FORCE_PRE_SHADER_ALL_PIXELS"}
10645     {"bits": [0, 13], "name": "Y_COORD"}
10650     {"bits": [0, 9], "name": "PERF_SEL"}
10655     {"bits": [0, 1], "enum_ref": "RbMap", "name": "RB_MAP_PKR0"},
10656     {"bits": [2, 3], "enum_ref": "RbMap", "name": "RB_MAP_PKR1"},
10657     {"bits": [4, 5], "enum_ref": "RbXsel2", "name": "RB_XSEL2"},
10658     {"bits": [6, 6], "enum_ref": "RbXsel", "name": "RB_XSEL"},
10659     {"bits": [7, 7], "enum_ref": "RbYsel", "name": "RB_YSEL"},
10660     {"bits": [8, 9], "enum_ref": "PkrMap", "name": "PKR_MAP"},
10661     {"bits": [10, 11], "enum_ref": "PkrXsel", "name": "PKR_XSEL"},
10662     {"bits": [12, 13], "enum_ref": "PkrYsel", "name": "PKR_YSEL"},
10663     {"bits": [14, 15], "enum_ref": "PkrXsel2", "name": "PKR_XSEL2"},
10664     {"bits": [16, 17], "enum_ref": "ScMap", "name": "SC_MAP"},
10665     {"bits": [18, 19], "enum_ref": "ScXsel", "name": "SC_XSEL"},
10666     {"bits": [20, 21], "enum_ref": "ScYsel", "name": "SC_YSEL"},
10667     {"bits": [24, 25], "enum_ref": "SeMap", "name": "SE_MAP"},
10668     {"bits": [26, 27], "enum_ref": "SeXsel", "name": "SE_XSEL"},
10669     {"bits": [28, 29], "enum_ref": "SeYsel", "name": "SE_YSEL"}
10674     {"bits": [0, 1], "enum_ref": "SePairMap", "name": "SE_PAIR_MAP"},
10675     {"bits": [2, 3], "enum_ref": "SePairXsel", "name": "SE_PAIR_XSEL"},
10676     {"bits": [4, 5], "enum_ref": "SePairYsel", "name": "SE_PAIR_YSEL"}
10681     {"bits": [0, 1], "name": "SLICE_EVEN_ENABLE"},
10682     {"bits": [2, 3], "name": "SLICE_ODD_ENABLE"}
10687     {"bits": [0, 15], "name": "X"},
10688     {"bits": [16, 31], "name": "Y"}
10693     {"bits": [0, 15], "name": "BR_X"},
10694     {"bits": [16, 31], "name": "BR_Y"}
10699     {"bits": [0, 15], "name": "TL_X"},
10700     {"bits": [16, 31], "name": "TL_Y"}
10705     {"bits": [0, 15], "name": "WINDOW_X_OFFSET"},
10706     {"bits": [16, 31], "name": "WINDOW_Y_OFFSET"}
10711     {"bits": [0, 8], "name": "HW_SCREEN_OFFSET_X"},
10712     {"bits": [16, 24], "name": "HW_SCREEN_OFFSET_Y"}
10717     {"bits": [0, 15], "name": "WIDTH"}
10722     {"bits": [0, 1], "name": "LINE_STIPPLE_RESET"},
10723     {"bits": [2, 2], "name": "EXPAND_FULL_LENGTH"},
10724     {"bits": [3, 3], "name": "FRACTIONAL_ACCUM"},
10725     {"bits": [4, 4], "name": "DIAMOND_ADJUST"}
10730     {"bits": [0, 23], "name": "LINE_STIPPLE_VALUE"}
10735     {"bits": [0, 15], "name": "PERFCOUNTER_HI"}
10740     {"bits": [0, 9], "name": "PERF_SEL"},
10741     {"bits": [10, 19], "name": "PERF_SEL1"},
10742     {"bits": [20, 23], "name": "CNTR_MODE"}
10747     {"bits": [0, 9], "name": "PERF_SEL2"},
10748     {"bits": [10, 19], "name": "PERF_SEL3"}
10753     {"bits": [0, 9], "name": "PERF_SEL"},
10754     {"bits": [20, 23], "name": "CNTR_MODE"}
10759     {"bits": [0, 15], "name": "MIN_SIZE"},
10760     {"bits": [16, 31], "name": "MAX_SIZE"}
10765     {"bits": [0, 15], "name": "HEIGHT"},
10766     {"bits": [16, 31], "name": "WIDTH"}
10771     {"bits": [0, 7], "name": "POLY_OFFSET_NEG_NUM_DB_BITS"},
10772     {"bits": [8, 8], "name": "POLY_OFFSET_DB_IS_FLOAT_FMT"}
10777     {"bits": [0, 0], "name": "TRIANGLE_FILTER_DISABLE"},
10778     {"bits": [1, 1], "name": "LINE_FILTER_DISABLE"},
10779     {"bits": [2, 2], "name": "POINT_FILTER_DISABLE"},
10780     {"bits": [3, 3], "name": "RECTANGLE_FILTER_DISABLE"},
10781     {"bits": [4, 4], "name": "TRIANGLE_EXPAND_ENA"},
10782     {"bits": [5, 5], "name": "LINE_EXPAND_ENA"},
10783     {"bits": [6, 6], "name": "POINT_EXPAND_ENA"},
10784     {"bits": [7, 7], "name": "RECTANGLE_EXPAND_ENA"},
10785     {"bits": [8, 15], "name": "PRIM_EXPAND_CONSTANT"},
10786     {"bits": [30, 30], "name": "XMAX_RIGHT_EXCLUSION"},
10787     {"bits": [31, 31], "name": "YMAX_BOTTOM_EXCLUSION"}
10792     {"bits": [0, 0], "name": "CULL_FRONT"},
10793     {"bits": [1, 1], "name": "CULL_BACK"},
10794     {"bits": [2, 2], "name": "FACE"},
10795     {"bits": [3, 4], "enum_ref": "PA_SU_SC_MODE_CNTL__POLY_MODE", "name": "POLY_MODE"},
10796     {"bits": [5, 7], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_FRONT_PTYPE"},
10797     {"bits": [8, 10], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_BACK_PTYPE"},
10798     {"bits": [11, 11], "name": "POLY_OFFSET_FRONT_ENABLE"},
10799     {"bits": [12, 12], "name": "POLY_OFFSET_BACK_ENABLE"},
10800     {"bits": [13, 13], "name": "POLY_OFFSET_PARA_ENABLE"},
10801     {"bits": [16, 16], "name": "VTX_WINDOW_OFFSET_ENABLE"},
10802     {"bits": [19, 19], "name": "PROVOKING_VTX_LAST"},
10803     {"bits": [20, 20], "name": "PERSP_CORR_DIS"},
10804     {"bits": [21, 21], "name": "MULTI_PRIM_IB_ENA"}
10809     {"bits": [0, 0], "name": "PIX_CENTER"},
10810     {"bits": [1, 2], "enum_ref": "PA_SU_VTX_CNTL__ROUND_MODE", "name": "ROUND_MODE"},
10811     {"bits": [3, 5], "enum_ref": "QUANT_MODE", "name": "QUANT_MODE"}
10816     {"bits": [0, 7], "name": "PERFCOUNTER_SELECT"}
10821     {"bits": [0, 2], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"},
10822     {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"}
10827     {"bits": [0, 7], "name": "PERFMON_SAMPLE_DELAY"},
10828     {"bits": [8, 31], "name": "RESERVED"}
10833     {"bits": [0, 11], "name": "RESERVED1"},
10834     {"bits": [12, 13], "name": "PERFMON_RING_MODE"},
10835     {"bits": [14, 15], "name": "RESERVED"},
10836     {"bits": [16, 31], "name": "PERFMON_SAMPLE_INTERVAL"}
10841     {"bits": [0, 15], "name": "RING_BASE_HI"},
10842     {"bits": [16, 31], "name": "RESERVED"}
10847     {"bits": [0, 7], "name": "PERFMON_SEGMENT_SIZE"},
10848     {"bits": [8, 10], "name": "RESERVED1"},
10849     {"bits": [11, 15], "name": "GLOBAL_NUM_LINE"},
10850     {"bits": [16, 20], "name": "SE0_NUM_LINE"},
10851     {"bits": [21, 25], "name": "SE1_NUM_LINE"},
10852     {"bits": [26, 30], "name": "SE2_NUM_LINE"},
10853     {"bits": [31, 31], "name": "RESERVED"}
10858     {"bits": [0, 7], "name": "OBSOLETE_UMSK"},
10859     {"bits": [16, 17], "name": "OBSOLETE_SWAP"}
10864     {"bits": [0, 0], "name": "PERSP_CENTER_CNTL"},
10865     {"bits": [4, 4], "name": "PERSP_CENTROID_CNTL"},
10866     {"bits": [8, 8], "name": "LINEAR_CENTER_CNTL"},
10867     {"bits": [12, 12], "name": "LINEAR_CENTROID_CNTL"},
10868     {"bits": [16, 17], "name": "POS_FLOAT_LOCATION"},
10869     {"bits": [20, 20], "name": "POS_FLOAT_ULC"},
10870     {"bits": [24, 24], "name": "FRONT_FACE_ALL_BITS"}
10875     {"bits": [0, 20], "name": "GPR_WRITE_PRIORITY"},
10876     {"bits": [21, 23], "name": "EXP_PRIORITY_ORDER"},
10877     {"bits": [24, 24], "name": "ENABLE_SQG_TOP_EVENTS"},
10878     {"bits": [25, 25], "name": "ENABLE_SQG_BOP_EVENTS"},
10879     {"bits": [26, 26], "name": "RSRC_MGMT_RESET"},
10880     {"bits": [27, 27], "name": "TTRACE_STALL_ALL"}
10885     {"bits": [0, 0], "name": "FLAT_SHADE_ENA"},
10886     {"bits": [1, 1], "name": "PNT_SPRITE_ENA"},
10887     {"bits": [2, 4], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_X"},
10888     {"bits": [5, 7], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Y"},
10889     {"bits": [8, 10], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Z"},
10890     {"bits": [11, 13], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_W"},
10891     {"bits": [14, 14], "name": "PNT_SPRITE_TOP_1"}
10896     {"bits": [0, 7], "name": "PERF_SEL"}
10901     {"bits": [0, 3], "name": "BIN0_MIN"},
10902     {"bits": [4, 7], "name": "BIN0_MAX"},
10903     {"bits": [8, 11], "name": "BIN1_MIN"},
10904     {"bits": [12, 15], "name": "BIN1_MAX"},
10905     {"bits": [16, 19], "name": "BIN2_MIN"},
10906     {"bits": [20, 23], "name": "BIN2_MAX"},
10907     {"bits": [24, 27], "name": "BIN3_MIN"},
10908     {"bits": [28, 31], "name": "BIN3_MAX"}
10913     {"bits": [0, 5], "name": "OFFSET"},
10914     {"bits": [8, 9], "name": "DEFAULT_VAL"},
10915     {"bits": [10, 10], "name": "FLAT_SHADE"},
10916     {"bits": [13, 16], "name": "CYL_WRAP"},
10917     {"bits": [17, 17], "name": "PT_SPRITE_TEX"},
10918     {"bits": [18, 18], "name": "DUP"}
10923     {"bits": [0, 5], "name": "OFFSET"},
10924     {"bits": [8, 9], "name": "DEFAULT_VAL"},
10925     {"bits": [10, 10], "name": "FLAT_SHADE"},
10926     {"bits": [18, 18], "name": "DUP"}
10931     {"bits": [0, 0], "name": "PERSP_SAMPLE_ENA"},
10932     {"bits": [1, 1], "name": "PERSP_CENTER_ENA"},
10933     {"bits": [2, 2], "name": "PERSP_CENTROID_ENA"},
10934     {"bits": [3, 3], "name": "PERSP_PULL_MODEL_ENA"},
10935     {"bits": [4, 4], "name": "LINEAR_SAMPLE_ENA"},
10936     {"bits": [5, 5], "name": "LINEAR_CENTER_ENA"},
10937     {"bits": [6, 6], "name": "LINEAR_CENTROID_ENA"},
10938     {"bits": [7, 7], "name": "LINE_STIPPLE_TEX_ENA"},
10939     {"bits": [8, 8], "name": "POS_X_FLOAT_ENA"},
10940     {"bits": [9, 9], "name": "POS_Y_FLOAT_ENA"},
10941     {"bits": [10, 10], "name": "POS_Z_FLOAT_ENA"},
10942     {"bits": [11, 11], "name": "POS_W_FLOAT_ENA"},
10943     {"bits": [12, 12], "name": "FRONT_FACE_ENA"},
10944     {"bits": [13, 13], "name": "ANCILLARY_ENA"},
10945     {"bits": [14, 14], "name": "SAMPLE_COVERAGE_ENA"},
10946     {"bits": [15, 15], "name": "POS_FIXED_PT_ENA"}
10951     {"bits": [0, 5], "name": "NUM_INTERP"},
10952     {"bits": [6, 6], "name": "PARAM_GEN"},
10953     {"bits": [14, 14], "name": "BC_OPTIMIZE_DISABLE"}
10958     {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL0_EXPORT_FORMAT"},
10959     {"bits": [4, 7], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL1_EXPORT_FORMAT"},
10960     {"bits": [8, 11], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL2_EXPORT_FORMAT"},
10961     {"bits": [12, 15], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL3_EXPORT_FORMAT"},
10962     {"bits": [16, 19], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL4_EXPORT_FORMAT"},
10963     {"bits": [20, 23], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL5_EXPORT_FORMAT"},
10964     {"bits": [24, 27], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL6_EXPORT_FORMAT"},
10965     {"bits": [28, 31], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL7_EXPORT_FORMAT"}
10970     {"bits": [0, 5], "name": "LIMIT"}
10975     {"bits": [0, 5], "name": "VGPRS"},
10976     {"bits": [6, 9], "name": "SGPRS"},
10977     {"bits": [10, 11], "name": "PRIORITY"},
10978     {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
10979     {"bits": [20, 20], "name": "PRIV"},
10980     {"bits": [21, 21], "name": "DX10_CLAMP"},
10981     {"bits": [22, 22], "name": "DEBUG_MODE"},
10982     {"bits": [23, 23], "name": "IEEE_MODE"},
10983     {"bits": [24, 24], "name": "CU_GROUP_ENABLE"},
10984     {"bits": [25, 27], "name": "CACHE_CTL"},
10985     {"bits": [28, 28], "name": "CDBG_USER"}
10990     {"bits": [0, 5], "name": "VGPRS"},
10991     {"bits": [6, 9], "name": "SGPRS"},
10992     {"bits": [10, 11], "name": "PRIORITY"},
10993     {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
10994     {"bits": [20, 20], "name": "PRIV"},
10995     {"bits": [21, 21], "name": "DX10_CLAMP"},
10996     {"bits": [22, 22], "name": "DEBUG_MODE"},
10997     {"bits": [23, 23], "name": "IEEE_MODE"},
10998     {"bits": [24, 26], "name": "CACHE_CTL"},
10999     {"bits": [27, 27], "name": "CDBG_USER"}
11004     {"bits": [0, 5], "name": "VGPRS"},
11005     {"bits": [6, 9], "name": "SGPRS"},
11006     {"bits": [10, 11], "name": "PRIORITY"},
11007     {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
11008     {"bits": [20, 20], "name": "PRIV"},
11009     {"bits": [21, 21], "name": "DX10_CLAMP"},
11010     {"bits": [22, 22], "name": "DEBUG_MODE"},
11011     {"bits": [23, 23], "name": "IEEE_MODE"},
11012     {"bits": [24, 25], "name": "VGPR_COMP_CNT"},
11013     {"bits": [26, 28], "name": "CACHE_CTL"},
11014     {"bits": [29, 29], "name": "CDBG_USER"}
11019     {"bits": [0, 5], "name": "VGPRS"},
11020     {"bits": [6, 9], "name": "SGPRS"},
11021     {"bits": [10, 11], "name": "PRIORITY"},
11022     {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
11023     {"bits": [20, 20], "name": "PRIV"},
11024     {"bits": [21, 21], "name": "DX10_CLAMP"},
11025     {"bits": [22, 22], "name": "DEBUG_MODE"},
11026     {"bits": [23, 23], "name": "IEEE_MODE"},
11027     {"bits": [24, 24], "name": "CU_GROUP_DISABLE"},
11028     {"bits": [25, 27], "name": "CACHE_CTL"},
11029     {"bits": [28, 28], "name": "CDBG_USER"}
11034     {"bits": [0, 5], "name": "VGPRS"},
11035     {"bits": [6, 9], "name": "SGPRS"},
11036     {"bits": [10, 11], "name": "PRIORITY"},
11037     {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
11038     {"bits": [20, 20], "name": "PRIV"},
11039     {"bits": [21, 21], "name": "DX10_CLAMP"},
11040     {"bits": [22, 22], "name": "DEBUG_MODE"},
11041     {"bits": [23, 23], "name": "IEEE_MODE"},
11042     {"bits": [24, 25], "name": "VGPR_COMP_CNT"},
11043     {"bits": [26, 26], "name": "CU_GROUP_ENABLE"},
11044     {"bits": [27, 29], "name": "CACHE_CTL"},
11045     {"bits": [30, 30], "name": "CDBG_USER"}
11050     {"bits": [0, 0], "name": "SCRATCH_EN"},
11051     {"bits": [1, 5], "name": "USER_SGPR"},
11052     {"bits": [6, 6], "name": "TRAP_PRESENT"},
11053     {"bits": [7, 7], "name": "OC_LDS_EN"},
11054     {"bits": [8, 16], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
11055     {"bits": [20, 28], "name": "LDS_SIZE"}
11060     {"bits": [0, 0], "name": "SCRATCH_EN"},
11061     {"bits": [1, 5], "name": "USER_SGPR"},
11062     {"bits": [6, 6], "name": "TRAP_PRESENT"},
11063     {"bits": [7, 15], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
11068     {"bits": [0, 0], "name": "SCRATCH_EN"},
11069     {"bits": [1, 5], "name": "USER_SGPR"},
11070     {"bits": [6, 6], "name": "TRAP_PRESENT"},
11071     {"bits": [7, 7], "name": "OC_LDS_EN"},
11072     {"bits": [8, 8], "name": "TG_SIZE_EN"},
11073     {"bits": [9, 17], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
11078     {"bits": [0, 0], "name": "SCRATCH_EN"},
11079     {"bits": [1, 5], "name": "USER_SGPR"},
11080     {"bits": [6, 6], "name": "TRAP_PRESENT"},
11081     {"bits": [7, 15], "name": "LDS_SIZE"},
11082     {"bits": [16, 24], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
11087     {"bits": [0, 0], "name": "SCRATCH_EN"},
11088     {"bits": [1, 5], "name": "USER_SGPR"},
11089     {"bits": [6, 6], "name": "TRAP_PRESENT"},
11090     {"bits": [7, 7], "name": "WAVE_CNT_EN"},
11091     {"bits": [8, 15], "name": "EXTRA_LDS_SIZE"},
11092     {"bits": [16, 24], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
11097     {"bits": [0, 0], "name": "SCRATCH_EN"},
11098     {"bits": [1, 5], "name": "USER_SGPR"},
11099     {"bits": [6, 6], "name": "TRAP_PRESENT"},
11100     {"bits": [7, 7], "name": "OC_LDS_EN"},
11101     {"bits": [8, 8], "name": "SO_BASE0_EN"},
11102     {"bits": [9, 9], "name": "SO_BASE1_EN"},
11103     {"bits": [10, 10], "name": "SO_BASE2_EN"},
11104     {"bits": [11, 11], "name": "SO_BASE3_EN"},
11105     {"bits": [12, 12], "name": "SO_EN"},
11106     {"bits": [13, 21], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
11111     {"bits": [0, 5], "name": "WAVE_LIMIT"},
11112     {"bits": [6, 9], "name": "LOCK_LOW_THRESHOLD"}
11117     {"bits": [0, 15], "name": "CU_EN"},
11118     {"bits": [16, 21], "name": "WAVE_LIMIT"},
11119     {"bits": [22, 25], "name": "LOCK_LOW_THRESHOLD"}
11124     {"bits": [0, 3], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS0_EXPORT_FORMAT"},
11125     {"bits": [4, 7], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS1_EXPORT_FORMAT"},
11126     {"bits": [8, 11], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS2_EXPORT_FORMAT"},
11127     {"bits": [12, 15], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS3_EXPORT_FORMAT"}
11132     {"bits": [0, 7], "name": "MEM_BASE"}
11137     {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "Z_EXPORT_FORMAT"}
11142     {"bits": [1, 5], "name": "VS_EXPORT_COUNT"},
11143     {"bits": [6, 6], "name": "VS_HALF_PACK"}
11148     {"bits": [0, 0], "name": "INST_INVALIDATE"},
11149     {"bits": [1, 1], "name": "DATA_INVALIDATE"},
11150     {"bits": [2, 2], "name": "INVALIDATE_VOLATILE"}
11155     {"bits": [0, 15], "name": "BASE_ADDRESS_HI"},
11156     {"bits": [16, 29], "name": "STRIDE"},
11157     {"bits": [30, 30], "name": "CACHE_SWIZZLE"},
11158     {"bits": [31, 31], "name": "SWIZZLE_ENABLE"}
11163     {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"},
11164     {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"},
11165     {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"},
11166     {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"},
11167     {"bits": [12, 14], "enum_ref": "BUF_NUM_FORMAT", "name": "NUM_FORMAT"},
11168     {"bits": [15, 18], "enum_ref": "BUF_DATA_FORMAT", "name": "DATA_FORMAT"},
11169     {"bits": [19, 20], "name": "ELEMENT_SIZE"},
11170     {"bits": [21, 22], "name": "INDEX_STRIDE"},
11171     {"bits": [23, 23], "name": "ADD_TID_ENABLE"},
11172     {"bits": [24, 24], "name": "ATC"},
11173     {"bits": [25, 25], "name": "HASH_ENABLE"},
11174     {"bits": [26, 26], "name": "HEAP"},
11175     {"bits": [27, 29], "name": "MTYPE"},
11176     {"bits": [30, 31], "enum_ref": "SQ_RSRC_BUF_TYPE", "name": "TYPE"}
11181     {"bits": [0, 7], "name": "BASE_ADDRESS_HI"},
11182     {"bits": [8, 19], "name": "MIN_LOD"},
11183     {"bits": [20, 25], "enum_ref": "IMG_DATA_FORMAT", "name": "DATA_FORMAT"},
11184     {"bits": [26, 29], "enum_ref": "IMG_NUM_FORMAT", "name": "NUM_FORMAT"},
11185     {"bits": [30, 31], "name": "MTYPE"}
11190     {"bits": [0, 13], "name": "WIDTH"},
11191     {"bits": [14, 27], "name": "HEIGHT"},
11192     {"bits": [28, 30], "name": "PERF_MOD"},
11193     {"bits": [31, 31], "name": "INTERLACED"}
11198     {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"},
11199     {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"},
11200     {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"},
11201     {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"},
11202     {"bits": [12, 15], "name": "BASE_LEVEL"},
11203     {"bits": [16, 19], "name": "LAST_LEVEL"},
11204     {"bits": [20, 24], "name": "TILING_INDEX"},
11205     {"bits": [25, 25], "name": "POW2_PAD"},
11206     {"bits": [26, 26], "name": "MTYPE"},
11207     {"bits": [27, 27], "name": "ATC"},
11208     {"bits": [28, 31], "enum_ref": "SQ_RSRC_IMG_TYPE", "name": "TYPE"}
11213     {"bits": [0, 12], "name": "DEPTH"},
11214     {"bits": [13, 26], "name": "PITCH"}
11219     {"bits": [0, 12], "name": "BASE_ARRAY"},
11220     {"bits": [13, 25], "name": "LAST_ARRAY"}
11225     {"bits": [0, 11], "name": "MIN_LOD_WARN"},
11226     {"bits": [12, 19], "name": "COUNTER_BANK_ID"},
11227     {"bits": [20, 20], "name": "LOD_HDW_CNT_EN"},
11228     {"bits": [21, 31], "name": "UNUNSED"}
11233     {"bits": [0, 2], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_X"},
11234     {"bits": [3, 5], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Y"},
11235     {"bits": [6, 8], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Z"},
11236     {"bits": [9, 11], "name": "MAX_ANISO_RATIO"},
11237     {"bits": [12, 14], "enum_ref": "SQ_TEX_DEPTH_COMPARE", "name": "DEPTH_COMPARE_FUNC"},
11238     {"bits": [15, 15], "name": "FORCE_UNNORMALIZED"},
11239     {"bits": [16, 18], "name": "ANISO_THRESHOLD"},
11240     {"bits": [19, 19], "name": "MC_COORD_TRUNC"},
11241     {"bits": [20, 20], "name": "FORCE_DEGAMMA"},
11242     {"bits": [21, 26], "name": "ANISO_BIAS"},
11243     {"bits": [27, 27], "name": "TRUNC_COORD"},
11244     {"bits": [28, 28], "name": "DISABLE_CUBE_WRAP"},
11245     {"bits": [29, 30], "enum_ref": "SQ_IMG_FILTER_TYPE", "name": "FILTER_MODE"}
11250     {"bits": [0, 11], "name": "MIN_LOD"},
11251     {"bits": [12, 23], "name": "MAX_LOD"},
11252     {"bits": [24, 27], "name": "PERF_MIP"},
11253     {"bits": [28, 31], "name": "PERF_Z"}
11258     {"bits": [0, 13], "name": "LOD_BIAS"},
11259     {"bits": [14, 19], "name": "LOD_BIAS_SEC"},
11260     {"bits": [20, 21], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MAG_FILTER"},
11261     {"bits": [22, 23], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MIN_FILTER"},
11262     {"bits": [24, 25], "enum_ref": "SQ_TEX_Z_FILTER", "name": "Z_FILTER"},
11263     {"bits": [26, 27], "enum_ref": "SQ_TEX_MIP_FILTER", "name": "MIP_FILTER"},
11264     {"bits": [28, 28], "name": "MIP_POINT_PRECLAMP"},
11265     {"bits": [29, 29], "name": "DISABLE_LSB_CEIL"},
11266     {"bits": [30, 30], "name": "FILTER_PREC_FIX"}
11271     {"bits": [0, 11], "name": "BORDER_COLOR_PTR"},
11272     {"bits": [29, 29], "name": "UPGRADED_DEPTH"},
11273     {"bits": [30, 31], "enum_ref": "SQ_TEX_BORDER_COLOR", "name": "BORDER_COLOR_TYPE"}
11278     {"bits": [0, 7], "name": "PERF_SEL"},
11279     {"bits": [12, 15], "name": "SQC_BANK_MASK"},
11280     {"bits": [16, 19], "name": "SQC_CLIENT_MASK"},
11281     {"bits": [20, 23], "name": "SPM_MODE"},
11282     {"bits": [24, 27], "name": "SIMD_MASK"},
11283     {"bits": [28, 31], "name": "PERF_MODE"}
11288     {"bits": [0, 0], "name": "PS_EN"},
11289     {"bits": [1, 1], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"},
11290     {"bits": [2, 2], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"},
11291     {"bits": [3, 3], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"},
11292     {"bits": [4, 4], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"},
11293     {"bits": [5, 5], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"},
11294     {"bits": [6, 6], "name": "CS_EN"},
11295     {"bits": [8, 12], "name": "CNTR_RATE"},
11296     {"bits": [13, 13], "name": "DISABLE_FLUSH"}
11301     {"bits": [0, 0], "name": "FORCE_EN"}
11306     {"bits": [0, 15], "name": "SH0_MASK"},
11307     {"bits": [16, 31], "name": "SH1_MASK"}
11312     {"bits": [0, 3], "name": "ADDR_HI"},
11313     {"bits": [4, 4], "name": "ATC"}
11318     {"bits": [31, 31], "name": "RESET_BUFFER"}
11323     {"bits": [0, 2], "name": "HIWATER"}
11328     {"bits": [0, 4], "name": "CU_SEL"},
11329     {"bits": [5, 5], "name": "SH_SEL"},
11330     {"bits": [7, 7], "name": "REG_STALL_EN"},
11331     {"bits": [8, 11], "name": "SIMD_EN"},
11332     {"bits": [12, 13], "name": "VM_ID_MASK"},
11333     {"bits": [14, 14], "name": "SPI_STALL_EN"},
11334     {"bits": [15, 15], "name": "SQ_STALL_EN"},
11335     {"bits": [16, 31], "name": "RANDOM_SEED"},
11336     {"bits": [16, 31], "name": "RANDOM_SEED"}
11341     {"bits": [0, 2], "name": "MASK_PS"},
11342     {"bits": [3, 5], "name": "MASK_VS"},
11343     {"bits": [6, 8], "name": "MASK_GS"},
11344     {"bits": [9, 11], "name": "MASK_ES"},
11345     {"bits": [12, 14], "name": "MASK_HS"},
11346     {"bits": [15, 17], "name": "MASK_LS"},
11347     {"bits": [18, 20], "name": "MASK_CS"},
11348     {"bits": [21, 22], "name": "MODE"},
11349     {"bits": [23, 24], "name": "CAPTURE_MODE"},
11350     {"bits": [25, 25], "name": "AUTOFLUSH_EN"},
11351     {"bits": [26, 26], "name": "PRIV"},
11352     {"bits": [27, 28], "name": "ISSUE_MASK"},
11353     {"bits": [29, 29], "name": "TEST_MODE"},
11354     {"bits": [30, 30], "name": "INTERRUPT_EN"},
11355     {"bits": [31, 31], "name": "WRAP"}
11360     {"bits": [0, 21], "name": "SIZE"}
11365     {"bits": [0, 9], "name": "FINISH_PENDING"},
11366     {"bits": [16, 25], "name": "FINISH_DONE"},
11367     {"bits": [29, 29], "name": "NEW_BUF"},
11368     {"bits": [30, 30], "name": "BUSY"},
11369     {"bits": [31, 31], "name": "FULL"}
11374     {"bits": [0, 15], "name": "TOKEN_MASK"},
11375     {"bits": [16, 23], "name": "REG_MASK"},
11376     {"bits": [24, 24], "name": "REG_DROP_ON_STALL"}
11381     {"bits": [0, 15], "name": "INST_MASK"}
11386     {"bits": [0, 29], "name": "WPTR"},
11387     {"bits": [30, 31], "name": "READ_OFFSET"}
11392     {"bits": [0, 5], "name": "VGPR_BASE"},
11393     {"bits": [8, 13], "name": "VGPR_SIZE"},
11394     {"bits": [16, 21], "name": "SGPR_BASE"},
11395     {"bits": [24, 27], "name": "SGPR_SIZE"}
11400     {"bits": [0, 3], "name": "WAVE_ID"},
11401     {"bits": [4, 5], "name": "SIMD_ID"},
11402     {"bits": [6, 7], "name": "PIPE_ID"},
11403     {"bits": [8, 11], "name": "CU_ID"},
11404     {"bits": [12, 12], "name": "SH_ID"},
11405     {"bits": [13, 14], "name": "SE_ID"},
11406     {"bits": [16, 19], "name": "TG_ID"},
11407     {"bits": [20, 23], "name": "VM_ID"},
11408     {"bits": [24, 26], "name": "QUEUE_ID"},
11409     {"bits": [27, 29], "name": "STATE_ID"},
11410     {"bits": [30, 31], "name": "ME_ID"}
11415     {"bits": [0, 2], "name": "IBUF_ST"},
11416     {"bits": [3, 3], "name": "PC_INVALID"},
11417     {"bits": [4, 4], "name": "NEED_NEXT_DW"},
11418     {"bits": [5, 7], "name": "NO_PREFETCH_CNT"},
11419     {"bits": [8, 9], "name": "IBUF_RPTR"},
11420     {"bits": [10, 11], "name": "IBUF_WPTR"},
11421     {"bits": [16, 18], "name": "INST_STR_ST"},
11422     {"bits": [19, 21], "name": "MISC_CNT"},
11423     {"bits": [22, 23], "name": "ECC_ST"},
11424     {"bits": [24, 24], "name": "IS_HYB"},
11425     {"bits": [25, 26], "name": "HYB_CNT"},
11426     {"bits": [27, 27], "name": "KILL"},
11427     {"bits": [28, 28], "name": "NEED_KILL_IFETCH"}
11432     {"bits": [0, 3], "name": "VM_CNT"},
11433     {"bits": [4, 6], "name": "EXP_CNT"},
11434     {"bits": [8, 11], "name": "LGKM_CNT"},
11435     {"bits": [12, 14], "name": "VALU_CNT"}
11440     {"bits": [0, 7], "name": "LDS_BASE"},
11441     {"bits": [12, 20], "name": "LDS_SIZE"}
11446     {"bits": [0, 3], "name": "FP_ROUND"},
11447     {"bits": [4, 7], "name": "FP_DENORM"},
11448     {"bits": [8, 8], "name": "DX10_CLAMP"},
11449     {"bits": [9, 9], "name": "IEEE"},
11450     {"bits": [10, 10], "name": "LOD_CLAMPED"},
11451     {"bits": [11, 11], "name": "DEBUG_EN"},
11452     {"bits": [12, 20], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
11453     {"bits": [28, 28], "name": "VSKIP"},
11454     {"bits": [29, 31], "name": "CSP"}
11459     {"bits": [0, 7], "name": "PC_HI"}
11464     {"bits": [0, 0], "name": "SCC"},
11465     {"bits": [1, 2], "name": "SPI_PRIO"},
11466     {"bits": [3, 4], "name": "WAVE_PRIO"},
11467     {"bits": [5, 5], "name": "PRIV"},
11468     {"bits": [6, 6], "name": "TRAP_EN"},
11469     {"bits": [7, 7], "name": "TTRACE_EN"},
11470     {"bits": [8, 8], "name": "EXPORT_RDY"},
11471     {"bits": [9, 9], "name": "EXECZ"},
11472     {"bits": [10, 10], "name": "VCCZ"},
11473     {"bits": [11, 11], "name": "IN_TG"},
11474     {"bits": [12, 12], "name": "IN_BARRIER"},
11475     {"bits": [13, 13], "name": "HALT"},
11476     {"bits": [14, 14], "name": "TRAP"},
11477     {"bits": [15, 15], "name": "TTRACE_CU_EN"},
11478     {"bits": [16, 16], "name": "VALID"},
11479     {"bits": [17, 17], "name": "ECC_ERR"},
11480     {"bits": [18, 18], "name": "SKIP_EXPORT"},
11481     {"bits": [19, 19], "name": "PERF_EN"},
11482     {"bits": [20, 20], "name": "COND_DBG_USER"},
11483     {"bits": [21, 21], "name": "COND_DBG_SYS"},
11484     {"bits": [22, 22], "name": "DATA_ATC"},
11485     {"bits": [23, 23], "name": "INST_ATC"},
11486     {"bits": [24, 26], "name": "DISPATCH_CACHE_CTRL"},
11487     {"bits": [27, 27], "name": "MUST_EXPORT"}
11492     {"bits": [0, 7], "name": "ADDR_HI"}
11497     {"bits": [0, 8], "enum_ref": "EXCP_EN", "name": "EXCP"},
11498     {"bits": [16, 21], "name": "EXCP_CYCLE"},
11499     {"bits": [29, 31], "name": "DP_RATE"}
11504     {"bits": [0, 9], "name": "PERFCOUNTER_SELECT"},
11505     {"bits": [10, 19], "name": "PERFCOUNTER_SELECT1"},
11506     {"bits": [20, 23], "name": "CNTR_MODE"}
11511     {"bits": [0, 9], "name": "PERFCOUNTER_SELECT2"},
11512     {"bits": [10, 19], "name": "PERFCOUNTER_SELECT3"}
11517     {"bits": [0, 7], "name": "ADDRESS"}
11522     {"bits": [0, 9], "name": "PERF_SEL2"},
11523     {"bits": [10, 19], "name": "PERF_SEL3"},
11524     {"bits": [24, 27], "name": "PERF_MODE2"},
11525     {"bits": [28, 31], "name": "PERF_MODE3"}
11530     {"bits": [0, 9], "name": "PERF_SEL"},
11531     {"bits": [20, 23], "name": "CNTR_MODE"},
11532     {"bits": [28, 31], "name": "PERF_MODE"}
11537     {"bits": [0, 7], "name": "PERF_SEL"},
11538     {"bits": [10, 17], "name": "PERF_SEL1"},
11539     {"bits": [20, 23], "name": "CNTR_MODE"},
11540     {"bits": [24, 27], "name": "PERF_MODE1"},
11541     {"bits": [28, 31], "name": "PERF_MODE"}
11546     {"bits": [0, 7], "name": "PERF_SEL2"},
11547     {"bits": [10, 17], "name": "PERF_SEL3"},
11548     {"bits": [24, 27], "name": "PERF_MODE3"},
11549     {"bits": [28, 31], "name": "PERF_MODE2"}
11554     {"bits": [0, 7], "name": "BASE_ADDR"}
11559     {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"},
11560     {"bits": [2, 3], "enum_ref": "VGT_DMA_SWAP_MODE", "name": "SWAP_MODE"},
11561     {"bits": [4, 5], "enum_ref": "VGT_DMA_BUF_TYPE", "name": "BUF_TYPE"},
11562     {"bits": [6, 7], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"},
11563     {"bits": [8, 8], "name": "ATC"},
11564     {"bits": [9, 9], "name": "NOT_EOP"},
11565     {"bits": [10, 10], "name": "REQ_PATH"}
11570     {"bits": [0, 1], "enum_ref": "VGT_DI_SOURCE_SELECT", "name": "SOURCE_SELECT"},
11571     {"bits": [2, 3], "enum_ref": "VGT_DI_MAJOR_MODE_SELECT", "name": "MAJOR_MODE"},
11572     {"bits": [4, 4], "name": "SPRITE_EN_R6XX"},
11573     {"bits": [5, 5], "name": "NOT_EOP"},
11574     {"bits": [6, 6], "name": "USE_OPAQUE"}
11579     {"bits": [0, 14], "name": "ITEMSIZE"}
11584     {"bits": [0, 10], "name": "ES_PER_GS"}
11589     {"bits": [0, 27], "name": "ADDRESS_LOW"}
11594     {"bits": [0, 5], "enum_ref": "VGT_EVENT_TYPE", "name": "EVENT_TYPE"},
11595     {"bits": [18, 26], "name": "ADDRESS_HI"},
11596     {"bits": [27, 27], "name": "EXTENDED_EVENT"}
11601     {"bits": [0, 3], "name": "DECR"}
11606     {"bits": [0, 3], "name": "FIRST_DECR"}
11611     {"bits": [0, 4], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"},
11612     {"bits": [14, 14], "name": "RETAIN_ORDER"},
11613     {"bits": [15, 15], "name": "RETAIN_QUADS"},
11614     {"bits": [16, 18], "name": "PRIM_ORDER"}
11619     {"bits": [0, 0], "name": "COMP_X_EN"},
11620     {"bits": [1, 1], "name": "COMP_Y_EN"},
11621     {"bits": [2, 2], "name": "COMP_Z_EN"},
11622     {"bits": [3, 3], "name": "COMP_W_EN"},
11623     {"bits": [8, 15], "name": "STRIDE"},
11624     {"bits": [16, 23], "name": "SHIFT"}
11629     {"bits": [0, 3], "name": "X_CONV"},
11630     {"bits": [4, 7], "name": "X_OFFSET"},
11631     {"bits": [8, 11], "name": "Y_CONV"},
11632     {"bits": [12, 15], "name": "Y_OFFSET"},
11633     {"bits": [16, 19], "name": "Z_CONV"},
11634     {"bits": [20, 23], "name": "Z_OFFSET"},
11635     {"bits": [24, 27], "name": "W_CONV"},
11636     {"bits": [28, 31], "name": "W_OFFSET"}
11641     {"bits": [0, 14], "name": "OFFSET"}
11646     {"bits": [0, 0], "name": "ENABLE"},
11647     {"bits": [2, 8], "name": "CNT"}
11652     {"bits": [0, 10], "name": "MAX_VERT_OUT"}
11657     {"bits": [0, 2], "enum_ref": "VGT_GS_MODE_TYPE", "name": "MODE"},
11658     {"bits": [3, 3], "name": "RESERVED_0"},
11659     {"bits": [4, 5], "enum_ref": "VGT_GS_CUT_MODE", "name": "CUT_MODE"},
11660     {"bits": [6, 10], "name": "RESERVED_1"},
11661     {"bits": [11, 11], "name": "GS_C_PACK_EN"},
11662     {"bits": [12, 12], "name": "RESERVED_2"},
11663     {"bits": [13, 13], "name": "ES_PASSTHRU"},
11664     {"bits": [14, 14], "name": "COMPUTE_MODE"},
11665     {"bits": [15, 15], "name": "FAST_COMPUTE_MODE"},
11666     {"bits": [16, 16], "name": "ELEMENT_INFO_EN"},
11667     {"bits": [17, 17], "name": "PARTIAL_THD_AT_EOI"},
11668     {"bits": [18, 18], "name": "SUPPRESS_CUTS"},
11669     {"bits": [19, 19], "name": "ES_WRITE_OPTIMIZE"},
11670     {"bits": [20, 20], "name": "GS_WRITE_OPTIMIZE"},
11671     {"bits": [21, 22], "name": "ONCHIP"}
11676     {"bits": [0, 10], "name": "ES_VERTS_PER_SUBGRP"},
11677     {"bits": [11, 21], "name": "GS_PRIMS_PER_SUBGRP"}
11682     {"bits": [0, 5], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE"},
11683     {"bits": [8, 13], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_1"},
11684     {"bits": [16, 21], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_2"},
11685     {"bits": [22, 27], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_3"},
11686     {"bits": [31, 31], "name": "UNIQUE_TYPE_PER_STREAM"}
11691     {"bits": [0, 10], "name": "GS_PER_ES"}
11696     {"bits": [0, 3], "name": "GS_PER_VS"}
11701     {"bits": [0, 1], "name": "TESS_MODE"}
11706     {"bits": [0, 7], "name": "REUSE_DEPTH"}
11711     {"bits": [0, 8], "name": "OFFCHIP_BUFFERING"},
11712     {"bits": [9, 10], "enum_ref": "VGT_HS_OFFCHIP_PARAM__OFFCHIP_GRANULARITY", "name": "OFFCHIP_GRANULARITY"}
11717     {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"}
11722     {"bits": [0, 7], "name": "NUM_PATCHES"},
11723     {"bits": [8, 13], "name": "HS_NUM_INPUT_CP"},
11724     {"bits": [14, 19], "name": "HS_NUM_OUTPUT_CP"}
11729     {"bits": [0, 0], "name": "RESET_EN"}
11734     {"bits": [0, 2], "name": "PATH_SELECT"}
11739     {"bits": [0, 6], "name": "DEALLOC_DIST"}
11744     {"bits": [0, 7], "name": "PERF_SEL"},
11745     {"bits": [28, 31], "name": "PERF_MODE"}
11750     {"bits": [0, 7], "name": "PERF_SEID_IGNORE_MASK"}
11755     {"bits": [0, 0], "name": "PRIMITIVEID_EN"},
11756     {"bits": [1, 1], "name": "DISABLE_RESET_ON_EOI"}
11761     {"bits": [0, 5], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"}
11766     {"bits": [0, 0], "name": "REUSE_OFF"}
11771     {"bits": [0, 1], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"},
11772     {"bits": [2, 2], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"},
11773     {"bits": [3, 4], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"},
11774     {"bits": [5, 5], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"},
11775     {"bits": [6, 7], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"},
11776     {"bits": [8, 8], "name": "DYNAMIC_HS"}
11781     {"bits": [0, 3], "name": "STREAM_0_BUFFER_EN"},
11782     {"bits": [4, 7], "name": "STREAM_1_BUFFER_EN"},
11783     {"bits": [8, 11], "name": "STREAM_2_BUFFER_EN"},
11784     {"bits": [12, 15], "name": "STREAM_3_BUFFER_EN"}
11789     {"bits": [0, 0], "name": "STREAMOUT_0_EN"},
11790     {"bits": [1, 1], "name": "STREAMOUT_1_EN"},
11791     {"bits": [2, 2], "name": "STREAMOUT_2_EN"},
11792     {"bits": [3, 3], "name": "STREAMOUT_3_EN"},
11793     {"bits": [4, 6], "name": "RAST_STREAM"},
11794     {"bits": [8, 11], "name": "RAST_STREAM_MASK"},
11795     {"bits": [31, 31], "name": "USE_RAST_STREAM_MASK"}
11800     {"bits": [0, 8], "name": "VERTEX_STRIDE"}
11805     {"bits": [0, 9], "name": "STRIDE"}
11810     {"bits": [0, 1], "enum_ref": "VGT_TESS_TYPE", "name": "TYPE"},
11811     {"bits": [2, 4], "enum_ref": "VGT_TESS_PARTITION", "name": "PARTITIONING"},
11812     {"bits": [5, 7], "enum_ref": "VGT_TESS_TOPOLOGY", "name": "TOPOLOGY"},
11813     {"bits": [8, 8], "name": "RESERVED_REDUC_AXIS"},
11814     {"bits": [9, 9], "name": "DEPRECATED"},
11815     {"bits": [10, 13], "name": "NUM_DS_WAVES_PER_SIMD"},
11816     {"bits": [14, 14], "name": "DISABLE_DONUTS"},
11817     {"bits": [15, 16], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"}
11822     {"bits": [0, 15], "name": "SIZE"}
11827     {"bits": [0, 7], "name": "VTX_REUSE_DEPTH"}
11832     {"bits": [0, 0], "name": "VTX_CNT_EN"}