Lines Matching refs:name

5     {"name": "ARRAY_LINEAR_GENERAL", "value": 0},
6     {"name": "ARRAY_LINEAR_ALIGNED", "value": 1},
7     {"name": "ARRAY_1D_TILED_THIN1", "value": 2},
8     {"name": "ARRAY_1D_TILED_THICK", "value": 3},
9     {"name": "ARRAY_2D_TILED_THIN1", "value": 4},
10     {"name": "ARRAY_PRT_TILED_THIN1", "value": 5},
11     {"name": "ARRAY_PRT_2D_TILED_THIN1", "value": 6},
12     {"name": "ARRAY_2D_TILED_THICK", "value": 7},
13     {"name": "ARRAY_2D_TILED_XTHICK", "value": 8},
14     {"name": "ARRAY_PRT_TILED_THICK", "value": 9},
15     {"name": "ARRAY_PRT_2D_TILED_THICK", "value": 10},
16     {"name": "ARRAY_PRT_3D_TILED_THIN1", "value": 11},
17     {"name": "ARRAY_3D_TILED_THIN1", "value": 12},
18     {"name": "ARRAY_3D_TILED_THICK", "value": 13},
19     {"name": "ARRAY_3D_TILED_XTHICK", "value": 14},
20     {"name": "ARRAY_PRT_3D_TILED_THICK", "value": 15}
25     {"name": "BUF_DATA_FORMAT_INVALID", "value": 0},
26     {"name": "BUF_DATA_FORMAT_8", "value": 1},
27     {"name": "BUF_DATA_FORMAT_16", "value": 2},
28     {"name": "BUF_DATA_FORMAT_8_8", "value": 3},
29     {"name": "BUF_DATA_FORMAT_32", "value": 4},
30     {"name": "BUF_DATA_FORMAT_16_16", "value": 5},
31     {"name": "BUF_DATA_FORMAT_10_11_11", "value": 6},
32     {"name": "BUF_DATA_FORMAT_11_11_10", "value": 7},
33     {"name": "BUF_DATA_FORMAT_10_10_10_2", "value": 8},
34     {"name": "BUF_DATA_FORMAT_2_10_10_10", "value": 9},
35     {"name": "BUF_DATA_FORMAT_8_8_8_8", "value": 10},
36     {"name": "BUF_DATA_FORMAT_32_32", "value": 11},
37     {"name": "BUF_DATA_FORMAT_16_16_16_16", "value": 12},
38     {"name": "BUF_DATA_FORMAT_32_32_32", "value": 13},
39     {"name": "BUF_DATA_FORMAT_32_32_32_32", "value": 14},
40     {"name": "BUF_DATA_FORMAT_RESERVED_15", "value": 15}
45     {"name": "BUF_NUM_FORMAT_UNORM", "value": 0},
46     {"name": "BUF_NUM_FORMAT_SNORM", "value": 1},
47     {"name": "BUF_NUM_FORMAT_USCALED", "value": 2},
48     {"name": "BUF_NUM_FORMAT_SSCALED", "value": 3},
49     {"name": "BUF_NUM_FORMAT_UINT", "value": 4},
50     {"name": "BUF_NUM_FORMAT_SINT", "value": 5},
51     {"name": "BUF_NUM_FORMAT_RESERVED_6", "value": 6},
52     {"name": "BUF_NUM_FORMAT_FLOAT", "value": 7}
57     {"name": "ADDR_SURF_BANK_HEIGHT_1", "value": 0},
58     {"name": "ADDR_SURF_BANK_HEIGHT_2", "value": 1},
59     {"name": "ADDR_SURF_BANK_HEIGHT_4", "value": 2},
60     {"name": "ADDR_SURF_BANK_HEIGHT_8", "value": 3}
65     {"name": "ADDR_SURF_BANK_WIDTH_1", "value": 0},
66     {"name": "ADDR_SURF_BANK_WIDTH_2", "value": 1},
67     {"name": "ADDR_SURF_BANK_WIDTH_4", "value": 2},
68     {"name": "ADDR_SURF_BANK_WIDTH_8", "value": 3}
73     {"name": "BLEND_ZERO", "value": 0},
74     {"name": "BLEND_ONE", "value": 1},
75     {"name": "BLEND_SRC_COLOR", "value": 2},
76     {"name": "BLEND_ONE_MINUS_SRC_COLOR", "value": 3},
77     {"name": "BLEND_SRC_ALPHA", "value": 4},
78     {"name": "BLEND_ONE_MINUS_SRC_ALPHA", "value": 5},
79     {"name": "BLEND_DST_ALPHA", "value": 6},
80     {"name": "BLEND_ONE_MINUS_DST_ALPHA", "value": 7},
81     {"name": "BLEND_DST_COLOR", "value": 8},
82     {"name": "BLEND_ONE_MINUS_DST_COLOR", "value": 9},
83     {"name": "BLEND_SRC_ALPHA_SATURATE", "value": 10},
84     {"name": "BLEND_BOTH_SRC_ALPHA", "value": 11},
85     {"name": "BLEND_BOTH_INV_SRC_ALPHA", "value": 12},
86     {"name": "BLEND_CONSTANT_COLOR", "value": 13},
87     {"name": "BLEND_ONE_MINUS_CONSTANT_COLOR", "value": 14},
88     {"name": "BLEND_SRC1_COLOR", "value": 15},
89     {"name": "BLEND_INV_SRC1_COLOR", "value": 16},
90     {"name": "BLEND_SRC1_ALPHA", "value": 17},
91     {"name": "BLEND_INV_SRC1_ALPHA", "value": 18},
92     {"name": "BLEND_CONSTANT_ALPHA", "value": 19},
93     {"name": "BLEND_ONE_MINUS_CONSTANT_ALPHA", "value": 20}
98     {"name": "FORCE_OPT_AUTO", "value": 0},
99     {"name": "FORCE_OPT_DISABLE", "value": 1},
100     {"name": "FORCE_OPT_ENABLE_IF_SRC_A_0", "value": 2},
101     {"name": "FORCE_OPT_ENABLE_IF_SRC_RGB_0", "value": 3},
102     {"name": "FORCE_OPT_ENABLE_IF_SRC_ARGB_0", "value": 4},
103     {"name": "FORCE_OPT_ENABLE_IF_SRC_A_1", "value": 5},
104     {"name": "FORCE_OPT_ENABLE_IF_SRC_RGB_1", "value": 6},
105     {"name": "FORCE_OPT_ENABLE_IF_SRC_ARGB_1", "value": 7}
110     {"name": "CB_DISABLE", "value": 0},
111     {"name": "CB_NORMAL", "value": 1},
112     {"name": "CB_ELIMINATE_FAST_CLEAR", "value": 2},
113     {"name": "CB_RESOLVE", "value": 3},
114     {"name": "CB_DECOMPRESS", "value": 4},
115     {"name": "CB_FMASK_DECOMPRESS", "value": 5},
116     {"name": "CB_DCC_DECOMPRESS", "value": 6}
121     {"name": "CB_PERF_CLEAR_FILTER_SEL_NONCLEAR", "value": 0},
122     {"name": "CB_PERF_CLEAR_FILTER_SEL_CLEAR", "value": 1}
127     {"name": "CB_PERF_OP_FILTER_SEL_WRITE_ONLY", "value": 0},
128     {"name": "CB_PERF_OP_FILTER_SEL_NEEDS_DESTINATION", "value": 1},
129     {"name": "CB_PERF_OP_FILTER_SEL_RESOLVE", "value": 2},
130     {"name": "CB_PERF_OP_FILTER_SEL_DECOMPRESS", "value": 3},
131     {"name": "CB_PERF_OP_FILTER_SEL_FMASK_DECOMPRESS", "value": 4},
132     {"name": "CB_PERF_OP_FILTER_SEL_ELIMINATE_FAST_CLEAR", "value": 5}
137     {"name": "MAX_BLOCK_SIZE_64B", "value": 0},
138     {"name": "MAX_BLOCK_SIZE_128B", "value": 1},
139     {"name": "MAX_BLOCK_SIZE_256B", "value": 2}
144     {"name": "MIN_BLOCK_SIZE_32B", "value": 0},
145     {"name": "MIN_BLOCK_SIZE_64B", "value": 1}
150     {"name": "OUT", "value": 1},
151     {"name": "IN_0", "value": 2},
152     {"name": "IN_1", "value": 4},
153     {"name": "IN_10", "value": 8},
154     {"name": "IN_2", "value": 16},
155     {"name": "IN_20", "value": 32},
156     {"name": "IN_21", "value": 64},
157     {"name": "IN_210", "value": 128},
158     {"name": "IN_3", "value": 256},
159     {"name": "IN_30", "value": 512},
160     {"name": "IN_31", "value": 1024},
161     {"name": "IN_310", "value": 2048},
162     {"name": "IN_32", "value": 4096},
163     {"name": "IN_320", "value": 8192},
164     {"name": "IN_321", "value": 16384},
165     {"name": "IN_3210", "value": 32768}
170     {"name": "CP_PERFMON_ENABLE_MODE_ALWAYS_COUNT", "value": 0},
171     {"name": "CP_PERFMON_ENABLE_MODE_RESERVED_1", "value": 1},
172     {"name": "CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_TRUE", "value": 2},
173     {"name": "CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_FALSE", "value": 3}
178     {"name": "CP_PERFMON_STATE_DISABLE_AND_RESET", "value": 0},
179     {"name": "CP_PERFMON_STATE_START_COUNTING", "value": 1},
180     {"name": "CP_PERFMON_STATE_STOP_COUNTING", "value": 2},
181     {"name": "CP_PERFMON_STATE_RESERVED_3", "value": 3},
182     {"name": "CP_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM", "value": 4},
183     {"name": "CP_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM", "value": 5}
188     {"name": "CMASK_ADDR_TILED", "value": 0},
189     {"name": "CMASK_ADDR_LINEAR", "value": 1},
190     {"name": "CMASK_ADDR_COMPATIBLE", "value": 2}
195     {"name": "COLOR_INVALID", "value": 0},
196     {"name": "COLOR_8", "value": 1},
197     {"name": "COLOR_16", "value": 2},
198     {"name": "COLOR_8_8", "value": 3},
199     {"name": "COLOR_32", "value": 4},
200     {"name": "COLOR_16_16", "value": 5},
201     {"name": "COLOR_10_11_11", "value": 6},
202     {"name": "COLOR_11_11_10", "value": 7},
203     {"name": "COLOR_10_10_10_2", "value": 8},
204     {"name": "COLOR_2_10_10_10", "value": 9},
205     {"name": "COLOR_8_8_8_8", "value": 10},
206     {"name": "COLOR_32_32", "value": 11},
207     {"name": "COLOR_16_16_16_16", "value": 12},
208     {"name": "COLOR_RESERVED_13", "value": 13},
209     {"name": "COLOR_32_32_32_32", "value": 14},
210     {"name": "COLOR_RESERVED_15", "value": 15},
211     {"name": "COLOR_5_6_5", "value": 16},
212     {"name": "COLOR_1_5_5_5", "value": 17},
213     {"name": "COLOR_5_5_5_1", "value": 18},
214     {"name": "COLOR_4_4_4_4", "value": 19},
215     {"name": "COLOR_8_24", "value": 20},
216     {"name": "COLOR_24_8", "value": 21},
217     {"name": "COLOR_X24_8_32_FLOAT", "value": 22},
218     {"name": "COLOR_RESERVED_23", "value": 23}
223     {"name": "COMB_DST_PLUS_SRC", "value": 0},
224     {"name": "COMB_SRC_MINUS_DST", "value": 1},
225     {"name": "COMB_MIN_DST_SRC", "value": 2},
226     {"name": "COMB_MAX_DST_SRC", "value": 3},
227     {"name": "COMB_DST_MINUS_SRC", "value": 4}
232     {"name": "FRAG_NEVER", "value": 0},
233     {"name": "FRAG_LESS", "value": 1},
234     {"name": "FRAG_EQUAL", "value": 2},
235     {"name": "FRAG_LEQUAL", "value": 3},
236     {"name": "FRAG_GREATER", "value": 4},
237     {"name": "FRAG_NOTEQUAL", "value": 5},
238     {"name": "FRAG_GEQUAL", "value": 6},
239     {"name": "FRAG_ALWAYS", "value": 7}
244     {"name": "EXPORT_ANY_Z", "value": 0},
245     {"name": "EXPORT_LESS_THAN_Z", "value": 1},
246     {"name": "EXPORT_GREATER_THAN_Z", "value": 2},
247     {"name": "EXPORT_RESERVED", "value": 3}
252     {"name": "PSLC_AUTO", "value": 0},
253     {"name": "PSLC_ON_HANG_ONLY", "value": 1},
254     {"name": "PSLC_ASAP", "value": 2},
255     {"name": "PSLC_COUNTDOWN", "value": 3}
260     {"name": "INVALID", "value": 1},
261     {"name": "INPUT_DENORMAL", "value": 2},
262     {"name": "DIVIDE_BY_ZERO", "value": 4},
263     {"name": "OVERFLOW", "value": 8},
264     {"name": "UNDERFLOW", "value": 16},
265     {"name": "INEXACT", "value": 32},
266     {"name": "INT_DIVIDE_BY_ZERO", "value": 64},
267     {"name": "ADDRESS_WATCH", "value": 128},
268     {"name": "MEMORY_VIOLATION", "value": 256}
273     {"name": "FP_32_DENORMS", "value": 48},
274     {"name": "FP_64_DENORMS", "value": 192},
275     {"name": "FP_ALL_DENORMS", "value": 240}
280     {"name": "FORCE_OFF", "value": 0},
281     {"name": "FORCE_ENABLE", "value": 1},
282     {"name": "FORCE_DISABLE", "value": 2},
283     {"name": "FORCE_RESERVED", "value": 3}
288     {"name": "IMG_DATA_FORMAT_INVALID", "value": 0},
289     {"name": "IMG_DATA_FORMAT_8", "value": 1},
290     {"name": "IMG_DATA_FORMAT_16", "value": 2},
291     {"name": "IMG_DATA_FORMAT_8_8", "value": 3},
292     {"name": "IMG_DATA_FORMAT_32", "value": 4},
293     {"name": "IMG_DATA_FORMAT_16_16", "value": 5},
294     {"name": "IMG_DATA_FORMAT_10_11_11", "value": 6},
295     {"name": "IMG_DATA_FORMAT_11_11_10", "value": 7},
296     {"name": "IMG_DATA_FORMAT_10_10_10_2", "value": 8},
297     {"name": "IMG_DATA_FORMAT_2_10_10_10", "value": 9},
298     {"name": "IMG_DATA_FORMAT_8_8_8_8", "value": 10},
299     {"name": "IMG_DATA_FORMAT_32_32", "value": 11},
300     {"name": "IMG_DATA_FORMAT_16_16_16_16", "value": 12},
301     {"name": "IMG_DATA_FORMAT_32_32_32", "value": 13},
302     {"name": "IMG_DATA_FORMAT_32_32_32_32", "value": 14},
303     {"name": "IMG_DATA_FORMAT_RESERVED_15", "value": 15},
304     {"name": "IMG_DATA_FORMAT_5_6_5", "value": 16},
305     {"name": "IMG_DATA_FORMAT_1_5_5_5", "value": 17},
306     {"name": "IMG_DATA_FORMAT_5_5_5_1", "value": 18},
307     {"name": "IMG_DATA_FORMAT_4_4_4_4", "value": 19},
308     {"name": "IMG_DATA_FORMAT_8_24", "value": 20},
309     {"name": "IMG_DATA_FORMAT_24_8", "value": 21},
310     {"name": "IMG_DATA_FORMAT_X24_8_32", "value": 22},
311     {"name": "IMG_DATA_FORMAT_RESERVED_23", "value": 23},
312     {"name": "IMG_DATA_FORMAT_RESERVED_24", "value": 24},
313     {"name": "IMG_DATA_FORMAT_RESERVED_25", "value": 25},
314     {"name": "IMG_DATA_FORMAT_RESERVED_26", "value": 26},
315     {"name": "IMG_DATA_FORMAT_RESERVED_27", "value": 27},
316     {"name": "IMG_DATA_FORMAT_RESERVED_28", "value": 28},
317     {"name": "IMG_DATA_FORMAT_RESERVED_29", "value": 29},
318     {"name": "IMG_DATA_FORMAT_RESERVED_30", "value": 30},
319     {"name": "IMG_DATA_FORMAT_RESERVED_31", "value": 31},
320     {"name": "IMG_DATA_FORMAT_GB_GR", "value": 32},
321     {"name": "IMG_DATA_FORMAT_BG_RG", "value": 33},
322     {"name": "IMG_DATA_FORMAT_5_9_9_9", "value": 34},
323     {"name": "IMG_DATA_FORMAT_BC1", "value": 35},
324     {"name": "IMG_DATA_FORMAT_BC2", "value": 36},
325     {"name": "IMG_DATA_FORMAT_BC3", "value": 37},
326     {"name": "IMG_DATA_FORMAT_BC4", "value": 38},
327     {"name": "IMG_DATA_FORMAT_BC5", "value": 39},
328     {"name": "IMG_DATA_FORMAT_BC6", "value": 40},
329     {"name": "IMG_DATA_FORMAT_BC7", "value": 41},
330     {"name": "IMG_DATA_FORMAT_RESERVED_42", "value": 42},
331     {"name": "IMG_DATA_FORMAT_RESERVED_43", "value": 43},
332     {"name": "IMG_DATA_FORMAT_FMASK8_S2_F1", "value": 44},
333     {"name": "IMG_DATA_FORMAT_FMASK8_S4_F1", "value": 45},
334     {"name": "IMG_DATA_FORMAT_FMASK8_S8_F1", "value": 46},
335     {"name": "IMG_DATA_FORMAT_FMASK8_S2_F2", "value": 47},
336     {"name": "IMG_DATA_FORMAT_FMASK8_S4_F2", "value": 48},
337     {"name": "IMG_DATA_FORMAT_FMASK8_S4_F4", "value": 49},
338     {"name": "IMG_DATA_FORMAT_FMASK16_S16_F1", "value": 50},
339     {"name": "IMG_DATA_FORMAT_FMASK16_S8_F2", "value": 51},
340     {"name": "IMG_DATA_FORMAT_FMASK32_S16_F2", "value": 52},
341     {"name": "IMG_DATA_FORMAT_FMASK32_S8_F4", "value": 53},
342     {"name": "IMG_DATA_FORMAT_FMASK32_S8_F8", "value": 54},
343     {"name": "IMG_DATA_FORMAT_FMASK64_S16_F4", "value": 55},
344     {"name": "IMG_DATA_FORMAT_FMASK64_S16_F8", "value": 56},
345     {"name": "IMG_DATA_FORMAT_4_4", "value": 57},
346     {"name": "IMG_DATA_FORMAT_6_5_5", "value": 58},
347     {"name": "IMG_DATA_FORMAT_1", "value": 59},
348     {"name": "IMG_DATA_FORMAT_1_REVERSED", "value": 60},
349     {"name": "IMG_DATA_FORMAT_32_AS_8", "value": 61},
350     {"name": "IMG_DATA_FORMAT_32_AS_8_8", "value": 62},
351     {"name": "IMG_DATA_FORMAT_32_AS_32_32_32_32", "value": 63}
356     {"name": "IMG_NUM_FORMAT_UNORM", "value": 0},
357     {"name": "IMG_NUM_FORMAT_SNORM", "value": 1},
358     {"name": "IMG_NUM_FORMAT_USCALED", "value": 2},
359     {"name": "IMG_NUM_FORMAT_SSCALED", "value": 3},
360     {"name": "IMG_NUM_FORMAT_UINT", "value": 4},
361     {"name": "IMG_NUM_FORMAT_SINT", "value": 5},
362     {"name": "IMG_NUM_FORMAT_RESERVED_6", "value": 6},
363     {"name": "IMG_NUM_FORMAT_FLOAT", "value": 7},
364     {"name": "IMG_NUM_FORMAT_RESERVED_8", "value": 8},
365     {"name": "IMG_NUM_FORMAT_SRGB", "value": 9},
366     {"name": "IMG_NUM_FORMAT_RESERVED_10", "value": 10},
367     {"name": "IMG_NUM_FORMAT_RESERVED_11", "value": 11},
368     {"name": "IMG_NUM_FORMAT_RESERVED_12", "value": 12},
369     {"name": "IMG_NUM_FORMAT_RESERVED_13", "value": 13},
370     {"name": "IMG_NUM_FORMAT_RESERVED_14", "value": 14},
371     {"name": "IMG_NUM_FORMAT_RESERVED_15", "value": 15}
376     {"name": "ADDR_SURF_MACRO_ASPECT_1", "value": 0},
377     {"name": "ADDR_SURF_MACRO_ASPECT_2", "value": 1},
378     {"name": "ADDR_SURF_MACRO_ASPECT_4", "value": 2},
379     {"name": "ADDR_SURF_MACRO_ASPECT_8", "value": 3}
384     {"name": "ADDR_SURF_DISPLAY_MICRO_TILING", "value": 0},
385     {"name": "ADDR_SURF_THIN_MICRO_TILING", "value": 1},
386     {"name": "ADDR_SURF_DEPTH_MICRO_TILING", "value": 2},
387     {"name": "ADDR_SURF_ROTATED_MICRO_TILING", "value": 3},
388     {"name": "ADDR_SURF_THICK_MICRO_TILING", "value": 4}
393     {"name": "ADDR_SURF_2_BANK", "value": 0},
394     {"name": "ADDR_SURF_4_BANK", "value": 1},
395     {"name": "ADDR_SURF_8_BANK", "value": 2},
396     {"name": "ADDR_SURF_16_BANK", "value": 3}
401     {"name": "X_DRAW_POINTS", "value": 0},
402     {"name": "X_DRAW_LINES", "value": 1},
403     {"name": "X_DRAW_TRIANGLES", "value": 2}
408     {"name": "X_DISABLE_POLY_MODE", "value": 0},
409     {"name": "X_DUAL_MODE", "value": 1}
414     {"name": "X_TRUNCATE", "value": 0},
415     {"name": "X_ROUND", "value": 1},
416     {"name": "X_ROUND_TO_EVEN", "value": 2},
417     {"name": "X_ROUND_TO_ODD", "value": 3}
422     {"name": "ADDR_SURF_P2", "value": 0},
423     {"name": "ADDR_SURF_P2_RESERVED0", "value": 1},
424     {"name": "ADDR_SURF_P2_RESERVED1", "value": 2},
425     {"name": "ADDR_SURF_P2_RESERVED2", "value": 3},
426     {"name": "ADDR_SURF_P4_8x16", "value": 4},
427     {"name": "ADDR_SURF_P4_16x16", "value": 5},
428     {"name": "ADDR_SURF_P4_16x32", "value": 6},
429     {"name": "ADDR_SURF_P4_32x32", "value": 7},
430     {"name": "ADDR_SURF_P8_16x16_8x16", "value": 8},
431     {"name": "ADDR_SURF_P8_16x32_8x16", "value": 9},
432     {"name": "ADDR_SURF_P8_32x32_8x16", "value": 10},
433     {"name": "ADDR_SURF_P8_16x32_16x16", "value": 11},
434     {"name": "ADDR_SURF_P8_32x32_16x16", "value": 12},
435     {"name": "ADDR_SURF_P8_32x32_16x32", "value": 13},
436     {"name": "ADDR_SURF_P8_32x64_32x32", "value": 14},
437     {"name": "ADDR_SURF_P8_RESERVED0", "value": 15},
438     {"name": "ADDR_SURF_P16_32x32_8x16", "value": 16},
439     {"name": "ADDR_SURF_P16_32x32_16x16", "value": 17}
444     {"name": "RASTER_CONFIG_PKR_MAP_0", "value": 0},
445     {"name": "RASTER_CONFIG_PKR_MAP_1", "value": 1},
446     {"name": "RASTER_CONFIG_PKR_MAP_2", "value": 2},
447     {"name": "RASTER_CONFIG_PKR_MAP_3", "value": 3}
452     {"name": "RASTER_CONFIG_PKR_XSEL_0", "value": 0},
453     {"name": "RASTER_CONFIG_PKR_XSEL_1", "value": 1},
454     {"name": "RASTER_CONFIG_PKR_XSEL_2", "value": 2},
455     {"name": "RASTER_CONFIG_PKR_XSEL_3", "value": 3}
460     {"name": "RASTER_CONFIG_PKR_XSEL2_0", "value": 0},
461     {"name": "RASTER_CONFIG_PKR_XSEL2_1", "value": 1},
462     {"name": "RASTER_CONFIG_PKR_XSEL2_2", "value": 2},
463     {"name": "RASTER_CONFIG_PKR_XSEL2_3", "value": 3}
468     {"name": "RASTER_CONFIG_PKR_YSEL_0", "value": 0},
469     {"name": "RASTER_CONFIG_PKR_YSEL_1", "value": 1},
470     {"name": "RASTER_CONFIG_PKR_YSEL_2", "value": 2},
471     {"name": "RASTER_CONFIG_PKR_YSEL_3", "value": 3}
476     {"name": "X_16_8_FIXED_POINT_1_16TH", "value": 0},
477     {"name": "X_16_8_FIXED_POINT_1_8TH", "value": 1},
478     {"name": "X_16_8_FIXED_POINT_1_4TH", "value": 2},
479     {"name": "X_16_8_FIXED_POINT_1_2", "value": 3},
480     {"name": "X_16_8_FIXED_POINT_1", "value": 4},
481     {"name": "X_16_8_FIXED_POINT_1_256TH", "value": 5},
482     {"name": "X_14_10_FIXED_POINT_1_1024TH", "value": 6},
483     {"name": "X_12_12_FIXED_POINT_1_4096TH", "value": 7}
488     {"name": "ROP3_CLEAR", "value": 0},
489     {"name": "X_0X05", "value": 5},
490     {"name": "X_0X0A", "value": 10},
491     {"name": "X_0X0F", "value": 15},
492     {"name": "ROP3_NOR", "value": 17},
493     {"name": "ROP3_AND_INVERTED", "value": 34},
494     {"name": "ROP3_COPY_INVERTED", "value": 51},
495     {"name": "ROP3_AND_REVERSE", "value": 68},
496     {"name": "X_0X50", "value": 80},
497     {"name": "ROP3_INVERT", "value": 85},
498     {"name": "X_0X5A", "value": 90},
499     {"name": "X_0X5F", "value": 95},
500     {"name": "ROP3_XOR", "value": 102},
501     {"name": "ROP3_NAND", "value": 119},
502     {"name": "ROP3_AND", "value": 136},
503     {"name": "ROP3_EQUIVALENT", "value": 153},
504     {"name": "X_0XA0", "value": 160},
505     {"name": "X_0XA5", "value": 165},
506     {"name": "ROP3_NO_OP", "value": 170},
507     {"name": "X_0XAF", "value": 175},
508     {"name": "ROP3_OR_INVERTED", "value": 187},
509     {"name": "ROP3_COPY", "value": 204},
510     {"name": "ROP3_OR_REVERSE", "value": 221},
511     {"name": "ROP3_OR", "value": 238},
512     {"name": "X_0XF0", "value": 240},
513     {"name": "X_0XF5", "value": 245},
514     {"name": "X_0XFA", "value": 250},
515     {"name": "ROP3_SET", "value": 255}
520     {"name": "RASTER_CONFIG_RB_MAP_0", "value": 0},
521     {"name": "RASTER_CONFIG_RB_MAP_1", "value": 1},
522     {"name": "RASTER_CONFIG_RB_MAP_2", "value": 2},
523     {"name": "RASTER_CONFIG_RB_MAP_3", "value": 3}
528     {"name": "RASTER_CONFIG_RB_XSEL_0", "value": 0},
529     {"name": "RASTER_CONFIG_RB_XSEL_1", "value": 1}
534     {"name": "RASTER_CONFIG_RB_XSEL2_0", "value": 0},
535     {"name": "RASTER_CONFIG_RB_XSEL2_1", "value": 1},
536     {"name": "RASTER_CONFIG_RB_XSEL2_2", "value": 2},
537     {"name": "RASTER_CONFIG_RB_XSEL2_3", "value": 3}
542     {"name": "RASTER_CONFIG_RB_YSEL_0", "value": 0},
543     {"name": "RASTER_CONFIG_RB_YSEL_1", "value": 1}
548     {"name": "SPI_PNT_SPRITE_SEL_0", "value": 0},
549     {"name": "SPI_PNT_SPRITE_SEL_1", "value": 1},
550     {"name": "SPI_PNT_SPRITE_SEL_S", "value": 2},
551     {"name": "SPI_PNT_SPRITE_SEL_T", "value": 3},
552     {"name": "SPI_PNT_SPRITE_SEL_NONE", "value": 4}
557     {"name": "SPI_SHADER_ZERO", "value": 0},
558     {"name": "SPI_SHADER_32_R", "value": 1},
559     {"name": "SPI_SHADER_32_GR", "value": 2},
560     {"name": "SPI_SHADER_32_AR", "value": 3},
561     {"name": "SPI_SHADER_FP16_ABGR", "value": 4},
562     {"name": "SPI_SHADER_UNORM16_ABGR", "value": 5},
563     {"name": "SPI_SHADER_SNORM16_ABGR", "value": 6},
564     {"name": "SPI_SHADER_UINT16_ABGR", "value": 7},
565     {"name": "SPI_SHADER_SINT16_ABGR", "value": 8},
566     {"name": "SPI_SHADER_32_ABGR", "value": 9}
571     {"name": "SPI_SHADER_NONE", "value": 0},
572     {"name": "SPI_SHADER_1COMP", "value": 1},
573     {"name": "SPI_SHADER_2COMP", "value": 2},
574     {"name": "SPI_SHADER_4COMPRESS", "value": 3},
575     {"name": "SPI_SHADER_4COMP", "value": 4}
580     {"name": "STRM_PERFMON_STATE_DISABLE_AND_RESET", "value": 0},
581     {"name": "STRM_PERFMON_STATE_START_COUNTING", "value": 1},
582     {"name": "STRM_PERFMON_STATE_STOP_COUNTING", "value": 2},
583     {"name": "STRM_PERFMON_STATE_RESERVED_3", "value": 3},
584     {"name": "STRM_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM", "value": 4},
585     {"name": "STRM_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM", "value": 5}
590     {"name": "SQ_IMG_FILTER_MODE_BLEND", "value": 0},
591     {"name": "SQ_IMG_FILTER_MODE_MIN", "value": 1},
592     {"name": "SQ_IMG_FILTER_MODE_MAX", "value": 2}
597     {"name": "SQ_RSRC_BUF", "value": 0},
598     {"name": "SQ_RSRC_BUF_RSVD_1", "value": 1},
599     {"name": "SQ_RSRC_BUF_RSVD_2", "value": 2},
600     {"name": "SQ_RSRC_BUF_RSVD_3", "value": 3}
605     {"name": "SQ_RSRC_IMG_RSVD_0", "value": 0},
606     {"name": "SQ_RSRC_IMG_RSVD_1", "value": 1},
607     {"name": "SQ_RSRC_IMG_RSVD_2", "value": 2},
608     {"name": "SQ_RSRC_IMG_RSVD_3", "value": 3},
609     {"name": "SQ_RSRC_IMG_RSVD_4", "value": 4},
610     {"name": "SQ_RSRC_IMG_RSVD_5", "value": 5},
611     {"name": "SQ_RSRC_IMG_RSVD_6", "value": 6},
612     {"name": "SQ_RSRC_IMG_RSVD_7", "value": 7},
613     {"name": "SQ_RSRC_IMG_1D", "value": 8},
614     {"name": "SQ_RSRC_IMG_2D", "value": 9},
615     {"name": "SQ_RSRC_IMG_3D", "value": 10},
616     {"name": "SQ_RSRC_IMG_CUBE", "value": 11},
617     {"name": "SQ_RSRC_IMG_1D_ARRAY", "value": 12},
618     {"name": "SQ_RSRC_IMG_2D_ARRAY", "value": 13},
619     {"name": "SQ_RSRC_IMG_2D_MSAA", "value": 14},
620     {"name": "SQ_RSRC_IMG_2D_MSAA_ARRAY", "value": 15}
625     {"name": "SQ_SEL_0", "value": 0},
626     {"name": "SQ_SEL_1", "value": 1},
627     {"name": "SQ_SEL_RESERVED_0", "value": 2},
628     {"name": "SQ_SEL_RESERVED_1", "value": 3},
629     {"name": "SQ_SEL_X", "value": 4},
630     {"name": "SQ_SEL_Y", "value": 5},
631     {"name": "SQ_SEL_Z", "value": 6},
632     {"name": "SQ_SEL_W", "value": 7}
637     {"name": "SQ_TEX_BORDER_COLOR_TRANS_BLACK", "value": 0},
638     {"name": "SQ_TEX_BORDER_COLOR_OPAQUE_BLACK", "value": 1},
639     {"name": "SQ_TEX_BORDER_COLOR_OPAQUE_WHITE", "value": 2},
640     {"name": "SQ_TEX_BORDER_COLOR_REGISTER", "value": 3}
645     {"name": "SQ_TEX_WRAP", "value": 0},
646     {"name": "SQ_TEX_MIRROR", "value": 1},
647     {"name": "SQ_TEX_CLAMP_LAST_TEXEL", "value": 2},
648     {"name": "SQ_TEX_MIRROR_ONCE_LAST_TEXEL", "value": 3},
649     {"name": "SQ_TEX_CLAMP_HALF_BORDER", "value": 4},
650     {"name": "SQ_TEX_MIRROR_ONCE_HALF_BORDER", "value": 5},
651     {"name": "SQ_TEX_CLAMP_BORDER", "value": 6},
652     {"name": "SQ_TEX_MIRROR_ONCE_BORDER", "value": 7}
657     {"name": "SQ_TEX_DEPTH_COMPARE_NEVER", "value": 0},
658     {"name": "SQ_TEX_DEPTH_COMPARE_LESS", "value": 1},
659     {"name": "SQ_TEX_DEPTH_COMPARE_EQUAL", "value": 2},
660     {"name": "SQ_TEX_DEPTH_COMPARE_LESSEQUAL", "value": 3},
661     {"name": "SQ_TEX_DEPTH_COMPARE_GREATER", "value": 4},
662     {"name": "SQ_TEX_DEPTH_COMPARE_NOTEQUAL", "value": 5},
663     {"name": "SQ_TEX_DEPTH_COMPARE_GREATEREQUAL", "value": 6},
664     {"name": "SQ_TEX_DEPTH_COMPARE_ALWAYS", "value": 7}
669     {"name": "SQ_TEX_MIP_FILTER_NONE", "value": 0},
670     {"name": "SQ_TEX_MIP_FILTER_POINT", "value": 1},
671     {"name": "SQ_TEX_MIP_FILTER_LINEAR", "value": 2},
672     {"name": "SQ_TEX_MIP_FILTER_POINT_ANISO_ADJ", "value": 3}
677     {"name": "SQ_TEX_XY_FILTER_POINT", "value": 0},
678     {"name": "SQ_TEX_XY_FILTER_BILINEAR", "value": 1},
679     {"name": "SQ_TEX_XY_FILTER_ANISO_POINT", "value": 2},
680     {"name": "SQ_TEX_XY_FILTER_ANISO_BILINEAR", "value": 3}
685     {"name": "SQ_TEX_Z_FILTER_NONE", "value": 0},
686     {"name": "SQ_TEX_Z_FILTER_POINT", "value": 1},
687     {"name": "SQ_TEX_Z_FILTER_LINEAR", "value": 2}
692     {"name": "RASTER_CONFIG_SC_MAP_0", "value": 0},
693     {"name": "RASTER_CONFIG_SC_MAP_1", "value": 1},
694     {"name": "RASTER_CONFIG_SC_MAP_2", "value": 2},
695     {"name": "RASTER_CONFIG_SC_MAP_3", "value": 3}
700     {"name": "RASTER_CONFIG_SC_XSEL_8_WIDE_TILE", "value": 0},
701     {"name": "RASTER_CONFIG_SC_XSEL_16_WIDE_TILE", "value": 1},
702     {"name": "RASTER_CONFIG_SC_XSEL_32_WIDE_TILE", "value": 2},
703     {"name": "RASTER_CONFIG_SC_XSEL_64_WIDE_TILE", "value": 3}
708     {"name": "RASTER_CONFIG_SC_YSEL_8_WIDE_TILE", "value": 0},
709     {"name": "RASTER_CONFIG_SC_YSEL_16_WIDE_TILE", "value": 1},
710     {"name": "RASTER_CONFIG_SC_YSEL_32_WIDE_TILE", "value": 2},
711     {"name": "RASTER_CONFIG_SC_YSEL_64_WIDE_TILE", "value": 3}
716     {"name": "RASTER_CONFIG_SE_MAP_0", "value": 0},
717     {"name": "RASTER_CONFIG_SE_MAP_1", "value": 1},
718     {"name": "RASTER_CONFIG_SE_MAP_2", "value": 2},
719     {"name": "RASTER_CONFIG_SE_MAP_3", "value": 3}
724     {"name": "RASTER_CONFIG_SE_PAIR_MAP_0", "value": 0},
725     {"name": "RASTER_CONFIG_SE_PAIR_MAP_1", "value": 1},
726     {"name": "RASTER_CONFIG_SE_PAIR_MAP_2", "value": 2},
727     {"name": "RASTER_CONFIG_SE_PAIR_MAP_3", "value": 3}
732     {"name": "RASTER_CONFIG_SE_PAIR_XSEL_8_WIDE_TILE", "value": 0},
733     {"name": "RASTER_CONFIG_SE_PAIR_XSEL_16_WIDE_TILE", "value": 1},
734     {"name": "RASTER_CONFIG_SE_PAIR_XSEL_32_WIDE_TILE", "value": 2},
735     {"name": "RASTER_CONFIG_SE_PAIR_XSEL_64_WIDE_TILE", "value": 3}
740     {"name": "RASTER_CONFIG_SE_PAIR_YSEL_8_WIDE_TILE", "value": 0},
741     {"name": "RASTER_CONFIG_SE_PAIR_YSEL_16_WIDE_TILE", "value": 1},
742     {"name": "RASTER_CONFIG_SE_PAIR_YSEL_32_WIDE_TILE", "value": 2},
743     {"name": "RASTER_CONFIG_SE_PAIR_YSEL_64_WIDE_TILE", "value": 3}
748     {"name": "RASTER_CONFIG_SE_XSEL_8_WIDE_TILE", "value": 0},
749     {"name": "RASTER_CONFIG_SE_XSEL_16_WIDE_TILE", "value": 1},
750     {"name": "RASTER_CONFIG_SE_XSEL_32_WIDE_TILE", "value": 2},
751     {"name": "RASTER_CONFIG_SE_XSEL_64_WIDE_TILE", "value": 3}
756     {"name": "RASTER_CONFIG_SE_YSEL_8_WIDE_TILE", "value": 0},
757     {"name": "RASTER_CONFIG_SE_YSEL_16_WIDE_TILE", "value": 1},
758     {"name": "RASTER_CONFIG_SE_YSEL_32_WIDE_TILE", "value": 2},
759     {"name": "RASTER_CONFIG_SE_YSEL_64_WIDE_TILE", "value": 3}
764     {"name": "STENCIL_INVALID", "value": 0},
765     {"name": "STENCIL_8", "value": 1}
770     {"name": "STENCIL_KEEP", "value": 0},
771     {"name": "STENCIL_ZERO", "value": 1},
772     {"name": "STENCIL_ONES", "value": 2},
773     {"name": "STENCIL_REPLACE_TEST", "value": 3},
774     {"name": "STENCIL_REPLACE_OP", "value": 4},
775     {"name": "STENCIL_ADD_CLAMP", "value": 5},
776     {"name": "STENCIL_SUB_CLAMP", "value": 6},
777     {"name": "STENCIL_INVERT", "value": 7},
778     {"name": "STENCIL_ADD_WRAP", "value": 8},
779     {"name": "STENCIL_SUB_WRAP", "value": 9},
780     {"name": "STENCIL_AND", "value": 10},
781     {"name": "STENCIL_OR", "value": 11},
782     {"name": "STENCIL_XOR", "value": 12},
783     {"name": "STENCIL_NAND", "value": 13},
784     {"name": "STENCIL_NOR", "value": 14},
785     {"name": "STENCIL_XNOR", "value": 15}
790     {"name": "ENDIAN_NONE", "value": 0},
791     {"name": "ENDIAN_8IN16", "value": 1},
792     {"name": "ENDIAN_8IN32", "value": 2},
793     {"name": "ENDIAN_8IN64", "value": 3}
798     {"name": "NUMBER_UNORM", "value": 0},
799     {"name": "NUMBER_SNORM", "value": 1},
800     {"name": "NUMBER_USCALED", "value": 2},
801     {"name": "NUMBER_SSCALED", "value": 3},
802     {"name": "NUMBER_UINT", "value": 4},
803     {"name": "NUMBER_SINT", "value": 5},
804     {"name": "NUMBER_SRGB", "value": 6},
805     {"name": "NUMBER_FLOAT", "value": 7}
810     {"name": "SWAP_STD", "value": 0},
811     {"name": "SWAP_ALT", "value": 1},
812     {"name": "SWAP_STD_REV", "value": 2},
813     {"name": "SWAP_ALT_REV", "value": 3}
818     {"name": "ADDR_SURF_TILE_SPLIT_64B", "value": 0},
819     {"name": "ADDR_SURF_TILE_SPLIT_128B", "value": 1},
820     {"name": "ADDR_SURF_TILE_SPLIT_256B", "value": 2},
821     {"name": "ADDR_SURF_TILE_SPLIT_512B", "value": 3},
822     {"name": "ADDR_SURF_TILE_SPLIT_1KB", "value": 4},
823     {"name": "ADDR_SURF_TILE_SPLIT_2KB", "value": 5},
824     {"name": "ADDR_SURF_TILE_SPLIT_4KB", "value": 6}
829     {"name": "NO_DIST", "value": 0},
830     {"name": "PATCHES", "value": 1},
831     {"name": "DONUTS", "value": 2}
836     {"name": "DI_MAJOR_MODE_0", "value": 0},
837     {"name": "DI_MAJOR_MODE_1", "value": 1}
842     {"name": "DI_PT_NONE", "value": 0},
843     {"name": "DI_PT_POINTLIST", "value": 1},
844     {"name": "DI_PT_LINELIST", "value": 2},
845     {"name": "DI_PT_LINESTRIP", "value": 3},
846     {"name": "DI_PT_TRILIST", "value": 4},
847     {"name": "DI_PT_TRIFAN", "value": 5},
848     {"name": "DI_PT_TRISTRIP", "value": 6},
849     {"name": "DI_PT_UNUSED_0", "value": 7},
850     {"name": "DI_PT_UNUSED_1", "value": 8},
851     {"name": "DI_PT_PATCH", "value": 9},
852     {"name": "DI_PT_LINELIST_ADJ", "value": 10},
853     {"name": "DI_PT_LINESTRIP_ADJ", "value": 11},
854     {"name": "DI_PT_TRILIST_ADJ", "value": 12},
855     {"name": "DI_PT_TRISTRIP_ADJ", "value": 13},
856     {"name": "DI_PT_UNUSED_3", "value": 14},
857     {"name": "DI_PT_UNUSED_4", "value": 15},
858     {"name": "DI_PT_TRI_WITH_WFLAGS", "value": 16},
859     {"name": "DI_PT_RECTLIST", "value": 17},
860     {"name": "DI_PT_LINELOOP", "value": 18},
861     {"name": "DI_PT_QUADLIST", "value": 19},
862     {"name": "DI_PT_QUADSTRIP", "value": 20},
863     {"name": "DI_PT_POLYGON", "value": 21},
864     {"name": "DI_PT_2D_COPY_RECT_LIST_V0", "value": 22},
865     {"name": "DI_PT_2D_COPY_RECT_LIST_V1", "value": 23},
866     {"name": "DI_PT_2D_COPY_RECT_LIST_V2", "value": 24},
867     {"name": "DI_PT_2D_COPY_RECT_LIST_V3", "value": 25},
868     {"name": "DI_PT_2D_FILL_RECT_LIST", "value": 26},
869     {"name": "DI_PT_2D_LINE_STRIP", "value": 27},
870     {"name": "DI_PT_2D_TRI_STRIP", "value": 28}
875     {"name": "DI_SRC_SEL_DMA", "value": 0},
876     {"name": "DI_SRC_SEL_IMMEDIATE", "value": 1},
877     {"name": "DI_SRC_SEL_AUTO_INDEX", "value": 2},
878     {"name": "DI_SRC_SEL_RESERVED", "value": 3}
883     {"name": "VGT_DMA_BUF_MEM", "value": 0},
884     {"name": "VGT_DMA_BUF_RING", "value": 1},
885     {"name": "VGT_DMA_BUF_SETUP", "value": 2},
886     {"name": "VGT_DMA_PTR_UPDATE", "value": 3}
891     {"name": "VGT_DMA_SWAP_NONE", "value": 0},
892     {"name": "VGT_DMA_SWAP_16_BIT", "value": 1},
893     {"name": "VGT_DMA_SWAP_32_BIT", "value": 2},
894     {"name": "VGT_DMA_SWAP_WORD", "value": 3}
899     {"name": "Reserved_0x00", "value": 0},
900     {"name": "SAMPLE_STREAMOUTSTATS1", "value": 1},
901     {"name": "SAMPLE_STREAMOUTSTATS2", "value": 2},
902     {"name": "SAMPLE_STREAMOUTSTATS3", "value": 3},
903     {"name": "CACHE_FLUSH_TS", "value": 4},
904     {"name": "CONTEXT_DONE", "value": 5},
905     {"name": "CACHE_FLUSH", "value": 6},
906     {"name": "CS_PARTIAL_FLUSH", "value": 7},
907     {"name": "VGT_STREAMOUT_SYNC", "value": 8},
908     {"name": "Reserved_0x09", "value": 9},
909     {"name": "VGT_STREAMOUT_RESET", "value": 10},
910     {"name": "END_OF_PIPE_INCR_DE", "value": 11},
911     {"name": "END_OF_PIPE_IB_END", "value": 12},
912     {"name": "RST_PIX_CNT", "value": 13},
913     {"name": "Reserved_0x0E", "value": 14},
914     {"name": "VS_PARTIAL_FLUSH", "value": 15},
915     {"name": "PS_PARTIAL_FLUSH", "value": 16},
916     {"name": "FLUSH_HS_OUTPUT", "value": 17},
917     {"name": "FLUSH_LS_OUTPUT", "value": 18},
918     {"name": "Reserved_0x13", "value": 19},
919     {"name": "CACHE_FLUSH_AND_INV_TS_EVENT", "value": 20},
920     {"name": "ZPASS_DONE", "value": 21},
921     {"name": "CACHE_FLUSH_AND_INV_EVENT", "value": 22},
922     {"name": "PERFCOUNTER_START", "value": 23},
923     {"name": "PERFCOUNTER_STOP", "value": 24},
924     {"name": "PIPELINESTAT_START", "value": 25},
925     {"name": "PIPELINESTAT_STOP", "value": 26},
926     {"name": "PERFCOUNTER_SAMPLE", "value": 27},
927     {"name": "FLUSH_ES_OUTPUT", "value": 28},
928     {"name": "FLUSH_GS_OUTPUT", "value": 29},
929     {"name": "SAMPLE_PIPELINESTAT", "value": 30},
930     {"name": "SO_VGTSTREAMOUT_FLUSH", "value": 31},
931     {"name": "SAMPLE_STREAMOUTSTATS", "value": 32},
932     {"name": "RESET_VTX_CNT", "value": 33},
933     {"name": "BLOCK_CONTEXT_DONE", "value": 34},
934     {"name": "CS_CONTEXT_DONE", "value": 35},
935     {"name": "VGT_FLUSH", "value": 36},
936     {"name": "TGID_ROLLOVER", "value": 37},
937     {"name": "SQ_NON_EVENT", "value": 38},
938     {"name": "SC_SEND_DB_VPZ", "value": 39},
939     {"name": "BOTTOM_OF_PIPE_TS", "value": 40},
940     {"name": "FLUSH_SX_TS", "value": 41},
941     {"name": "DB_CACHE_FLUSH_AND_INV", "value": 42},
942     {"name": "FLUSH_AND_INV_DB_DATA_TS", "value": 43},
943     {"name": "FLUSH_AND_INV_DB_META", "value": 44},
944     {"name": "FLUSH_AND_INV_CB_DATA_TS", "value": 45},
945     {"name": "FLUSH_AND_INV_CB_META", "value": 46},
946     {"name": "CS_DONE", "value": 47},
947     {"name": "PS_DONE", "value": 48},
948     {"name": "FLUSH_AND_INV_CB_PIXEL_DATA", "value": 49},
949     {"name": "SX_CB_RAT_ACK_REQUEST", "value": 50},
950     {"name": "THREAD_TRACE_START", "value": 51},
951     {"name": "THREAD_TRACE_STOP", "value": 52},
952     {"name": "THREAD_TRACE_MARKER", "value": 53},
953     {"name": "THREAD_TRACE_FLUSH", "value": 54},
954     {"name": "THREAD_TRACE_FINISH", "value": 55},
955     {"name": "PIXEL_PIPE_STAT_CONTROL", "value": 56},
956     {"name": "PIXEL_PIPE_STAT_DUMP", "value": 57},
957     {"name": "PIXEL_PIPE_STAT_RESET", "value": 58},
958     {"name": "CONTEXT_SUSPEND", "value": 59},
959     {"name": "OFFCHIP_HS_DEALLOC", "value": 60}
964     {"name": "GS_CUT_1024", "value": 0},
965     {"name": "GS_CUT_512", "value": 1},
966     {"name": "GS_CUT_256", "value": 2},
967     {"name": "GS_CUT_128", "value": 3}
972     {"name": "GS_OFF", "value": 0},
973     {"name": "GS_SCENARIO_A", "value": 1},
974     {"name": "GS_SCENARIO_B", "value": 2},
975     {"name": "GS_SCENARIO_G", "value": 3},
976     {"name": "GS_SCENARIO_C", "value": 4},
977     {"name": "SPRITE_EN", "value": 5}
982     {"name": "POINTLIST", "value": 0},
983     {"name": "LINESTRIP", "value": 1},
984     {"name": "TRISTRIP", "value": 2}
989     {"name": "X_8K_DWORDS", "value": 0},
990     {"name": "X_4K_DWORDS", "value": 1},
991     {"name": "X_2K_DWORDS", "value": 2},
992     {"name": "X_1K_DWORDS", "value": 3}
997     {"name": "VGT_INDEX_16", "value": 0},
998     {"name": "VGT_INDEX_32", "value": 1},
999     {"name": "VGT_INDEX_8", "value": 2}
1004     {"name": "VGT_POLICY_LRU", "value": 0},
1005     {"name": "VGT_POLICY_STREAM", "value": 1}
1010     {"name": "ES_STAGE_OFF", "value": 0},
1011     {"name": "ES_STAGE_DS", "value": 1},
1012     {"name": "ES_STAGE_REAL", "value": 2},
1013     {"name": "RESERVED_ES", "value": 3}
1018     {"name": "GS_STAGE_OFF", "value": 0},
1019     {"name": "GS_STAGE_ON", "value": 1}
1024     {"name": "HS_STAGE_OFF", "value": 0},
1025     {"name": "HS_STAGE_ON", "value": 1}
1030     {"name": "LS_STAGE_OFF", "value": 0},
1031     {"name": "LS_STAGE_ON", "value": 1},
1032     {"name": "CS_STAGE_ON", "value": 2},
1033     {"name": "RESERVED_LS", "value": 3}
1038     {"name": "VS_STAGE_REAL", "value": 0},
1039     {"name": "VS_STAGE_DS", "value": 1},
1040     {"name": "VS_STAGE_COPY_SHADER", "value": 2},
1041     {"name": "RESERVED_VS", "value": 3}
1046     {"name": "PART_INTEGER", "value": 0},
1047     {"name": "PART_POW2", "value": 1},
1048     {"name": "PART_FRAC_ODD", "value": 2},
1049     {"name": "PART_FRAC_EVEN", "value": 3}
1054     {"name": "OUTPUT_POINT", "value": 0},
1055     {"name": "OUTPUT_LINE", "value": 1},
1056     {"name": "OUTPUT_TRIANGLE_CW", "value": 2},
1057     {"name": "OUTPUT_TRIANGLE_CCW", "value": 3}
1062     {"name": "TESS_ISOLINE", "value": 0},
1063     {"name": "TESS_TRIANGLE", "value": 1},
1064     {"name": "TESS_QUAD", "value": 2}
1069     {"name": "Z_INVALID", "value": 0},
1070     {"name": "Z_16", "value": 1},
1071     {"name": "Z_24", "value": 2},
1072     {"name": "Z_32_FLOAT", "value": 3}
1077     {"name": "FORCE_SUMM_OFF", "value": 0},
1078     {"name": "FORCE_SUMM_MINZ", "value": 1},
1079     {"name": "FORCE_SUMM_MAXZ", "value": 2},
1080     {"name": "FORCE_SUMM_BOTH", "value": 3}
1085     {"name": "LATE_Z", "value": 0},
1086     {"name": "EARLY_Z_THEN_LATE_Z", "value": 1},
1087     {"name": "RE_Z", "value": 2},
1088     {"name": "EARLY_Z_THEN_RE_Z", "value": 3}
1096    "name": "SQ_WAVE_MODE",
1102    "name": "SQ_WAVE_STATUS",
1108    "name": "SQ_WAVE_TRAPSTS",
1114    "name": "SQ_WAVE_HW_ID",
1120    "name": "SQ_WAVE_GPR_ALLOC",
1126    "name": "SQ_WAVE_LDS_ALLOC",
1132    "name": "SQ_WAVE_IB_STS",
1138    "name": "SQ_WAVE_PC_LO"
1143    "name": "SQ_WAVE_PC_HI",
1149    "name": "SQ_WAVE_INST_DW0"
1154    "name": "SQ_WAVE_INST_DW1"
1159    "name": "SQ_WAVE_IB_DBG0",
1165    "name": "SQ_WAVE_IB_DBG1",
1171    "name": "SQ_WAVE_TBA_LO"
1176    "name": "SQ_WAVE_TBA_HI",
1182    "name": "SQ_WAVE_TMA_LO"
1187    "name": "SQ_WAVE_TMA_HI",
1193    "name": "SQ_WAVE_TTMP0"
1198    "name": "SQ_WAVE_TTMP1"
1203    "name": "SQ_WAVE_TTMP2"
1208    "name": "SQ_WAVE_TTMP3"
1213    "name": "SQ_WAVE_TTMP4"
1218    "name": "SQ_WAVE_TTMP5"
1223    "name": "SQ_WAVE_TTMP6"
1228    "name": "SQ_WAVE_TTMP7"
1233    "name": "SQ_WAVE_TTMP8"
1238    "name": "SQ_WAVE_TTMP9"
1243    "name": "SQ_WAVE_TTMP10"
1248    "name": "SQ_WAVE_TTMP11"
1253    "name": "SQ_WAVE_M0"
1258    "name": "SQ_WAVE_EXEC_LO"
1263    "name": "SQ_WAVE_EXEC_HI"
1268    "name": "GRBM_STATUS2",
1274    "name": "GRBM_STATUS",
1280    "name": "GRBM_STATUS_SE0",
1286    "name": "GRBM_STATUS_SE1",
1292    "name": "GRBM_STATUS_SE2",
1298    "name": "GRBM_STATUS_SE3",
1304    "name": "CP_CPC_STATUS",
1310    "name": "CP_CPC_BUSY_STAT",
1316    "name": "CP_CPC_STALLED_STAT1",
1322    "name": "CP_CPF_STATUS",
1328    "name": "CP_CPF_BUSY_STAT",
1334    "name": "CP_CPF_STALLED_STAT1",
1340    "name": "CP_CPC_GRBM_FREE_COUNT",
1346    "name": "CP_CPC_SCRATCH_INDEX",
1352    "name": "CP_CPC_SCRATCH_DATA"
1357    "name": "CP_CPC_HALT_HYST_COUNT",
1363    "name": "SQ_THREAD_TRACE_CNTR"
1368    "name": "SQ_BUF_RSRC_WORD0"
1373    "name": "SQ_BUF_RSRC_WORD1",
1379    "name": "SQ_BUF_RSRC_WORD2"
1384    "name": "SQ_BUF_RSRC_WORD3",
1390    "name": "SQ_IMG_RSRC_WORD0"
1395    "name": "SQ_IMG_RSRC_WORD1",
1401    "name": "SQ_IMG_RSRC_WORD2",
1407    "name": "SQ_IMG_RSRC_WORD3",
1413    "name": "SQ_IMG_RSRC_WORD4",
1419    "name": "SQ_IMG_RSRC_WORD5",
1425    "name": "SQ_IMG_RSRC_WORD6",
1431    "name": "SQ_IMG_RSRC_WORD7"
1436    "name": "SQ_IMG_SAMP_WORD0",
1442    "name": "SQ_IMG_SAMP_WORD1",
1448    "name": "SQ_IMG_SAMP_WORD2",
1454    "name": "SQ_IMG_SAMP_WORD3",
1460    "name": "SPI_CONFIG_CNTL",
1466    "name": "GB_ADDR_CONFIG",
1472    "name": "GB_TILE_MODE0",
1478    "name": "GB_TILE_MODE1",
1484    "name": "GB_TILE_MODE2",
1490    "name": "GB_TILE_MODE3",
1496    "name": "GB_TILE_MODE4",
1502    "name": "GB_TILE_MODE5",
1508    "name": "GB_TILE_MODE6",
1514    "name": "GB_TILE_MODE7",
1520    "name": "GB_TILE_MODE8",
1526    "name": "GB_TILE_MODE9",
1532    "name": "GB_TILE_MODE10",
1538    "name": "GB_TILE_MODE11",
1544    "name": "GB_TILE_MODE12",
1550    "name": "GB_TILE_MODE13",
1556    "name": "GB_TILE_MODE14",
1562    "name": "GB_TILE_MODE15",
1568    "name": "GB_TILE_MODE16",
1574    "name": "GB_TILE_MODE17",
1580    "name": "GB_TILE_MODE18",
1586    "name": "GB_TILE_MODE19",
1592    "name": "GB_TILE_MODE20",
1598    "name": "GB_TILE_MODE21",
1604    "name": "GB_TILE_MODE22",
1610    "name": "GB_TILE_MODE23",
1616    "name": "GB_TILE_MODE24",
1622    "name": "GB_TILE_MODE25",
1628    "name": "GB_TILE_MODE26",
1634    "name": "GB_TILE_MODE27",
1640    "name": "GB_TILE_MODE28",
1646    "name": "GB_TILE_MODE29",
1652    "name": "GB_TILE_MODE30",
1658    "name": "GB_TILE_MODE31",
1664    "name": "GB_MACROTILE_MODE0",
1670    "name": "GB_MACROTILE_MODE1",
1676    "name": "GB_MACROTILE_MODE2",
1682    "name": "GB_MACROTILE_MODE3",
1688    "name": "GB_MACROTILE_MODE4",
1694    "name": "GB_MACROTILE_MODE5",
1700    "name": "GB_MACROTILE_MODE6",
1706    "name": "GB_MACROTILE_MODE7",
1712    "name": "GB_MACROTILE_MODE8",
1718    "name": "GB_MACROTILE_MODE9",
1724    "name": "GB_MACROTILE_MODE10",
1730    "name": "GB_MACROTILE_MODE11",
1736    "name": "GB_MACROTILE_MODE12",
1742    "name": "GB_MACROTILE_MODE13",
1748    "name": "GB_MACROTILE_MODE14",
1754    "name": "GB_MACROTILE_MODE15",
1760    "name": "SPI_SHADER_TBA_LO_PS"
1765    "name": "SPI_SHADER_TBA_HI_PS",
1771    "name": "SPI_SHADER_TMA_LO_PS"
1776    "name": "SPI_SHADER_TMA_HI_PS",
1782    "name": "SPI_SHADER_PGM_RSRC3_PS",
1788    "name": "SPI_SHADER_PGM_LO_PS"
1793    "name": "SPI_SHADER_PGM_HI_PS",
1799    "name": "SPI_SHADER_PGM_RSRC1_PS",
1805    "name": "SPI_SHADER_PGM_RSRC2_PS",
1811    "name": "SPI_SHADER_USER_DATA_PS_0"
1816    "name": "SPI_SHADER_USER_DATA_PS_1"
1821    "name": "SPI_SHADER_USER_DATA_PS_2"
1826    "name": "SPI_SHADER_USER_DATA_PS_3"
1831    "name": "SPI_SHADER_USER_DATA_PS_4"
1836    "name": "SPI_SHADER_USER_DATA_PS_5"
1841    "name": "SPI_SHADER_USER_DATA_PS_6"
1846    "name": "SPI_SHADER_USER_DATA_PS_7"
1851    "name": "SPI_SHADER_USER_DATA_PS_8"
1856    "name": "SPI_SHADER_USER_DATA_PS_9"
1861    "name": "SPI_SHADER_USER_DATA_PS_10"
1866    "name": "SPI_SHADER_USER_DATA_PS_11"
1871    "name": "SPI_SHADER_USER_DATA_PS_12"
1876    "name": "SPI_SHADER_USER_DATA_PS_13"
1881    "name": "SPI_SHADER_USER_DATA_PS_14"
1886    "name": "SPI_SHADER_USER_DATA_PS_15"
1891    "name": "SPI_SHADER_TBA_LO_VS"
1896    "name": "SPI_SHADER_TBA_HI_VS",
1902    "name": "SPI_SHADER_TMA_LO_VS"
1907    "name": "SPI_SHADER_TMA_HI_VS",
1913    "name": "SPI_SHADER_PGM_RSRC3_VS",
1919    "name": "SPI_SHADER_LATE_ALLOC_VS",
1925    "name": "SPI_SHADER_PGM_LO_VS"
1930    "name": "SPI_SHADER_PGM_HI_VS",
1936    "name": "SPI_SHADER_PGM_RSRC1_VS",
1942    "name": "SPI_SHADER_PGM_RSRC2_VS",
1948    "name": "SPI_SHADER_USER_DATA_VS_0"
1953    "name": "SPI_SHADER_USER_DATA_VS_1"
1958    "name": "SPI_SHADER_USER_DATA_VS_2"
1963    "name": "SPI_SHADER_USER_DATA_VS_3"
1968    "name": "SPI_SHADER_USER_DATA_VS_4"
1973    "name": "SPI_SHADER_USER_DATA_VS_5"
1978    "name": "SPI_SHADER_USER_DATA_VS_6"
1983    "name": "SPI_SHADER_USER_DATA_VS_7"
1988    "name": "SPI_SHADER_USER_DATA_VS_8"
1993    "name": "SPI_SHADER_USER_DATA_VS_9"
1998    "name": "SPI_SHADER_USER_DATA_VS_10"
2003    "name": "SPI_SHADER_USER_DATA_VS_11"
2008    "name": "SPI_SHADER_USER_DATA_VS_12"
2013    "name": "SPI_SHADER_USER_DATA_VS_13"
2018    "name": "SPI_SHADER_USER_DATA_VS_14"
2023    "name": "SPI_SHADER_USER_DATA_VS_15"
2028    "name": "SPI_SHADER_PGM_RSRC2_ES_VS",
2034    "name": "SPI_SHADER_PGM_RSRC2_LS_VS",
2040    "name": "SPI_SHADER_TBA_LO_GS"
2045    "name": "SPI_SHADER_TBA_HI_GS",
2051    "name": "SPI_SHADER_TMA_LO_GS"
2056    "name": "SPI_SHADER_TMA_HI_GS",
2062    "name": "SPI_SHADER_PGM_RSRC3_GS",
2068    "name": "SPI_SHADER_PGM_LO_GS"
2073    "name": "SPI_SHADER_PGM_HI_GS",
2079    "name": "SPI_SHADER_PGM_RSRC1_GS",
2085    "name": "SPI_SHADER_PGM_RSRC2_GS",
2091    "name": "SPI_SHADER_USER_DATA_GS_0"
2096    "name": "SPI_SHADER_USER_DATA_GS_1"
2101    "name": "SPI_SHADER_USER_DATA_GS_2"
2106    "name": "SPI_SHADER_USER_DATA_GS_3"
2111    "name": "SPI_SHADER_USER_DATA_GS_4"
2116    "name": "SPI_SHADER_USER_DATA_GS_5"
2121    "name": "SPI_SHADER_USER_DATA_GS_6"
2126    "name": "SPI_SHADER_USER_DATA_GS_7"
2131    "name": "SPI_SHADER_USER_DATA_GS_8"
2136    "name": "SPI_SHADER_USER_DATA_GS_9"
2141    "name": "SPI_SHADER_USER_DATA_GS_10"
2146    "name": "SPI_SHADER_USER_DATA_GS_11"
2151    "name": "SPI_SHADER_USER_DATA_GS_12"
2156    "name": "SPI_SHADER_USER_DATA_GS_13"
2161    "name": "SPI_SHADER_USER_DATA_GS_14"
2166    "name": "SPI_SHADER_USER_DATA_GS_15"
2171    "name": "SPI_SHADER_PGM_RSRC2_ES_GS",
2177    "name": "SPI_SHADER_TBA_LO_ES"
2182    "name": "SPI_SHADER_TBA_HI_ES",
2188    "name": "SPI_SHADER_TMA_LO_ES"
2193    "name": "SPI_SHADER_TMA_HI_ES",
2199    "name": "SPI_SHADER_PGM_RSRC3_ES",
2205    "name": "SPI_SHADER_PGM_LO_ES"
2210    "name": "SPI_SHADER_PGM_HI_ES",
2216    "name": "SPI_SHADER_PGM_RSRC1_ES",
2222    "name": "SPI_SHADER_PGM_RSRC2_ES",
2228    "name": "SPI_SHADER_USER_DATA_ES_0"
2233    "name": "SPI_SHADER_USER_DATA_ES_1"
2238    "name": "SPI_SHADER_USER_DATA_ES_2"
2243    "name": "SPI_SHADER_USER_DATA_ES_3"
2248    "name": "SPI_SHADER_USER_DATA_ES_4"
2253    "name": "SPI_SHADER_USER_DATA_ES_5"
2258    "name": "SPI_SHADER_USER_DATA_ES_6"
2263    "name": "SPI_SHADER_USER_DATA_ES_7"
2268    "name": "SPI_SHADER_USER_DATA_ES_8"
2273    "name": "SPI_SHADER_USER_DATA_ES_9"
2278    "name": "SPI_SHADER_USER_DATA_ES_10"
2283    "name": "SPI_SHADER_USER_DATA_ES_11"
2288    "name": "SPI_SHADER_USER_DATA_ES_12"
2293    "name": "SPI_SHADER_USER_DATA_ES_13"
2298    "name": "SPI_SHADER_USER_DATA_ES_14"
2303    "name": "SPI_SHADER_USER_DATA_ES_15"
2308    "name": "SPI_SHADER_PGM_RSRC2_LS_ES",
2314    "name": "SPI_SHADER_TBA_LO_HS"
2319    "name": "SPI_SHADER_TBA_HI_HS",
2325    "name": "SPI_SHADER_TMA_LO_HS"
2330    "name": "SPI_SHADER_TMA_HI_HS",
2336    "name": "SPI_SHADER_PGM_RSRC3_HS",
2342    "name": "SPI_SHADER_PGM_LO_HS"
2347    "name": "SPI_SHADER_PGM_HI_HS",
2353    "name": "SPI_SHADER_PGM_RSRC1_HS",
2359    "name": "SPI_SHADER_PGM_RSRC2_HS",
2365    "name": "SPI_SHADER_USER_DATA_HS_0"
2370    "name": "SPI_SHADER_USER_DATA_HS_1"
2375    "name": "SPI_SHADER_USER_DATA_HS_2"
2380    "name": "SPI_SHADER_USER_DATA_HS_3"
2385    "name": "SPI_SHADER_USER_DATA_HS_4"
2390    "name": "SPI_SHADER_USER_DATA_HS_5"
2395    "name": "SPI_SHADER_USER_DATA_HS_6"
2400    "name": "SPI_SHADER_USER_DATA_HS_7"
2405    "name": "SPI_SHADER_USER_DATA_HS_8"
2410    "name": "SPI_SHADER_USER_DATA_HS_9"
2415    "name": "SPI_SHADER_USER_DATA_HS_10"
2420    "name": "SPI_SHADER_USER_DATA_HS_11"
2425    "name": "SPI_SHADER_USER_DATA_HS_12"
2430    "name": "SPI_SHADER_USER_DATA_HS_13"
2435    "name": "SPI_SHADER_USER_DATA_HS_14"
2440    "name": "SPI_SHADER_USER_DATA_HS_15"
2445    "name": "SPI_SHADER_PGM_RSRC2_LS_HS",
2451    "name": "SPI_SHADER_TBA_LO_LS"
2456    "name": "SPI_SHADER_TBA_HI_LS",
2462    "name": "SPI_SHADER_TMA_LO_LS"
2467    "name": "SPI_SHADER_TMA_HI_LS",
2473    "name": "SPI_SHADER_PGM_RSRC3_LS",
2479    "name": "SPI_SHADER_PGM_LO_LS"
2484    "name": "SPI_SHADER_PGM_HI_LS",
2490    "name": "SPI_SHADER_PGM_RSRC1_LS",
2496    "name": "SPI_SHADER_PGM_RSRC2_LS",
2502    "name": "SPI_SHADER_USER_DATA_LS_0"
2507    "name": "SPI_SHADER_USER_DATA_LS_1"
2512    "name": "SPI_SHADER_USER_DATA_LS_2"
2517    "name": "SPI_SHADER_USER_DATA_LS_3"
2522    "name": "SPI_SHADER_USER_DATA_LS_4"
2527    "name": "SPI_SHADER_USER_DATA_LS_5"
2532    "name": "SPI_SHADER_USER_DATA_LS_6"
2537    "name": "SPI_SHADER_USER_DATA_LS_7"
2542    "name": "SPI_SHADER_USER_DATA_LS_8"
2547    "name": "SPI_SHADER_USER_DATA_LS_9"
2552    "name": "SPI_SHADER_USER_DATA_LS_10"
2557    "name": "SPI_SHADER_USER_DATA_LS_11"
2562    "name": "SPI_SHADER_USER_DATA_LS_12"
2567    "name": "SPI_SHADER_USER_DATA_LS_13"
2572    "name": "SPI_SHADER_USER_DATA_LS_14"
2577    "name": "SPI_SHADER_USER_DATA_LS_15"
2582    "name": "COMPUTE_DISPATCH_INITIATOR",
2588    "name": "COMPUTE_DIM_X"
2593    "name": "COMPUTE_DIM_Y"
2598    "name": "COMPUTE_DIM_Z"
2603    "name": "COMPUTE_START_X"
2608    "name": "COMPUTE_START_Y"
2613    "name": "COMPUTE_START_Z"
2618    "name": "COMPUTE_NUM_THREAD_X",
2624    "name": "COMPUTE_NUM_THREAD_Y",
2630    "name": "COMPUTE_NUM_THREAD_Z",
2636    "name": "COMPUTE_PIPELINESTAT_ENABLE",
2642    "name": "COMPUTE_PERFCOUNT_ENABLE",
2648    "name": "COMPUTE_PGM_LO"
2653    "name": "COMPUTE_PGM_HI",
2659    "name": "COMPUTE_TBA_LO"
2664    "name": "COMPUTE_TBA_HI",
2670    "name": "COMPUTE_TMA_LO"
2675    "name": "COMPUTE_TMA_HI",
2681    "name": "COMPUTE_PGM_RSRC1",
2687    "name": "COMPUTE_PGM_RSRC2",
2693    "name": "COMPUTE_VMID",
2699    "name": "COMPUTE_RESOURCE_LIMITS",
2705    "name": "COMPUTE_STATIC_THREAD_MGMT_SE0",
2711    "name": "COMPUTE_STATIC_THREAD_MGMT_SE1",
2717    "name": "COMPUTE_TMPRING_SIZE",
2723    "name": "COMPUTE_STATIC_THREAD_MGMT_SE2",
2729    "name": "COMPUTE_STATIC_THREAD_MGMT_SE3",
2735    "name": "COMPUTE_RESTART_X"
2740    "name": "COMPUTE_RESTART_Y"
2745    "name": "COMPUTE_RESTART_Z"
2750    "name": "COMPUTE_THREAD_TRACE_ENABLE",
2756    "name": "COMPUTE_MISC_RESERVED",
2762    "name": "COMPUTE_DISPATCH_ID"
2767    "name": "COMPUTE_THREADGROUP_ID"
2772    "name": "COMPUTE_RELAUNCH",
2778    "name": "COMPUTE_WAVE_RESTORE_ADDR_LO"
2783    "name": "COMPUTE_WAVE_RESTORE_ADDR_HI",
2789    "name": "COMPUTE_WAVE_RESTORE_CONTROL",
2795    "name": "COMPUTE_USER_DATA_0"
2800    "name": "COMPUTE_USER_DATA_1"
2805    "name": "COMPUTE_USER_DATA_2"
2810    "name": "COMPUTE_USER_DATA_3"
2815    "name": "COMPUTE_USER_DATA_4"
2820    "name": "COMPUTE_USER_DATA_5"
2825    "name": "COMPUTE_USER_DATA_6"
2830    "name": "COMPUTE_USER_DATA_7"
2835    "name": "COMPUTE_USER_DATA_8"
2840    "name": "COMPUTE_USER_DATA_9"
2845    "name": "COMPUTE_USER_DATA_10"
2850    "name": "COMPUTE_USER_DATA_11"
2855    "name": "COMPUTE_USER_DATA_12"
2860    "name": "COMPUTE_USER_DATA_13"
2865    "name": "COMPUTE_USER_DATA_14"
2870    "name": "COMPUTE_USER_DATA_15"
2875    "name": "COMPUTE_NOWHERE"
2880    "name": "DB_RENDER_CONTROL",
2886    "name": "DB_COUNT_CONTROL",
2892    "name": "DB_DEPTH_VIEW",
2898    "name": "DB_RENDER_OVERRIDE",
2904    "name": "DB_RENDER_OVERRIDE2",
2910    "name": "DB_HTILE_DATA_BASE"
2915    "name": "DB_DEPTH_BOUNDS_MIN"
2920    "name": "DB_DEPTH_BOUNDS_MAX"
2925    "name": "DB_STENCIL_CLEAR",
2931    "name": "DB_DEPTH_CLEAR"
2936    "name": "PA_SC_SCREEN_SCISSOR_TL",
2942    "name": "PA_SC_SCREEN_SCISSOR_BR",
2948    "name": "DB_DEPTH_INFO",
2954    "name": "DB_Z_INFO",
2960    "name": "DB_STENCIL_INFO",
2966    "name": "DB_Z_READ_BASE"
2971    "name": "DB_STENCIL_READ_BASE"
2976    "name": "DB_Z_WRITE_BASE"
2981    "name": "DB_STENCIL_WRITE_BASE"
2986    "name": "DB_DEPTH_SIZE",
2992    "name": "DB_DEPTH_SLICE",
2998    "name": "TA_BC_BASE_ADDR"
3003    "name": "TA_BC_BASE_ADDR_HI",
3009    "name": "COHER_DEST_BASE_HI_0"
3014    "name": "COHER_DEST_BASE_HI_1"
3019    "name": "COHER_DEST_BASE_HI_2"
3024    "name": "COHER_DEST_BASE_HI_3"
3029    "name": "COHER_DEST_BASE_2"
3034    "name": "COHER_DEST_BASE_3"
3039    "name": "PA_SC_WINDOW_OFFSET",
3045    "name": "PA_SC_WINDOW_SCISSOR_TL",
3051    "name": "PA_SC_WINDOW_SCISSOR_BR",
3057    "name": "PA_SC_CLIPRECT_RULE",
3063    "name": "PA_SC_CLIPRECT_0_TL",
3069    "name": "PA_SC_CLIPRECT_0_BR",
3075    "name": "PA_SC_CLIPRECT_1_TL",
3081    "name": "PA_SC_CLIPRECT_1_BR",
3087    "name": "PA_SC_CLIPRECT_2_TL",
3093    "name": "PA_SC_CLIPRECT_2_BR",
3099    "name": "PA_SC_CLIPRECT_3_TL",
3105    "name": "PA_SC_CLIPRECT_3_BR",
3111    "name": "PA_SC_EDGERULE",
3117    "name": "PA_SU_HARDWARE_SCREEN_OFFSET",
3123    "name": "CB_TARGET_MASK",
3129    "name": "CB_SHADER_MASK",
3135    "name": "PA_SC_GENERIC_SCISSOR_TL",
3141    "name": "PA_SC_GENERIC_SCISSOR_BR",
3147    "name": "COHER_DEST_BASE_0"
3152    "name": "COHER_DEST_BASE_1"
3157    "name": "PA_SC_VPORT_SCISSOR_0_TL",
3163    "name": "PA_SC_VPORT_SCISSOR_0_BR",
3169    "name": "PA_SC_VPORT_SCISSOR_1_TL",
3175    "name": "PA_SC_VPORT_SCISSOR_1_BR",
3181    "name": "PA_SC_VPORT_SCISSOR_2_TL",
3187    "name": "PA_SC_VPORT_SCISSOR_2_BR",
3193    "name": "PA_SC_VPORT_SCISSOR_3_TL",
3199    "name": "PA_SC_VPORT_SCISSOR_3_BR",
3205    "name": "PA_SC_VPORT_SCISSOR_4_TL",
3211    "name": "PA_SC_VPORT_SCISSOR_4_BR",
3217    "name": "PA_SC_VPORT_SCISSOR_5_TL",
3223    "name": "PA_SC_VPORT_SCISSOR_5_BR",
3229    "name": "PA_SC_VPORT_SCISSOR_6_TL",
3235    "name": "PA_SC_VPORT_SCISSOR_6_BR",
3241    "name": "PA_SC_VPORT_SCISSOR_7_TL",
3247    "name": "PA_SC_VPORT_SCISSOR_7_BR",
3253    "name": "PA_SC_VPORT_SCISSOR_8_TL",
3259    "name": "PA_SC_VPORT_SCISSOR_8_BR",
3265    "name": "PA_SC_VPORT_SCISSOR_9_TL",
3271    "name": "PA_SC_VPORT_SCISSOR_9_BR",
3277    "name": "PA_SC_VPORT_SCISSOR_10_TL",
3283    "name": "PA_SC_VPORT_SCISSOR_10_BR",
3289    "name": "PA_SC_VPORT_SCISSOR_11_TL",
3295    "name": "PA_SC_VPORT_SCISSOR_11_BR",
3301    "name": "PA_SC_VPORT_SCISSOR_12_TL",
3307    "name": "PA_SC_VPORT_SCISSOR_12_BR",
3313    "name": "PA_SC_VPORT_SCISSOR_13_TL",
3319    "name": "PA_SC_VPORT_SCISSOR_13_BR",
3325    "name": "PA_SC_VPORT_SCISSOR_14_TL",
3331    "name": "PA_SC_VPORT_SCISSOR_14_BR",
3337    "name": "PA_SC_VPORT_SCISSOR_15_TL",
3343    "name": "PA_SC_VPORT_SCISSOR_15_BR",
3349    "name": "PA_SC_VPORT_ZMIN_0"
3354    "name": "PA_SC_VPORT_ZMAX_0"
3359    "name": "PA_SC_VPORT_ZMIN_1"
3364    "name": "PA_SC_VPORT_ZMAX_1"
3369    "name": "PA_SC_VPORT_ZMIN_2"
3374    "name": "PA_SC_VPORT_ZMAX_2"
3379    "name": "PA_SC_VPORT_ZMIN_3"
3384    "name": "PA_SC_VPORT_ZMAX_3"
3389    "name": "PA_SC_VPORT_ZMIN_4"
3394    "name": "PA_SC_VPORT_ZMAX_4"
3399    "name": "PA_SC_VPORT_ZMIN_5"
3404    "name": "PA_SC_VPORT_ZMAX_5"
3409    "name": "PA_SC_VPORT_ZMIN_6"
3414    "name": "PA_SC_VPORT_ZMAX_6"
3419    "name": "PA_SC_VPORT_ZMIN_7"
3424    "name": "PA_SC_VPORT_ZMAX_7"
3429    "name": "PA_SC_VPORT_ZMIN_8"
3434    "name": "PA_SC_VPORT_ZMAX_8"
3439    "name": "PA_SC_VPORT_ZMIN_9"
3444    "name": "PA_SC_VPORT_ZMAX_9"
3449    "name": "PA_SC_VPORT_ZMIN_10"
3454    "name": "PA_SC_VPORT_ZMAX_10"
3459    "name": "PA_SC_VPORT_ZMIN_11"
3464    "name": "PA_SC_VPORT_ZMAX_11"
3469    "name": "PA_SC_VPORT_ZMIN_12"
3474    "name": "PA_SC_VPORT_ZMAX_12"
3479    "name": "PA_SC_VPORT_ZMIN_13"
3484    "name": "PA_SC_VPORT_ZMAX_13"
3489    "name": "PA_SC_VPORT_ZMIN_14"
3494    "name": "PA_SC_VPORT_ZMAX_14"
3499    "name": "PA_SC_VPORT_ZMIN_15"
3504    "name": "PA_SC_VPORT_ZMAX_15"
3509    "name": "PA_SC_RASTER_CONFIG",
3515    "name": "PA_SC_RASTER_CONFIG_1",
3521    "name": "PA_SC_SCREEN_EXTENT_CONTROL",
3527    "name": "CP_PERFMON_CNTX_CNTL",
3533    "name": "CP_RINGID",
3539    "name": "CP_VMID",
3545    "name": "VGT_MAX_VTX_INDX"
3550    "name": "VGT_MIN_VTX_INDX"
3555    "name": "VGT_INDX_OFFSET"
3560    "name": "VGT_MULTI_PRIM_IB_RESET_INDX"
3565    "name": "CB_BLEND_RED"
3570    "name": "CB_BLEND_GREEN"
3575    "name": "CB_BLEND_BLUE"
3580    "name": "CB_BLEND_ALPHA"
3585    "name": "CB_DCC_CONTROL",
3591    "name": "DB_STENCIL_CONTROL",
3597    "name": "DB_STENCILREFMASK",
3603    "name": "DB_STENCILREFMASK_BF",
3609    "name": "PA_CL_VPORT_XSCALE"
3614    "name": "PA_CL_VPORT_XOFFSET"
3619    "name": "PA_CL_VPORT_YSCALE"
3624    "name": "PA_CL_VPORT_YOFFSET"
3629    "name": "PA_CL_VPORT_ZSCALE"
3634    "name": "PA_CL_VPORT_ZOFFSET"
3639    "name": "PA_CL_VPORT_XSCALE_1"
3644    "name": "PA_CL_VPORT_XOFFSET_1"
3649    "name": "PA_CL_VPORT_YSCALE_1"
3654    "name": "PA_CL_VPORT_YOFFSET_1"
3659    "name": "PA_CL_VPORT_ZSCALE_1"
3664    "name": "PA_CL_VPORT_ZOFFSET_1"
3669    "name": "PA_CL_VPORT_XSCALE_2"
3674    "name": "PA_CL_VPORT_XOFFSET_2"
3679    "name": "PA_CL_VPORT_YSCALE_2"
3684    "name": "PA_CL_VPORT_YOFFSET_2"
3689    "name": "PA_CL_VPORT_ZSCALE_2"
3694    "name": "PA_CL_VPORT_ZOFFSET_2"
3699    "name": "PA_CL_VPORT_XSCALE_3"
3704    "name": "PA_CL_VPORT_XOFFSET_3"
3709    "name": "PA_CL_VPORT_YSCALE_3"
3714    "name": "PA_CL_VPORT_YOFFSET_3"
3719    "name": "PA_CL_VPORT_ZSCALE_3"
3724    "name": "PA_CL_VPORT_ZOFFSET_3"
3729    "name": "PA_CL_VPORT_XSCALE_4"
3734    "name": "PA_CL_VPORT_XOFFSET_4"
3739    "name": "PA_CL_VPORT_YSCALE_4"
3744    "name": "PA_CL_VPORT_YOFFSET_4"
3749    "name": "PA_CL_VPORT_ZSCALE_4"
3754    "name": "PA_CL_VPORT_ZOFFSET_4"
3759    "name": "PA_CL_VPORT_XSCALE_5"
3764    "name": "PA_CL_VPORT_XOFFSET_5"
3769    "name": "PA_CL_VPORT_YSCALE_5"
3774    "name": "PA_CL_VPORT_YOFFSET_5"
3779    "name": "PA_CL_VPORT_ZSCALE_5"
3784    "name": "PA_CL_VPORT_ZOFFSET_5"
3789    "name": "PA_CL_VPORT_XSCALE_6"
3794    "name": "PA_CL_VPORT_XOFFSET_6"
3799    "name": "PA_CL_VPORT_YSCALE_6"
3804    "name": "PA_CL_VPORT_YOFFSET_6"
3809    "name": "PA_CL_VPORT_ZSCALE_6"
3814    "name": "PA_CL_VPORT_ZOFFSET_6"
3819    "name": "PA_CL_VPORT_XSCALE_7"
3824    "name": "PA_CL_VPORT_XOFFSET_7"
3829    "name": "PA_CL_VPORT_YSCALE_7"
3834    "name": "PA_CL_VPORT_YOFFSET_7"
3839    "name": "PA_CL_VPORT_ZSCALE_7"
3844    "name": "PA_CL_VPORT_ZOFFSET_7"
3849    "name": "PA_CL_VPORT_XSCALE_8"
3854    "name": "PA_CL_VPORT_XOFFSET_8"
3859    "name": "PA_CL_VPORT_YSCALE_8"
3864    "name": "PA_CL_VPORT_YOFFSET_8"
3869    "name": "PA_CL_VPORT_ZSCALE_8"
3874    "name": "PA_CL_VPORT_ZOFFSET_8"
3879    "name": "PA_CL_VPORT_XSCALE_9"
3884    "name": "PA_CL_VPORT_XOFFSET_9"
3889    "name": "PA_CL_VPORT_YSCALE_9"
3894    "name": "PA_CL_VPORT_YOFFSET_9"
3899    "name": "PA_CL_VPORT_ZSCALE_9"
3904    "name": "PA_CL_VPORT_ZOFFSET_9"
3909    "name": "PA_CL_VPORT_XSCALE_10"
3914    "name": "PA_CL_VPORT_XOFFSET_10"
3919    "name": "PA_CL_VPORT_YSCALE_10"
3924    "name": "PA_CL_VPORT_YOFFSET_10"
3929    "name": "PA_CL_VPORT_ZSCALE_10"
3934    "name": "PA_CL_VPORT_ZOFFSET_10"
3939    "name": "PA_CL_VPORT_XSCALE_11"
3944    "name": "PA_CL_VPORT_XOFFSET_11"
3949    "name": "PA_CL_VPORT_YSCALE_11"
3954    "name": "PA_CL_VPORT_YOFFSET_11"
3959    "name": "PA_CL_VPORT_ZSCALE_11"
3964    "name": "PA_CL_VPORT_ZOFFSET_11"
3969    "name": "PA_CL_VPORT_XSCALE_12"
3974    "name": "PA_CL_VPORT_XOFFSET_12"
3979    "name": "PA_CL_VPORT_YSCALE_12"
3984    "name": "PA_CL_VPORT_YOFFSET_12"
3989    "name": "PA_CL_VPORT_ZSCALE_12"
3994    "name": "PA_CL_VPORT_ZOFFSET_12"
3999    "name": "PA_CL_VPORT_XSCALE_13"
4004    "name": "PA_CL_VPORT_XOFFSET_13"
4009    "name": "PA_CL_VPORT_YSCALE_13"
4014    "name": "PA_CL_VPORT_YOFFSET_13"
4019    "name": "PA_CL_VPORT_ZSCALE_13"
4024    "name": "PA_CL_VPORT_ZOFFSET_13"
4029    "name": "PA_CL_VPORT_XSCALE_14"
4034    "name": "PA_CL_VPORT_XOFFSET_14"
4039    "name": "PA_CL_VPORT_YSCALE_14"
4044    "name": "PA_CL_VPORT_YOFFSET_14"
4049    "name": "PA_CL_VPORT_ZSCALE_14"
4054    "name": "PA_CL_VPORT_ZOFFSET_14"
4059    "name": "PA_CL_VPORT_XSCALE_15"
4064    "name": "PA_CL_VPORT_XOFFSET_15"
4069    "name": "PA_CL_VPORT_YSCALE_15"
4074    "name": "PA_CL_VPORT_YOFFSET_15"
4079    "name": "PA_CL_VPORT_ZSCALE_15"
4084    "name": "PA_CL_VPORT_ZOFFSET_15"
4089    "name": "PA_CL_UCP_0_X"
4094    "name": "PA_CL_UCP_0_Y"
4099    "name": "PA_CL_UCP_0_Z"
4104    "name": "PA_CL_UCP_0_W"
4109    "name": "PA_CL_UCP_1_X"
4114    "name": "PA_CL_UCP_1_Y"
4119    "name": "PA_CL_UCP_1_Z"
4124    "name": "PA_CL_UCP_1_W"
4129    "name": "PA_CL_UCP_2_X"
4134    "name": "PA_CL_UCP_2_Y"
4139    "name": "PA_CL_UCP_2_Z"
4144    "name": "PA_CL_UCP_2_W"
4149    "name": "PA_CL_UCP_3_X"
4154    "name": "PA_CL_UCP_3_Y"
4159    "name": "PA_CL_UCP_3_Z"
4164    "name": "PA_CL_UCP_3_W"
4169    "name": "PA_CL_UCP_4_X"
4174    "name": "PA_CL_UCP_4_Y"
4179    "name": "PA_CL_UCP_4_Z"
4184    "name": "PA_CL_UCP_4_W"
4189    "name": "PA_CL_UCP_5_X"
4194    "name": "PA_CL_UCP_5_Y"
4199    "name": "PA_CL_UCP_5_Z"
4204    "name": "PA_CL_UCP_5_W"
4209    "name": "SPI_PS_INPUT_CNTL_0",
4215    "name": "SPI_PS_INPUT_CNTL_1",
4221    "name": "SPI_PS_INPUT_CNTL_2",
4227    "name": "SPI_PS_INPUT_CNTL_3",
4233    "name": "SPI_PS_INPUT_CNTL_4",
4239    "name": "SPI_PS_INPUT_CNTL_5",
4245    "name": "SPI_PS_INPUT_CNTL_6",
4251    "name": "SPI_PS_INPUT_CNTL_7",
4257    "name": "SPI_PS_INPUT_CNTL_8",
4263    "name": "SPI_PS_INPUT_CNTL_9",
4269    "name": "SPI_PS_INPUT_CNTL_10",
4275    "name": "SPI_PS_INPUT_CNTL_11",
4281    "name": "SPI_PS_INPUT_CNTL_12",
4287    "name": "SPI_PS_INPUT_CNTL_13",
4293    "name": "SPI_PS_INPUT_CNTL_14",
4299    "name": "SPI_PS_INPUT_CNTL_15",
4305    "name": "SPI_PS_INPUT_CNTL_16",
4311    "name": "SPI_PS_INPUT_CNTL_17",
4317    "name": "SPI_PS_INPUT_CNTL_18",
4323    "name": "SPI_PS_INPUT_CNTL_19",
4329    "name": "SPI_PS_INPUT_CNTL_20",
4335    "name": "SPI_PS_INPUT_CNTL_21",
4341    "name": "SPI_PS_INPUT_CNTL_22",
4347    "name": "SPI_PS_INPUT_CNTL_23",
4353    "name": "SPI_PS_INPUT_CNTL_24",
4359    "name": "SPI_PS_INPUT_CNTL_25",
4365    "name": "SPI_PS_INPUT_CNTL_26",
4371    "name": "SPI_PS_INPUT_CNTL_27",
4377    "name": "SPI_PS_INPUT_CNTL_28",
4383    "name": "SPI_PS_INPUT_CNTL_29",
4389    "name": "SPI_PS_INPUT_CNTL_30",
4395    "name": "SPI_PS_INPUT_CNTL_31",
4401    "name": "SPI_VS_OUT_CONFIG",
4407    "name": "SPI_PS_INPUT_ENA",
4413    "name": "SPI_PS_INPUT_ADDR",
4419    "name": "SPI_INTERP_CONTROL_0",
4425    "name": "SPI_PS_IN_CONTROL",
4431    "name": "SPI_BARYC_CNTL",
4437    "name": "SPI_TMPRING_SIZE",
4443    "name": "SPI_SHADER_POS_FORMAT",
4449    "name": "SPI_SHADER_Z_FORMAT",
4455    "name": "SPI_SHADER_COL_FORMAT",
4461    "name": "CB_BLEND0_CONTROL",
4467    "name": "CB_BLEND1_CONTROL",
4473    "name": "CB_BLEND2_CONTROL",
4479    "name": "CB_BLEND3_CONTROL",
4485    "name": "CB_BLEND4_CONTROL",
4491    "name": "CB_BLEND5_CONTROL",
4497    "name": "CB_BLEND6_CONTROL",
4503    "name": "CB_BLEND7_CONTROL",
4509    "name": "CS_COPY_STATE",
4515    "name": "GFX_COPY_STATE",
4521    "name": "PA_CL_POINT_X_RAD"
4526    "name": "PA_CL_POINT_Y_RAD"
4531    "name": "PA_CL_POINT_SIZE"
4536    "name": "PA_CL_POINT_CULL_RAD"
4541    "name": "VGT_DMA_BASE_HI",
4547    "name": "VGT_DMA_BASE"
4552    "name": "VGT_DRAW_INITIATOR",
4558    "name": "VGT_IMMED_DATA"
4563    "name": "VGT_EVENT_ADDRESS_REG",
4569    "name": "DB_DEPTH_CONTROL",
4575    "name": "DB_EQAA",
4581    "name": "CB_COLOR_CONTROL",
4587    "name": "DB_SHADER_CONTROL",
4593    "name": "PA_CL_CLIP_CNTL",
4599    "name": "PA_SU_SC_MODE_CNTL",
4605    "name": "PA_CL_VTE_CNTL",
4611    "name": "PA_CL_VS_OUT_CNTL",
4617    "name": "PA_CL_NANINF_CNTL",
4623    "name": "PA_SU_LINE_STIPPLE_CNTL",
4629    "name": "PA_SU_LINE_STIPPLE_SCALE"
4634    "name": "PA_SU_PRIM_FILTER_CNTL",
4640    "name": "PA_SU_POINT_SIZE",
4646    "name": "PA_SU_POINT_MINMAX",
4652    "name": "PA_SU_LINE_CNTL",
4658    "name": "PA_SC_LINE_STIPPLE",
4664    "name": "VGT_OUTPUT_PATH_CNTL",
4670    "name": "VGT_HOS_CNTL",
4676    "name": "VGT_HOS_MAX_TESS_LEVEL"
4681    "name": "VGT_HOS_MIN_TESS_LEVEL"
4686    "name": "VGT_HOS_REUSE_DEPTH",
4692    "name": "VGT_GROUP_PRIM_TYPE",
4698    "name": "VGT_GROUP_FIRST_DECR",
4704    "name": "VGT_GROUP_DECR",
4710    "name": "VGT_GROUP_VECT_0_CNTL",
4716    "name": "VGT_GROUP_VECT_1_CNTL",
4722    "name": "VGT_GROUP_VECT_0_FMT_CNTL",
4728    "name": "VGT_GROUP_VECT_1_FMT_CNTL",
4734    "name": "VGT_GS_MODE",
4740    "name": "VGT_GS_ONCHIP_CNTL",
4746    "name": "PA_SC_MODE_CNTL_0",
4752    "name": "PA_SC_MODE_CNTL_1",
4758    "name": "VGT_ENHANCE"
4763    "name": "VGT_GS_PER_ES",
4769    "name": "VGT_ES_PER_GS",
4775    "name": "VGT_GS_PER_VS",
4781    "name": "VGT_GSVS_RING_OFFSET_1",
4787    "name": "VGT_GSVS_RING_OFFSET_2",
4793    "name": "VGT_GSVS_RING_OFFSET_3",
4799    "name": "VGT_GS_OUT_PRIM_TYPE",
4805    "name": "IA_ENHANCE"
4810    "name": "VGT_DMA_SIZE"
4815    "name": "VGT_DMA_MAX_SIZE"
4820    "name": "VGT_DMA_INDEX_TYPE",
4826    "name": "WD_ENHANCE"
4831    "name": "VGT_PRIMITIVEID_EN",
4837    "name": "VGT_DMA_NUM_INSTANCES"
4842    "name": "VGT_PRIMITIVEID_RESET"
4847    "name": "VGT_EVENT_INITIATOR",
4853    "name": "VGT_MULTI_PRIM_IB_RESET_EN",
4859    "name": "VGT_INSTANCE_STEP_RATE_0"
4864    "name": "VGT_INSTANCE_STEP_RATE_1"
4869    "name": "IA_MULTI_VGT_PARAM",
4875    "name": "VGT_ESGS_RING_ITEMSIZE",
4881    "name": "VGT_GSVS_RING_ITEMSIZE",
4887    "name": "VGT_REUSE_OFF",
4893    "name": "VGT_VTX_CNT_EN",
4899    "name": "DB_HTILE_SURFACE",
4905    "name": "DB_SRESULTS_COMPARE_STATE0",
4911    "name": "DB_SRESULTS_COMPARE_STATE1",
4917    "name": "DB_PRELOAD_CONTROL",
4923    "name": "VGT_STRMOUT_BUFFER_SIZE_0"
4928    "name": "VGT_STRMOUT_VTX_STRIDE_0",
4934    "name": "VGT_STRMOUT_BUFFER_OFFSET_0"
4939    "name": "VGT_STRMOUT_BUFFER_SIZE_1"
4944    "name": "VGT_STRMOUT_VTX_STRIDE_1",
4950    "name": "VGT_STRMOUT_BUFFER_OFFSET_1"
4955    "name": "VGT_STRMOUT_BUFFER_SIZE_2"
4960    "name": "VGT_STRMOUT_VTX_STRIDE_2",
4966    "name": "VGT_STRMOUT_BUFFER_OFFSET_2"
4971    "name": "VGT_STRMOUT_BUFFER_SIZE_3"
4976    "name": "VGT_STRMOUT_VTX_STRIDE_3",
4982    "name": "VGT_STRMOUT_BUFFER_OFFSET_3"
4987    "name": "VGT_STRMOUT_DRAW_OPAQUE_OFFSET"
4992    "name": "VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE"
4997    "name": "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE",
5003    "name": "VGT_GS_MAX_VERT_OUT",
5009    "name": "VGT_TESS_DISTRIBUTION",
5015    "name": "VGT_SHADER_STAGES_EN",
5021    "name": "VGT_LS_HS_CONFIG",
5027    "name": "VGT_GS_VERT_ITEMSIZE",
5033    "name": "VGT_GS_VERT_ITEMSIZE_1",
5039    "name": "VGT_GS_VERT_ITEMSIZE_2",
5045    "name": "VGT_GS_VERT_ITEMSIZE_3",
5051    "name": "VGT_TF_PARAM",
5057    "name": "DB_ALPHA_TO_MASK",
5063    "name": "VGT_DISPATCH_DRAW_INDEX"
5068    "name": "PA_SU_POLY_OFFSET_DB_FMT_CNTL",
5074    "name": "PA_SU_POLY_OFFSET_CLAMP"
5079    "name": "PA_SU_POLY_OFFSET_FRONT_SCALE"
5084    "name": "PA_SU_POLY_OFFSET_FRONT_OFFSET"
5089    "name": "PA_SU_POLY_OFFSET_BACK_SCALE"
5094    "name": "PA_SU_POLY_OFFSET_BACK_OFFSET"
5099    "name": "VGT_GS_INSTANCE_CNT",
5105    "name": "VGT_STRMOUT_CONFIG",
5111    "name": "VGT_STRMOUT_BUFFER_CONFIG",
5117    "name": "PA_SC_CENTROID_PRIORITY_0",
5123    "name": "PA_SC_CENTROID_PRIORITY_1",
5129    "name": "PA_SC_LINE_CNTL",
5135    "name": "PA_SC_AA_CONFIG",
5141    "name": "PA_SU_VTX_CNTL",
5147    "name": "PA_CL_GB_VERT_CLIP_ADJ"
5152    "name": "PA_CL_GB_VERT_DISC_ADJ"
5157    "name": "PA_CL_GB_HORZ_CLIP_ADJ"
5162    "name": "PA_CL_GB_HORZ_DISC_ADJ"
5167    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0",
5173    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1",
5179    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2",
5185    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3",
5191    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0",
5197    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1",
5203    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2",
5209    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3",
5215    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0",
5221    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1",
5227    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2",
5233    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3",
5239    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0",
5245    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1",
5251    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2",
5257    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3",
5263    "name": "PA_SC_AA_MASK_X0Y0_X1Y0",
5269    "name": "PA_SC_AA_MASK_X0Y1_X1Y1",
5275    "name": "VGT_VERTEX_REUSE_BLOCK_CNTL",
5281    "name": "VGT_OUT_DEALLOC_CNTL",
5287    "name": "CB_COLOR0_BASE"
5292    "name": "CB_COLOR0_PITCH",
5298    "name": "CB_COLOR0_SLICE",
5304    "name": "CB_COLOR0_VIEW",
5310    "name": "CB_COLOR0_INFO",
5316    "name": "CB_COLOR0_ATTRIB",
5322    "name": "CB_COLOR0_DCC_CONTROL",
5328    "name": "CB_COLOR0_CMASK"
5333    "name": "CB_COLOR0_CMASK_SLICE",
5339    "name": "CB_COLOR0_FMASK"
5344    "name": "CB_COLOR0_FMASK_SLICE",
5350    "name": "CB_COLOR0_CLEAR_WORD0"
5355    "name": "CB_COLOR0_CLEAR_WORD1"
5360    "name": "CB_COLOR0_DCC_BASE"
5365    "name": "CB_COLOR1_BASE"
5370    "name": "CB_COLOR1_PITCH",
5376    "name": "CB_COLOR1_SLICE",
5382    "name": "CB_COLOR1_VIEW",
5388    "name": "CB_COLOR1_INFO",
5394    "name": "CB_COLOR1_ATTRIB",
5400    "name": "CB_COLOR1_DCC_CONTROL",
5406    "name": "CB_COLOR1_CMASK"
5411    "name": "CB_COLOR1_CMASK_SLICE",
5417    "name": "CB_COLOR1_FMASK"
5422    "name": "CB_COLOR1_FMASK_SLICE",
5428    "name": "CB_COLOR1_CLEAR_WORD0"
5433    "name": "CB_COLOR1_CLEAR_WORD1"
5438    "name": "CB_COLOR1_DCC_BASE"
5443    "name": "CB_COLOR2_BASE"
5448    "name": "CB_COLOR2_PITCH",
5454    "name": "CB_COLOR2_SLICE",
5460    "name": "CB_COLOR2_VIEW",
5466    "name": "CB_COLOR2_INFO",
5472    "name": "CB_COLOR2_ATTRIB",
5478    "name": "CB_COLOR2_DCC_CONTROL",
5484    "name": "CB_COLOR2_CMASK"
5489    "name": "CB_COLOR2_CMASK_SLICE",
5495    "name": "CB_COLOR2_FMASK"
5500    "name": "CB_COLOR2_FMASK_SLICE",
5506    "name": "CB_COLOR2_CLEAR_WORD0"
5511    "name": "CB_COLOR2_CLEAR_WORD1"
5516    "name": "CB_COLOR2_DCC_BASE"
5521    "name": "CB_COLOR3_BASE"
5526    "name": "CB_COLOR3_PITCH",
5532    "name": "CB_COLOR3_SLICE",
5538    "name": "CB_COLOR3_VIEW",
5544    "name": "CB_COLOR3_INFO",
5550    "name": "CB_COLOR3_ATTRIB",
5556    "name": "CB_COLOR3_DCC_CONTROL",
5562    "name": "CB_COLOR3_CMASK"
5567    "name": "CB_COLOR3_CMASK_SLICE",
5573    "name": "CB_COLOR3_FMASK"
5578    "name": "CB_COLOR3_FMASK_SLICE",
5584    "name": "CB_COLOR3_CLEAR_WORD0"
5589    "name": "CB_COLOR3_CLEAR_WORD1"
5594    "name": "CB_COLOR3_DCC_BASE"
5599    "name": "CB_COLOR4_BASE"
5604    "name": "CB_COLOR4_PITCH",
5610    "name": "CB_COLOR4_SLICE",
5616    "name": "CB_COLOR4_VIEW",
5622    "name": "CB_COLOR4_INFO",
5628    "name": "CB_COLOR4_ATTRIB",
5634    "name": "CB_COLOR4_DCC_CONTROL",
5640    "name": "CB_COLOR4_CMASK"
5645    "name": "CB_COLOR4_CMASK_SLICE",
5651    "name": "CB_COLOR4_FMASK"
5656    "name": "CB_COLOR4_FMASK_SLICE",
5662    "name": "CB_COLOR4_CLEAR_WORD0"
5667    "name": "CB_COLOR4_CLEAR_WORD1"
5672    "name": "CB_COLOR4_DCC_BASE"
5677    "name": "CB_COLOR5_BASE"
5682    "name": "CB_COLOR5_PITCH",
5688    "name": "CB_COLOR5_SLICE",
5694    "name": "CB_COLOR5_VIEW",
5700    "name": "CB_COLOR5_INFO",
5706    "name": "CB_COLOR5_ATTRIB",
5712    "name": "CB_COLOR5_DCC_CONTROL",
5718    "name": "CB_COLOR5_CMASK"
5723    "name": "CB_COLOR5_CMASK_SLICE",
5729    "name": "CB_COLOR5_FMASK"
5734    "name": "CB_COLOR5_FMASK_SLICE",
5740    "name": "CB_COLOR5_CLEAR_WORD0"
5745    "name": "CB_COLOR5_CLEAR_WORD1"
5750    "name": "CB_COLOR5_DCC_BASE"
5755    "name": "CB_COLOR6_BASE"
5760    "name": "CB_COLOR6_PITCH",
5766    "name": "CB_COLOR6_SLICE",
5772    "name": "CB_COLOR6_VIEW",
5778    "name": "CB_COLOR6_INFO",
5784    "name": "CB_COLOR6_ATTRIB",
5790    "name": "CB_COLOR6_DCC_CONTROL",
5796    "name": "CB_COLOR6_CMASK"
5801    "name": "CB_COLOR6_CMASK_SLICE",
5807    "name": "CB_COLOR6_FMASK"
5812    "name": "CB_COLOR6_FMASK_SLICE",
5818    "name": "CB_COLOR6_CLEAR_WORD0"
5823    "name": "CB_COLOR6_CLEAR_WORD1"
5828    "name": "CB_COLOR6_DCC_BASE"
5833    "name": "CB_COLOR7_BASE"
5838    "name": "CB_COLOR7_PITCH",
5844    "name": "CB_COLOR7_SLICE",
5850    "name": "CB_COLOR7_VIEW",
5856    "name": "CB_COLOR7_INFO",
5862    "name": "CB_COLOR7_ATTRIB",
5868    "name": "CB_COLOR7_DCC_CONTROL",
5874    "name": "CB_COLOR7_CMASK"
5879    "name": "CB_COLOR7_CMASK_SLICE",
5885    "name": "CB_COLOR7_FMASK"
5890    "name": "CB_COLOR7_FMASK_SLICE",
5896    "name": "CB_COLOR7_CLEAR_WORD0"
5901    "name": "CB_COLOR7_CLEAR_WORD1"
5906    "name": "CB_COLOR7_DCC_BASE"
5911    "name": "CP_EOP_DONE_ADDR_LO",
5917    "name": "CP_EOP_DONE_ADDR_HI",
5923    "name": "CP_EOP_DONE_DATA_LO"
5928    "name": "CP_EOP_DONE_DATA_HI"
5933    "name": "CP_EOP_LAST_FENCE_LO"
5938    "name": "CP_EOP_LAST_FENCE_HI"
5943    "name": "CP_STREAM_OUT_ADDR_LO",
5949    "name": "CP_STREAM_OUT_ADDR_HI",
5955    "name": "CP_NUM_PRIM_WRITTEN_COUNT0_LO"
5960    "name": "CP_NUM_PRIM_WRITTEN_COUNT0_HI"
5965    "name": "CP_NUM_PRIM_NEEDED_COUNT0_LO"
5970    "name": "CP_NUM_PRIM_NEEDED_COUNT0_HI"
5975    "name": "CP_NUM_PRIM_WRITTEN_COUNT1_LO"
5980    "name": "CP_NUM_PRIM_WRITTEN_COUNT1_HI"
5985    "name": "CP_NUM_PRIM_NEEDED_COUNT1_LO"
5990    "name": "CP_NUM_PRIM_NEEDED_COUNT1_HI"
5995    "name": "CP_NUM_PRIM_WRITTEN_COUNT2_LO"
6000    "name": "CP_NUM_PRIM_WRITTEN_COUNT2_HI"
6005    "name": "CP_NUM_PRIM_NEEDED_COUNT2_LO"
6010    "name": "CP_NUM_PRIM_NEEDED_COUNT2_HI"
6015    "name": "CP_NUM_PRIM_WRITTEN_COUNT3_LO"
6020    "name": "CP_NUM_PRIM_WRITTEN_COUNT3_HI"
6025    "name": "CP_NUM_PRIM_NEEDED_COUNT3_LO"
6030    "name": "CP_NUM_PRIM_NEEDED_COUNT3_HI"
6035    "name": "CP_PIPE_STATS_ADDR_LO",
6041    "name": "CP_PIPE_STATS_ADDR_HI",
6047    "name": "CP_VGT_IAVERT_COUNT_LO"
6052    "name": "CP_VGT_IAVERT_COUNT_HI"
6057    "name": "CP_VGT_IAPRIM_COUNT_LO"
6062    "name": "CP_VGT_IAPRIM_COUNT_HI"
6067    "name": "CP_VGT_GSPRIM_COUNT_LO"
6072    "name": "CP_VGT_GSPRIM_COUNT_HI"
6077    "name": "CP_VGT_VSINVOC_COUNT_LO"
6082    "name": "CP_VGT_VSINVOC_COUNT_HI"
6087    "name": "CP_VGT_GSINVOC_COUNT_LO"
6092    "name": "CP_VGT_GSINVOC_COUNT_HI"
6097    "name": "CP_VGT_HSINVOC_COUNT_LO"
6102    "name": "CP_VGT_HSINVOC_COUNT_HI"
6107    "name": "CP_VGT_DSINVOC_COUNT_LO"
6112    "name": "CP_VGT_DSINVOC_COUNT_HI"
6117    "name": "CP_PA_CINVOC_COUNT_LO"
6122    "name": "CP_PA_CINVOC_COUNT_HI"
6127    "name": "CP_PA_CPRIM_COUNT_LO"
6132    "name": "CP_PA_CPRIM_COUNT_HI"
6137    "name": "CP_SC_PSINVOC_COUNT0_LO"
6142    "name": "CP_SC_PSINVOC_COUNT0_HI"
6147    "name": "CP_SC_PSINVOC_COUNT1_LO"
6152    "name": "CP_SC_PSINVOC_COUNT1_HI"
6157    "name": "CP_VGT_CSINVOC_COUNT_LO"
6162    "name": "CP_VGT_CSINVOC_COUNT_HI"
6167    "name": "CP_PIPE_STATS_CONTROL",
6173    "name": "CP_STREAM_OUT_CONTROL",
6179    "name": "CP_STRMOUT_CNTL",
6185    "name": "SCRATCH_REG0"
6190    "name": "SCRATCH_REG1"
6195    "name": "SCRATCH_REG2"
6200    "name": "SCRATCH_REG3"
6205    "name": "SCRATCH_REG4"
6210    "name": "SCRATCH_REG5"
6215    "name": "SCRATCH_REG6"
6220    "name": "SCRATCH_REG7"
6225    "name": "SCRATCH_UMSK",
6231    "name": "SCRATCH_ADDR"
6236    "name": "CP_PFP_ATOMIC_PREOP_LO"
6241    "name": "CP_PFP_ATOMIC_PREOP_HI"
6246    "name": "CP_PFP_GDS_ATOMIC0_PREOP_LO"
6251    "name": "CP_PFP_GDS_ATOMIC0_PREOP_HI"
6256    "name": "CP_PFP_GDS_ATOMIC1_PREOP_LO"
6261    "name": "CP_PFP_GDS_ATOMIC1_PREOP_HI"
6266    "name": "CP_APPEND_ADDR_LO",
6272    "name": "CP_APPEND_ADDR_HI",
6278    "name": "CP_APPEND_DATA"
6283    "name": "CP_APPEND_LAST_CS_FENCE"
6288    "name": "CP_APPEND_LAST_PS_FENCE"
6293    "name": "CP_ATOMIC_PREOP_LO"
6298    "name": "CP_ATOMIC_PREOP_HI"
6303    "name": "CP_GDS_ATOMIC0_PREOP_LO"
6308    "name": "CP_GDS_ATOMIC0_PREOP_HI"
6313    "name": "CP_GDS_ATOMIC1_PREOP_LO"
6318    "name": "CP_GDS_ATOMIC1_PREOP_HI"
6323    "name": "CP_ME_MC_WADDR_LO",
6329    "name": "CP_ME_MC_WADDR_HI",
6335    "name": "CP_ME_MC_WDATA_LO"
6340    "name": "CP_ME_MC_WDATA_HI"
6345    "name": "CP_ME_MC_RADDR_LO",
6351    "name": "CP_ME_MC_RADDR_HI",
6357    "name": "CP_SEM_WAIT_TIMER"
6362    "name": "CP_SIG_SEM_ADDR_LO",
6368    "name": "CP_SIG_SEM_ADDR_HI",
6374    "name": "CP_WAIT_REG_MEM_TIMEOUT"
6379    "name": "CP_WAIT_SEM_ADDR_LO",
6385    "name": "CP_WAIT_SEM_ADDR_HI",
6391    "name": "CP_DMA_PFP_CONTROL",
6397    "name": "CP_DMA_ME_CONTROL",
6403    "name": "CP_COHER_BASE_HI",
6409    "name": "CP_COHER_START_DELAY",
6415    "name": "CP_COHER_CNTL",
6421    "name": "CP_COHER_SIZE"
6426    "name": "CP_COHER_BASE"
6431    "name": "CP_COHER_STATUS",
6437    "name": "CP_DMA_ME_SRC_ADDR"
6442    "name": "CP_DMA_ME_SRC_ADDR_HI",
6448    "name": "CP_DMA_ME_DST_ADDR"
6453    "name": "CP_DMA_ME_DST_ADDR_HI",
6459    "name": "CP_DMA_ME_COMMAND",
6465    "name": "CP_DMA_PFP_SRC_ADDR"
6470    "name": "CP_DMA_PFP_SRC_ADDR_HI",
6476    "name": "CP_DMA_PFP_DST_ADDR"
6481    "name": "CP_DMA_PFP_DST_ADDR_HI",
6487    "name": "CP_DMA_PFP_COMMAND",
6493    "name": "CP_DMA_CNTL",
6499    "name": "CP_DMA_READ_TAGS",
6505    "name": "CP_COHER_SIZE_HI",
6511    "name": "CP_PFP_IB_CONTROL",
6517    "name": "CP_PFP_LOAD_CONTROL",
6523    "name": "CP_SCRATCH_INDEX",
6529    "name": "CP_SCRATCH_DATA"
6534    "name": "CP_RB_OFFSET",
6540    "name": "CP_IB1_OFFSET",
6546    "name": "CP_IB2_OFFSET",
6552    "name": "CP_IB1_PREAMBLE_BEGIN",
6558    "name": "CP_IB1_PREAMBLE_END",
6564    "name": "CP_IB2_PREAMBLE_BEGIN",
6570    "name": "CP_IB2_PREAMBLE_END",
6576    "name": "CP_CE_IB1_OFFSET",
6582    "name": "CP_CE_IB2_OFFSET",
6588    "name": "CP_CE_COUNTER"
6593    "name": "CP_CE_RB_OFFSET",
6599    "name": "CP_CE_INIT_BASE_LO",
6605    "name": "CP_CE_INIT_BASE_HI",
6611    "name": "CP_CE_INIT_BUFSZ",
6617    "name": "CP_CE_IB1_BASE_LO",
6623    "name": "CP_CE_IB1_BASE_HI",
6629    "name": "CP_CE_IB1_BUFSZ",
6635    "name": "CP_CE_IB2_BASE_LO",
6641    "name": "CP_CE_IB2_BASE_HI",
6647    "name": "CP_CE_IB2_BUFSZ",
6653    "name": "CP_IB1_BASE_LO",
6659    "name": "CP_IB1_BASE_HI",
6665    "name": "CP_IB1_BUFSZ",
6671    "name": "CP_IB2_BASE_LO",
6677    "name": "CP_IB2_BASE_HI",
6683    "name": "CP_IB2_BUFSZ",
6689    "name": "CP_ST_BASE_LO",
6695    "name": "CP_ST_BASE_HI",
6701    "name": "CP_ST_BUFSZ",
6707    "name": "CP_EOP_DONE_EVENT_CNTL",
6713    "name": "CP_EOP_DONE_DATA_CNTL",
6719    "name": "CP_EOP_DONE_CNTX_ID",
6725    "name": "CP_PFP_COMPLETION_STATUS",
6731    "name": "CP_CE_COMPLETION_STATUS",
6737    "name": "CP_PRED_NOT_VISIBLE",
6743    "name": "CP_PFP_METADATA_BASE_ADDR"
6748    "name": "CP_PFP_METADATA_BASE_ADDR_HI",
6754    "name": "CP_CE_METADATA_BASE_ADDR"
6759    "name": "CP_CE_METADATA_BASE_ADDR_HI",
6765    "name": "CP_DRAW_INDX_INDR_ADDR"
6770    "name": "CP_DRAW_INDX_INDR_ADDR_HI",
6776    "name": "CP_DISPATCH_INDR_ADDR"
6781    "name": "CP_DISPATCH_INDR_ADDR_HI",
6787    "name": "CP_INDEX_BASE_ADDR"
6792    "name": "CP_INDEX_BASE_ADDR_HI",
6798    "name": "CP_INDEX_TYPE",
6804    "name": "CP_GDS_BKUP_ADDR"
6809    "name": "CP_GDS_BKUP_ADDR_HI",
6815    "name": "CP_SAMPLE_STATUS",
6821    "name": "GRBM_GFX_INDEX",
6827    "name": "VGT_ESGS_RING_SIZE"
6832    "name": "VGT_GSVS_RING_SIZE"
6837    "name": "VGT_PRIMITIVE_TYPE",
6843    "name": "VGT_INDEX_TYPE",
6849    "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_0"
6854    "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_1"
6859    "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_2"
6864    "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_3"
6869    "name": "VGT_NUM_INDICES"
6874    "name": "VGT_NUM_INSTANCES"
6879    "name": "VGT_TF_RING_SIZE",
6885    "name": "VGT_HS_OFFCHIP_PARAM",
6891    "name": "VGT_TF_MEMORY_BASE"
6896    "name": "PA_SU_LINE_STIPPLE_VALUE",
6902    "name": "PA_SC_LINE_STIPPLE_STATE",
6908    "name": "PA_SC_SCREEN_EXTENT_MIN_0",
6914    "name": "PA_SC_SCREEN_EXTENT_MAX_0",
6920    "name": "PA_SC_SCREEN_EXTENT_MIN_1",
6926    "name": "PA_SC_SCREEN_EXTENT_MAX_1",
6932    "name": "PA_SC_P3D_TRAP_SCREEN_HV_EN",
6938    "name": "PA_SC_P3D_TRAP_SCREEN_H",
6944    "name": "PA_SC_P3D_TRAP_SCREEN_V",
6950    "name": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE",
6956    "name": "PA_SC_P3D_TRAP_SCREEN_COUNT",
6962    "name": "PA_SC_HP3D_TRAP_SCREEN_HV_EN",
6968    "name": "PA_SC_HP3D_TRAP_SCREEN_H",
6974    "name": "PA_SC_HP3D_TRAP_SCREEN_V",
6980    "name": "PA_SC_HP3D_TRAP_SCREEN_OCCURRENCE",
6986    "name": "PA_SC_HP3D_TRAP_SCREEN_COUNT",
6992    "name": "PA_SC_TRAP_SCREEN_HV_EN",
6998    "name": "PA_SC_TRAP_SCREEN_H",
7004    "name": "PA_SC_TRAP_SCREEN_V",
7010    "name": "PA_SC_TRAP_SCREEN_OCCURRENCE",
7016    "name": "PA_SC_TRAP_SCREEN_COUNT",
7022    "name": "SQ_THREAD_TRACE_BASE"
7027    "name": "SQ_THREAD_TRACE_SIZE",
7033    "name": "SQ_THREAD_TRACE_MASK",
7039    "name": "SQ_THREAD_TRACE_TOKEN_MASK",
7045    "name": "SQ_THREAD_TRACE_PERF_MASK",
7051    "name": "SQ_THREAD_TRACE_CTRL",
7057    "name": "SQ_THREAD_TRACE_MODE",
7063    "name": "SQ_THREAD_TRACE_BASE2",
7069    "name": "SQ_THREAD_TRACE_TOKEN_MASK2"
7074    "name": "SQ_THREAD_TRACE_WPTR",
7080    "name": "SQ_THREAD_TRACE_STATUS",
7086    "name": "SQ_THREAD_TRACE_HIWATER",
7092    "name": "SQ_THREAD_TRACE_USERDATA_0"
7097    "name": "SQ_THREAD_TRACE_USERDATA_1"
7102    "name": "SQ_THREAD_TRACE_USERDATA_2"
7107    "name": "SQ_THREAD_TRACE_USERDATA_3"
7112    "name": "SQC_CACHES",
7118    "name": "SQC_WRITEBACK",
7124    "name": "TA_CS_BC_BASE_ADDR"
7129    "name": "TA_CS_BC_BASE_ADDR_HI",
7135    "name": "DB_OCCLUSION_COUNT0_LOW"
7140    "name": "DB_OCCLUSION_COUNT0_HI",
7146    "name": "DB_OCCLUSION_COUNT1_LOW"
7151    "name": "DB_OCCLUSION_COUNT1_HI",
7157    "name": "DB_OCCLUSION_COUNT2_LOW"
7162    "name": "DB_OCCLUSION_COUNT2_HI",
7168    "name": "DB_OCCLUSION_COUNT3_LOW"
7173    "name": "DB_OCCLUSION_COUNT3_HI",
7179    "name": "DB_ZPASS_COUNT_LOW"
7184    "name": "DB_ZPASS_COUNT_HI",
7190    "name": "GDS_RD_ADDR"
7195    "name": "GDS_RD_DATA"
7200    "name": "GDS_RD_BURST_ADDR"
7205    "name": "GDS_RD_BURST_COUNT"
7210    "name": "GDS_RD_BURST_DATA"
7215    "name": "GDS_WR_ADDR"
7220    "name": "GDS_WR_DATA"
7225    "name": "GDS_WR_BURST_ADDR"
7230    "name": "GDS_WR_BURST_DATA"
7235    "name": "GDS_WRITE_COMPLETE"
7240    "name": "GDS_ATOM_CNTL",
7246    "name": "GDS_ATOM_COMPLETE",
7252    "name": "GDS_ATOM_BASE",
7258    "name": "GDS_ATOM_SIZE",
7264    "name": "GDS_ATOM_OFFSET0",
7270    "name": "GDS_ATOM_OFFSET1",
7276    "name": "GDS_ATOM_DST"
7281    "name": "GDS_ATOM_OP",
7287    "name": "GDS_ATOM_SRC0"
7292    "name": "GDS_ATOM_SRC0_U"
7297    "name": "GDS_ATOM_SRC1"
7302    "name": "GDS_ATOM_SRC1_U"
7307    "name": "GDS_ATOM_READ0"
7312    "name": "GDS_ATOM_READ0_U"
7317    "name": "GDS_ATOM_READ1"
7322    "name": "GDS_ATOM_READ1_U"
7327    "name": "GDS_GWS_RESOURCE_CNTL",
7333    "name": "GDS_GWS_RESOURCE",
7339    "name": "GDS_GWS_RESOURCE_CNT",
7345    "name": "GDS_OA_CNTL",
7351    "name": "GDS_OA_COUNTER"
7356    "name": "GDS_OA_ADDRESS",
7362    "name": "GDS_OA_INCDEC",
7368    "name": "GDS_OA_RING_SIZE"
7373    "name": "CPG_PERFCOUNTER1_LO"
7378    "name": "CPG_PERFCOUNTER1_HI"
7383    "name": "CPG_PERFCOUNTER0_LO"
7388    "name": "CPG_PERFCOUNTER0_HI"
7393    "name": "CPC_PERFCOUNTER1_LO"
7398    "name": "CPC_PERFCOUNTER1_HI"
7403    "name": "CPC_PERFCOUNTER0_LO"
7408    "name": "CPC_PERFCOUNTER0_HI"
7413    "name": "CPF_PERFCOUNTER1_LO"
7418    "name": "CPF_PERFCOUNTER1_HI"
7423    "name": "CPF_PERFCOUNTER0_LO"
7428    "name": "CPF_PERFCOUNTER0_HI"
7433    "name": "GRBM_PERFCOUNTER0_LO"
7438    "name": "GRBM_PERFCOUNTER0_HI"
7443    "name": "GRBM_PERFCOUNTER1_LO"
7448    "name": "GRBM_PERFCOUNTER1_HI"
7453    "name": "GRBM_SE0_PERFCOUNTER_LO"
7458    "name": "GRBM_SE0_PERFCOUNTER_HI"
7463    "name": "GRBM_SE1_PERFCOUNTER_LO"
7468    "name": "GRBM_SE1_PERFCOUNTER_HI"
7473    "name": "GRBM_SE2_PERFCOUNTER_LO"
7478    "name": "GRBM_SE2_PERFCOUNTER_HI"
7483    "name": "GRBM_SE3_PERFCOUNTER_LO"
7488    "name": "GRBM_SE3_PERFCOUNTER_HI"
7493    "name": "WD_PERFCOUNTER0_LO"
7498    "name": "WD_PERFCOUNTER0_HI"
7503    "name": "WD_PERFCOUNTER1_LO"
7508    "name": "WD_PERFCOUNTER1_HI"
7513    "name": "WD_PERFCOUNTER2_LO"
7518    "name": "WD_PERFCOUNTER2_HI"
7523    "name": "WD_PERFCOUNTER3_LO"
7528    "name": "WD_PERFCOUNTER3_HI"
7533    "name": "IA_PERFCOUNTER0_LO"
7538    "name": "IA_PERFCOUNTER0_HI"
7543    "name": "IA_PERFCOUNTER1_LO"
7548    "name": "IA_PERFCOUNTER1_HI"
7553    "name": "IA_PERFCOUNTER2_LO"
7558    "name": "IA_PERFCOUNTER2_HI"
7563    "name": "IA_PERFCOUNTER3_LO"
7568    "name": "IA_PERFCOUNTER3_HI"
7573    "name": "VGT_PERFCOUNTER0_LO"
7578    "name": "VGT_PERFCOUNTER0_HI"
7583    "name": "VGT_PERFCOUNTER1_LO"
7588    "name": "VGT_PERFCOUNTER1_HI"
7593    "name": "VGT_PERFCOUNTER2_LO"
7598    "name": "VGT_PERFCOUNTER2_HI"
7603    "name": "VGT_PERFCOUNTER3_LO"
7608    "name": "VGT_PERFCOUNTER3_HI"
7613    "name": "PA_SU_PERFCOUNTER0_LO"
7618    "name": "PA_SU_PERFCOUNTER0_HI",
7624    "name": "PA_SU_PERFCOUNTER1_LO"
7629    "name": "PA_SU_PERFCOUNTER1_HI",
7635    "name": "PA_SU_PERFCOUNTER2_LO"
7640    "name": "PA_SU_PERFCOUNTER2_HI",
7646    "name": "PA_SU_PERFCOUNTER3_LO"
7651    "name": "PA_SU_PERFCOUNTER3_HI",
7657    "name": "PA_SC_PERFCOUNTER0_LO"
7662    "name": "PA_SC_PERFCOUNTER0_HI"
7667    "name": "PA_SC_PERFCOUNTER1_LO"
7672    "name": "PA_SC_PERFCOUNTER1_HI"
7677    "name": "PA_SC_PERFCOUNTER2_LO"
7682    "name": "PA_SC_PERFCOUNTER2_HI"
7687    "name": "PA_SC_PERFCOUNTER3_LO"
7692    "name": "PA_SC_PERFCOUNTER3_HI"
7697    "name": "PA_SC_PERFCOUNTER4_LO"
7702    "name": "PA_SC_PERFCOUNTER4_HI"
7707    "name": "PA_SC_PERFCOUNTER5_LO"
7712    "name": "PA_SC_PERFCOUNTER5_HI"
7717    "name": "PA_SC_PERFCOUNTER6_LO"
7722    "name": "PA_SC_PERFCOUNTER6_HI"
7727    "name": "PA_SC_PERFCOUNTER7_LO"
7732    "name": "PA_SC_PERFCOUNTER7_HI"
7737    "name": "SPI_PERFCOUNTER0_HI"
7742    "name": "SPI_PERFCOUNTER0_LO"
7747    "name": "SPI_PERFCOUNTER1_HI"
7752    "name": "SPI_PERFCOUNTER1_LO"
7757    "name": "SPI_PERFCOUNTER2_HI"
7762    "name": "SPI_PERFCOUNTER2_LO"
7767    "name": "SPI_PERFCOUNTER3_HI"
7772    "name": "SPI_PERFCOUNTER3_LO"
7777    "name": "SPI_PERFCOUNTER4_HI"
7782    "name": "SPI_PERFCOUNTER4_LO"
7787    "name": "SPI_PERFCOUNTER5_HI"
7792    "name": "SPI_PERFCOUNTER5_LO"
7797    "name": "SQ_PERFCOUNTER0_LO"
7802    "name": "SQ_PERFCOUNTER0_HI"
7807    "name": "SQ_PERFCOUNTER1_LO"
7812    "name": "SQ_PERFCOUNTER1_HI"
7817    "name": "SQ_PERFCOUNTER2_LO"
7822    "name": "SQ_PERFCOUNTER2_HI"
7827    "name": "SQ_PERFCOUNTER3_LO"
7832    "name": "SQ_PERFCOUNTER3_HI"
7837    "name": "SQ_PERFCOUNTER4_LO"
7842    "name": "SQ_PERFCOUNTER4_HI"
7847    "name": "SQ_PERFCOUNTER5_LO"
7852    "name": "SQ_PERFCOUNTER5_HI"
7857    "name": "SQ_PERFCOUNTER6_LO"
7862    "name": "SQ_PERFCOUNTER6_HI"
7867    "name": "SQ_PERFCOUNTER7_LO"
7872    "name": "SQ_PERFCOUNTER7_HI"
7877    "name": "SQ_PERFCOUNTER8_LO"
7882    "name": "SQ_PERFCOUNTER8_HI"
7887    "name": "SQ_PERFCOUNTER9_LO"
7892    "name": "SQ_PERFCOUNTER9_HI"
7897    "name": "SQ_PERFCOUNTER10_LO"
7902    "name": "SQ_PERFCOUNTER10_HI"
7907    "name": "SQ_PERFCOUNTER11_LO"
7912    "name": "SQ_PERFCOUNTER11_HI"
7917    "name": "SQ_PERFCOUNTER12_LO"
7922    "name": "SQ_PERFCOUNTER12_HI"
7927    "name": "SQ_PERFCOUNTER13_LO"
7932    "name": "SQ_PERFCOUNTER13_HI"
7937    "name": "SQ_PERFCOUNTER14_LO"
7942    "name": "SQ_PERFCOUNTER14_HI"
7947    "name": "SQ_PERFCOUNTER15_LO"
7952    "name": "SQ_PERFCOUNTER15_HI"
7957    "name": "SX_PERFCOUNTER0_LO"
7962    "name": "SX_PERFCOUNTER0_HI"
7967    "name": "SX_PERFCOUNTER1_LO"
7972    "name": "SX_PERFCOUNTER1_HI"
7977    "name": "SX_PERFCOUNTER2_LO"
7982    "name": "SX_PERFCOUNTER2_HI"
7987    "name": "SX_PERFCOUNTER3_LO"
7992    "name": "SX_PERFCOUNTER3_HI"
7997    "name": "GDS_PERFCOUNTER0_LO"
8002    "name": "GDS_PERFCOUNTER0_HI"
8007    "name": "GDS_PERFCOUNTER1_LO"
8012    "name": "GDS_PERFCOUNTER1_HI"
8017    "name": "GDS_PERFCOUNTER2_LO"
8022    "name": "GDS_PERFCOUNTER2_HI"
8027    "name": "GDS_PERFCOUNTER3_LO"
8032    "name": "GDS_PERFCOUNTER3_HI"
8037    "name": "TA_PERFCOUNTER0_LO"
8042    "name": "TA_PERFCOUNTER0_HI"
8047    "name": "TA_PERFCOUNTER1_LO"
8052    "name": "TA_PERFCOUNTER1_HI"
8057    "name": "TD_PERFCOUNTER0_LO"
8062    "name": "TD_PERFCOUNTER0_HI"
8067    "name": "TD_PERFCOUNTER1_LO"
8072    "name": "TD_PERFCOUNTER1_HI"
8077    "name": "TCP_PERFCOUNTER0_LO"
8082    "name": "TCP_PERFCOUNTER0_HI"
8087    "name": "TCP_PERFCOUNTER1_LO"
8092    "name": "TCP_PERFCOUNTER1_HI"
8097    "name": "TCP_PERFCOUNTER2_LO"
8102    "name": "TCP_PERFCOUNTER2_HI"
8107    "name": "TCP_PERFCOUNTER3_LO"
8112    "name": "TCP_PERFCOUNTER3_HI"
8117    "name": "TCC_PERFCOUNTER0_LO"
8122    "name": "TCC_PERFCOUNTER0_HI"
8127    "name": "TCC_PERFCOUNTER1_LO"
8132    "name": "TCC_PERFCOUNTER1_HI"
8137    "name": "TCC_PERFCOUNTER2_LO"
8142    "name": "TCC_PERFCOUNTER2_HI"
8147    "name": "TCC_PERFCOUNTER3_LO"
8152    "name": "TCC_PERFCOUNTER3_HI"
8157    "name": "TCA_PERFCOUNTER0_LO"
8162    "name": "TCA_PERFCOUNTER0_HI"
8167    "name": "TCA_PERFCOUNTER1_LO"
8172    "name": "TCA_PERFCOUNTER1_HI"
8177    "name": "TCA_PERFCOUNTER2_LO"
8182    "name": "TCA_PERFCOUNTER2_HI"
8187    "name": "TCA_PERFCOUNTER3_LO"
8192    "name": "TCA_PERFCOUNTER3_HI"
8197    "name": "CB_PERFCOUNTER0_LO"
8202    "name": "CB_PERFCOUNTER0_HI"
8207    "name": "CB_PERFCOUNTER1_LO"
8212    "name": "CB_PERFCOUNTER1_HI"
8217    "name": "CB_PERFCOUNTER2_LO"
8222    "name": "CB_PERFCOUNTER2_HI"
8227    "name": "CB_PERFCOUNTER3_LO"
8232    "name": "CB_PERFCOUNTER3_HI"
8237    "name": "DB_PERFCOUNTER0_LO"
8242    "name": "DB_PERFCOUNTER0_HI"
8247    "name": "DB_PERFCOUNTER1_LO"
8252    "name": "DB_PERFCOUNTER1_HI"
8257    "name": "DB_PERFCOUNTER2_LO"
8262    "name": "DB_PERFCOUNTER2_HI"
8267    "name": "DB_PERFCOUNTER3_LO"
8272    "name": "DB_PERFCOUNTER3_HI"
8277    "name": "RLC_PERFCOUNTER0_LO"
8282    "name": "RLC_PERFCOUNTER0_HI"
8287    "name": "RLC_PERFCOUNTER1_LO"
8292    "name": "RLC_PERFCOUNTER1_HI"
8297    "name": "CPG_PERFCOUNTER1_SELECT",
8303    "name": "CPG_PERFCOUNTER0_SELECT1",
8309    "name": "CPG_PERFCOUNTER0_SELECT",
8315    "name": "CPC_PERFCOUNTER1_SELECT",
8321    "name": "CPC_PERFCOUNTER0_SELECT1",
8327    "name": "CPF_PERFCOUNTER1_SELECT",
8333    "name": "CPF_PERFCOUNTER0_SELECT1",
8339    "name": "CPF_PERFCOUNTER0_SELECT",
8345    "name": "CP_PERFMON_CNTL",
8351    "name": "CPC_PERFCOUNTER0_SELECT",
8357    "name": "CP_DRAW_OBJECT"
8362    "name": "CP_DRAW_OBJECT_COUNTER",
8368    "name": "CP_DRAW_WINDOW_MASK_HI"
8373    "name": "CP_DRAW_WINDOW_HI"
8378    "name": "CP_DRAW_WINDOW_LO",
8384    "name": "CP_DRAW_WINDOW_CNTL",
8390    "name": "GRBM_PERFCOUNTER0_SELECT",
8396    "name": "GRBM_PERFCOUNTER1_SELECT",
8402    "name": "GRBM_SE0_PERFCOUNTER_SELECT",
8408    "name": "GRBM_SE1_PERFCOUNTER_SELECT",
8414    "name": "GRBM_SE2_PERFCOUNTER_SELECT",
8420    "name": "GRBM_SE3_PERFCOUNTER_SELECT",
8426    "name": "WD_PERFCOUNTER0_SELECT",
8432    "name": "WD_PERFCOUNTER1_SELECT",
8438    "name": "WD_PERFCOUNTER2_SELECT",
8444    "name": "WD_PERFCOUNTER3_SELECT",
8450    "name": "IA_PERFCOUNTER0_SELECT",
8456    "name": "IA_PERFCOUNTER1_SELECT",
8462    "name": "IA_PERFCOUNTER2_SELECT",
8468    "name": "IA_PERFCOUNTER3_SELECT",
8474    "name": "IA_PERFCOUNTER0_SELECT1",
8480    "name": "VGT_PERFCOUNTER0_SELECT",
8486    "name": "VGT_PERFCOUNTER1_SELECT",
8492    "name": "VGT_PERFCOUNTER2_SELECT",
8498    "name": "VGT_PERFCOUNTER3_SELECT",
8504    "name": "VGT_PERFCOUNTER0_SELECT1",
8510    "name": "VGT_PERFCOUNTER1_SELECT1",
8516    "name": "VGT_PERFCOUNTER_SEID_MASK",
8522    "name": "PA_SU_PERFCOUNTER0_SELECT",
8528    "name": "PA_SU_PERFCOUNTER0_SELECT1",
8534    "name": "PA_SU_PERFCOUNTER1_SELECT",
8540    "name": "PA_SU_PERFCOUNTER1_SELECT1",
8546    "name": "PA_SU_PERFCOUNTER2_SELECT",
8552    "name": "PA_SU_PERFCOUNTER3_SELECT",
8558    "name": "PA_SC_PERFCOUNTER0_SELECT",
8564    "name": "PA_SC_PERFCOUNTER0_SELECT1",
8570    "name": "PA_SC_PERFCOUNTER1_SELECT",
8576    "name": "PA_SC_PERFCOUNTER2_SELECT",
8582    "name": "PA_SC_PERFCOUNTER3_SELECT",
8588    "name": "PA_SC_PERFCOUNTER4_SELECT",
8594    "name": "PA_SC_PERFCOUNTER5_SELECT",
8600    "name": "PA_SC_PERFCOUNTER6_SELECT",
8606    "name": "PA_SC_PERFCOUNTER7_SELECT",
8612    "name": "SPI_PERFCOUNTER0_SELECT",
8618    "name": "SPI_PERFCOUNTER1_SELECT",
8624    "name": "SPI_PERFCOUNTER2_SELECT",
8630    "name": "SPI_PERFCOUNTER3_SELECT",
8636    "name": "SPI_PERFCOUNTER0_SELECT1",
8642    "name": "SPI_PERFCOUNTER1_SELECT1",
8648    "name": "SPI_PERFCOUNTER2_SELECT1",
8654    "name": "SPI_PERFCOUNTER3_SELECT1",
8660    "name": "SPI_PERFCOUNTER4_SELECT",
8666    "name": "SPI_PERFCOUNTER5_SELECT",
8672    "name": "SPI_PERFCOUNTER_BINS",
8678    "name": "SQ_PERFCOUNTER0_SELECT",
8684    "name": "SQ_PERFCOUNTER1_SELECT",
8690    "name": "SQ_PERFCOUNTER2_SELECT",
8696    "name": "SQ_PERFCOUNTER3_SELECT",
8702    "name": "SQ_PERFCOUNTER4_SELECT",
8708    "name": "SQ_PERFCOUNTER5_SELECT",
8714    "name": "SQ_PERFCOUNTER6_SELECT",
8720    "name": "SQ_PERFCOUNTER7_SELECT",
8726    "name": "SQ_PERFCOUNTER8_SELECT",
8732    "name": "SQ_PERFCOUNTER9_SELECT",
8738    "name": "SQ_PERFCOUNTER10_SELECT",
8744    "name": "SQ_PERFCOUNTER11_SELECT",
8750    "name": "SQ_PERFCOUNTER12_SELECT",
8756    "name": "SQ_PERFCOUNTER13_SELECT",
8762    "name": "SQ_PERFCOUNTER14_SELECT",
8768    "name": "SQ_PERFCOUNTER15_SELECT",
8774    "name": "SQ_PERFCOUNTER_CTRL",
8780    "name": "SQ_PERFCOUNTER_MASK",
8786    "name": "SQ_PERFCOUNTER_CTRL2",
8792    "name": "SX_PERFCOUNTER0_SELECT",
8798    "name": "SX_PERFCOUNTER1_SELECT",
8804    "name": "SX_PERFCOUNTER2_SELECT",
8810    "name": "SX_PERFCOUNTER3_SELECT",
8816    "name": "SX_PERFCOUNTER0_SELECT1",
8822    "name": "SX_PERFCOUNTER1_SELECT1",
8828    "name": "GDS_PERFCOUNTER0_SELECT",
8834    "name": "GDS_PERFCOUNTER1_SELECT",
8840    "name": "GDS_PERFCOUNTER2_SELECT",
8846    "name": "GDS_PERFCOUNTER3_SELECT",
8852    "name": "GDS_PERFCOUNTER0_SELECT1",
8858    "name": "TA_PERFCOUNTER0_SELECT",
8864    "name": "TA_PERFCOUNTER0_SELECT1",
8870    "name": "TA_PERFCOUNTER1_SELECT",
8876    "name": "TD_PERFCOUNTER0_SELECT",
8882    "name": "TD_PERFCOUNTER0_SELECT1",
8888    "name": "TD_PERFCOUNTER1_SELECT",
8894    "name": "TCP_PERFCOUNTER0_SELECT",
8900    "name": "TCP_PERFCOUNTER0_SELECT1",
8906    "name": "TCP_PERFCOUNTER1_SELECT",
8912    "name": "TCP_PERFCOUNTER1_SELECT1",
8918    "name": "TCP_PERFCOUNTER2_SELECT",
8924    "name": "TCP_PERFCOUNTER3_SELECT",
8930    "name": "TCC_PERFCOUNTER0_SELECT",
8936    "name": "TCC_PERFCOUNTER0_SELECT1",
8942    "name": "TCC_PERFCOUNTER1_SELECT",
8948    "name": "TCC_PERFCOUNTER1_SELECT1",
8954    "name": "TCC_PERFCOUNTER2_SELECT",
8960    "name": "TCC_PERFCOUNTER3_SELECT",
8966    "name": "TCA_PERFCOUNTER0_SELECT",
8972    "name": "TCA_PERFCOUNTER0_SELECT1",
8978    "name": "TCA_PERFCOUNTER1_SELECT",
8984    "name": "TCA_PERFCOUNTER1_SELECT1",
8990    "name": "TCA_PERFCOUNTER2_SELECT",
8996    "name": "TCA_PERFCOUNTER3_SELECT",
9002    "name": "CB_PERFCOUNTER_FILTER",
9008    "name": "CB_PERFCOUNTER0_SELECT",
9014    "name": "CB_PERFCOUNTER0_SELECT1",
9020    "name": "CB_PERFCOUNTER1_SELECT",
9026    "name": "CB_PERFCOUNTER2_SELECT",
9032    "name": "CB_PERFCOUNTER3_SELECT",
9038    "name": "DB_PERFCOUNTER0_SELECT",
9044    "name": "DB_PERFCOUNTER0_SELECT1",
9050    "name": "DB_PERFCOUNTER1_SELECT",
9056    "name": "DB_PERFCOUNTER1_SELECT1",
9062    "name": "DB_PERFCOUNTER2_SELECT",
9068    "name": "DB_PERFCOUNTER3_SELECT",
9074    "name": "RLC_SPM_PERFMON_CNTL",
9080    "name": "RLC_SPM_PERFMON_RING_BASE_LO"
9085    "name": "RLC_SPM_PERFMON_RING_BASE_HI",
9091    "name": "RLC_SPM_PERFMON_RING_SIZE"
9096    "name": "RLC_SPM_PERFMON_SEGMENT_SIZE",
9102    "name": "RLC_SPM_SE_MUXSEL_ADDR"
9107    "name": "RLC_SPM_SE_MUXSEL_DATA"
9112    "name": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY",
9118    "name": "RLC_SPM_CPC_PERFMON_SAMPLE_DELAY",
9124    "name": "RLC_SPM_CPF_PERFMON_SAMPLE_DELAY",
9130    "name": "RLC_SPM_CB_PERFMON_SAMPLE_DELAY",
9136    "name": "RLC_SPM_DB_PERFMON_SAMPLE_DELAY",
9142    "name": "RLC_SPM_PA_PERFMON_SAMPLE_DELAY",
9148    "name": "RLC_SPM_GDS_PERFMON_SAMPLE_DELAY",
9154    "name": "RLC_SPM_IA_PERFMON_SAMPLE_DELAY",
9160    "name": "RLC_SPM_SC_PERFMON_SAMPLE_DELAY",
9166    "name": "RLC_SPM_TCC_PERFMON_SAMPLE_DELAY",
9172    "name": "RLC_SPM_TCA_PERFMON_SAMPLE_DELAY",
9178    "name": "RLC_SPM_TCP_PERFMON_SAMPLE_DELAY",
9184    "name": "RLC_SPM_TA_PERFMON_SAMPLE_DELAY",
9190    "name": "RLC_SPM_TD_PERFMON_SAMPLE_DELAY",
9196    "name": "RLC_SPM_VGT_PERFMON_SAMPLE_DELAY",
9202    "name": "RLC_SPM_SPI_PERFMON_SAMPLE_DELAY",
9208    "name": "RLC_SPM_SQG_PERFMON_SAMPLE_DELAY",
9214    "name": "RLC_SPM_SX_PERFMON_SAMPLE_DELAY",
9220    "name": "RLC_SPM_GLOBAL_MUXSEL_ADDR"
9225    "name": "RLC_SPM_GLOBAL_MUXSEL_DATA"
9230    "name": "RLC_SPM_RING_RDPTR"
9235    "name": "RLC_SPM_SEGMENT_THRESHOLD"
9240    "name": "RLC_SPM_DBR0_PERFMON_SAMPLE_DELAY",
9246    "name": "RLC_SPM_DBR1_PERFMON_SAMPLE_DELAY",
9252    "name": "RLC_SPM_CBR0_PERFMON_SAMPLE_DELAY",
9258    "name": "RLC_SPM_CBR1_PERFMON_SAMPLE_DELAY",
9264    "name": "RLC_PERFMON_CLK_CNTL",
9270    "name": "RLC_PERFMON_CNTL",
9276    "name": "RLC_PERFCOUNTER0_SELECT",
9282    "name": "RLC_PERFCOUNTER1_SELECT",
9289     {"bits": [0, 4], "enum_ref": "BlendOp", "name": "COLOR_SRCBLEND"},
9290     {"bits": [5, 7], "enum_ref": "CombFunc", "name": "COLOR_COMB_FCN"},
9291     {"bits": [8, 12], "enum_ref": "BlendOp", "name": "COLOR_DESTBLEND"},
9292     {"bits": [16, 20], "enum_ref": "BlendOp", "name": "ALPHA_SRCBLEND"},
9293     {"bits": [21, 23], "enum_ref": "CombFunc", "name": "ALPHA_COMB_FCN"},
9294     {"bits": [24, 28], "enum_ref": "BlendOp", "name": "ALPHA_DESTBLEND"},
9295     {"bits": [29, 29], "name": "SEPARATE_ALPHA_BLEND"},
9296     {"bits": [30, 30], "name": "ENABLE"},
9297     {"bits": [31, 31], "name": "DISABLE_ROP3"}
9302     {"bits": [0, 4], "name": "TILE_MODE_INDEX"},
9303     {"bits": [5, 9], "name": "FMASK_TILE_MODE_INDEX"},
9304     {"bits": [10, 11], "name": "FMASK_BANK_HEIGHT"},
9305     {"bits": [12, 14], "name": "NUM_SAMPLES"},
9306     {"bits": [15, 16], "name": "NUM_FRAGMENTS"},
9307     {"bits": [17, 17], "name": "FORCE_DST_ALPHA_1"}
9312     {"bits": [0, 13], "name": "TILE_MAX"}
9317     {"bits": [0, 0], "name": "OVERWRITE_COMBINER_DISABLE"},
9318     {"bits": [1, 1], "name": "KEY_CLEAR_ENABLE"},
9319     {"bits": [2, 3], "enum_ref": "CB_COLOR_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE", "name": "MAX_UNCOMPRESSED_BLOCK_SIZE"},
9320     {"bits": [4, 4], "enum_ref": "CB_COLOR_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE", "name": "MIN_COMPRESSED_BLOCK_SIZE"},
9321     {"bits": [5, 6], "name": "MAX_COMPRESSED_BLOCK_SIZE"},
9322     {"bits": [7, 8], "name": "COLOR_TRANSFORM"},
9323     {"bits": [9, 9], "name": "INDEPENDENT_64B_BLOCKS"},
9324     {"bits": [10, 13], "name": "LOSSY_RGB_PRECISION"},
9325     {"bits": [14, 17], "name": "LOSSY_ALPHA_PRECISION"}
9330     {"bits": [0, 1], "enum_ref": "SurfaceEndian", "name": "ENDIAN"},
9331     {"bits": [2, 6], "enum_ref": "ColorFormat", "name": "FORMAT"},
9332     {"bits": [7, 7], "name": "LINEAR_GENERAL"},
9333     {"bits": [8, 10], "enum_ref": "SurfaceNumber", "name": "NUMBER_TYPE"},
9334     {"bits": [11, 12], "enum_ref": "SurfaceSwap", "name": "COMP_SWAP"},
9335     {"bits": [13, 13], "name": "FAST_CLEAR"},
9336     {"bits": [14, 14], "name": "COMPRESSION"},
9337     {"bits": [15, 15], "name": "BLEND_CLAMP"},
9338     {"bits": [16, 16], "name": "BLEND_BYPASS"},
9339     {"bits": [17, 17], "name": "SIMPLE_FLOAT"},
9340     {"bits": [18, 18], "name": "ROUND_MODE"},
9341     {"bits": [19, 19], "name": "CMASK_IS_LINEAR"},
9342     {"bits": [20, 22], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DONT_RD_DST"},
9343     {"bits": [23, 25], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DISCARD_PIXEL"},
9344     {"bits": [26, 26], "name": "FMASK_COMPRESSION_DISABLE"},
9345     {"bits": [27, 27], "name": "FMASK_COMPRESS_1FRAG_ONLY"},
9346     {"bits": [28, 28], "name": "DCC_ENABLE"},
9347     {"bits": [29, 30], "enum_ref": "CmaskAddr", "name": "CMASK_ADDR_TYPE"}
9352     {"bits": [0, 10], "name": "TILE_MAX"},
9353     {"bits": [20, 30], "name": "FMASK_TILE_MAX"}
9358     {"bits": [0, 21], "name": "TILE_MAX"}
9363     {"bits": [0, 10], "name": "SLICE_START"},
9364     {"bits": [13, 23], "name": "SLICE_MAX"}
9369     {"bits": [3, 3], "name": "DEGAMMA_ENABLE"},
9370     {"bits": [4, 6], "enum_ref": "CBMode", "name": "MODE"},
9371     {"bits": [16, 23], "enum_ref": "ROP3", "name": "ROP3"}
9376     {"bits": [0, 0], "name": "OVERWRITE_COMBINER_DISABLE"},
9377     {"bits": [1, 1], "name": "OVERWRITE_COMBINER_MRT_SHARING_DISABLE"},
9378     {"bits": [2, 6], "name": "OVERWRITE_COMBINER_WATERMARK"}
9383     {"bits": [0, 8], "name": "PERF_SEL"},
9384     {"bits": [10, 18], "name": "PERF_SEL1"},
9385     {"bits": [20, 23], "name": "CNTR_MODE"},
9386     {"bits": [24, 27], "name": "PERF_MODE1"},
9387     {"bits": [28, 31], "name": "PERF_MODE"}
9392     {"bits": [0, 8], "name": "PERF_SEL2"},
9393     {"bits": [10, 18], "name": "PERF_SEL3"},
9394     {"bits": [24, 27], "name": "PERF_MODE3"},
9395     {"bits": [28, 31], "name": "PERF_MODE2"}
9400     {"bits": [0, 8], "name": "PERF_SEL"},
9401     {"bits": [28, 31], "name": "PERF_MODE"}
9406     {"bits": [0, 0], "name": "OP_FILTER_ENABLE"},
9407     {"bits": [1, 3], "enum_ref": "CBPerfOpFilterSel", "name": "OP_FILTER_SEL"},
9408     {"bits": [4, 4], "name": "FORMAT_FILTER_ENABLE"},
9409     {"bits": [5, 9], "name": "FORMAT_FILTER_SEL"},
9410     {"bits": [10, 10], "name": "CLEAR_FILTER_ENABLE"},
9411     {"bits": [11, 11], "enum_ref": "CBPerfClearFilterSel", "name": "CLEAR_FILTER_SEL"},
9412     {"bits": [12, 12], "name": "MRT_FILTER_ENABLE"},
9413     {"bits": [13, 15], "name": "MRT_FILTER_SEL"},
9414     {"bits": [17, 17], "name": "NUM_SAMPLES_FILTER_ENABLE"},
9415     {"bits": [18, 20], "name": "NUM_SAMPLES_FILTER_SEL"},
9416     {"bits": [21, 21], "name": "NUM_FRAGMENTS_FILTER_ENABLE"},
9417     {"bits": [22, 23], "name": "NUM_FRAGMENTS_FILTER_SEL"}
9422     {"bits": [0, 3], "name": "OUTPUT0_ENABLE"},
9423     {"bits": [4, 7], "name": "OUTPUT1_ENABLE"},
9424     {"bits": [8, 11], "name": "OUTPUT2_ENABLE"},
9425     {"bits": [12, 15], "name": "OUTPUT3_ENABLE"},
9426     {"bits": [16, 19], "name": "OUTPUT4_ENABLE"},
9427     {"bits": [20, 23], "name": "OUTPUT5_ENABLE"},
9428     {"bits": [24, 27], "name": "OUTPUT6_ENABLE"},
9429     {"bits": [28, 31], "name": "OUTPUT7_ENABLE"}
9434     {"bits": [0, 3], "name": "TARGET0_ENABLE"},
9435     {"bits": [4, 7], "name": "TARGET1_ENABLE"},
9436     {"bits": [8, 11], "name": "TARGET2_ENABLE"},
9437     {"bits": [12, 15], "name": "TARGET3_ENABLE"},
9438     {"bits": [16, 19], "name": "TARGET4_ENABLE"},
9439     {"bits": [20, 23], "name": "TARGET5_ENABLE"},
9440     {"bits": [24, 27], "name": "TARGET6_ENABLE"},
9441     {"bits": [28, 31], "name": "TARGET7_ENABLE"}
9446     {"bits": [0, 0], "name": "COMPUTE_SHADER_EN"},
9447     {"bits": [1, 1], "name": "PARTIAL_TG_EN"},
9448     {"bits": [2, 2], "name": "FORCE_START_AT_000"},
9449     {"bits": [3, 3], "name": "ORDERED_APPEND_ENBL"},
9450     {"bits": [4, 4], "name": "ORDERED_APPEND_MODE"},
9451     {"bits": [5, 5], "name": "USE_THREAD_DIMENSIONS"},
9452     {"bits": [6, 6], "name": "ORDER_MODE"},
9453     {"bits": [7, 9], "name": "DISPATCH_CACHE_CNTL"},
9454     {"bits": [10, 10], "name": "SCALAR_L1_INV_VOL"},
9455     {"bits": [11, 11], "name": "VECTOR_L1_INV_VOL"},
9456     {"bits": [12, 12], "name": "DATA_ATC"},
9457     {"bits": [14, 14], "name": "RESTORE"}
9462     {"bits": [0, 1], "name": "SEND_SEID"},
9463     {"bits": [2, 2], "name": "RESERVED2"},
9464     {"bits": [3, 3], "name": "RESERVED3"},
9465     {"bits": [4, 4], "name": "RESERVED4"},
9466     {"bits": [5, 16], "name": "WAVE_ID_BASE"}
9471     {"bits": [0, 15], "name": "NUM_THREAD_FULL"},
9472     {"bits": [16, 31], "name": "NUM_THREAD_PARTIAL"}
9477     {"bits": [0, 0], "name": "PERFCOUNT_ENABLE"}
9482     {"bits": [0, 7], "name": "DATA"},
9483     {"bits": [8, 8], "name": "INST_ATC"}
9488     {"bits": [0, 5], "name": "VGPRS"},
9489     {"bits": [6, 9], "name": "SGPRS"},
9490     {"bits": [10, 11], "name": "PRIORITY"},
9491     {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
9492     {"bits": [20, 20], "name": "PRIV"},
9493     {"bits": [21, 21], "name": "DX10_CLAMP"},
9494     {"bits": [22, 22], "name": "DEBUG_MODE"},
9495     {"bits": [23, 23], "name": "IEEE_MODE"},
9496     {"bits": [24, 24], "name": "BULKY"},
9497     {"bits": [25, 25], "name": "CDBG_USER"}
9502     {"bits": [0, 0], "name": "SCRATCH_EN"},
9503     {"bits": [1, 5], "name": "USER_SGPR"},
9504     {"bits": [6, 6], "name": "TRAP_PRESENT"},
9505     {"bits": [7, 7], "name": "TGID_X_EN"},
9506     {"bits": [8, 8], "name": "TGID_Y_EN"},
9507     {"bits": [9, 9], "name": "TGID_Z_EN"},
9508     {"bits": [10, 10], "name": "TG_SIZE_EN"},
9509     {"bits": [11, 12], "name": "TIDIG_COMP_CNT"},
9510     {"bits": [13, 14], "name": "EXCP_EN_MSB"},
9511     {"bits": [15, 23], "name": "LDS_SIZE"},
9512     {"bits": [24, 30], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
9517     {"bits": [0, 0], "name": "PIPELINESTAT_ENABLE"}
9522     {"bits": [0, 29], "name": "PAYLOAD"},
9523     {"bits": [30, 30], "name": "IS_EVENT"},
9524     {"bits": [31, 31], "name": "IS_STATE"}
9529     {"bits": [0, 9], "name": "WAVES_PER_SH"},
9530     {"bits": [12, 15], "name": "TG_PER_CU"},
9531     {"bits": [16, 21], "name": "LOCK_THRESHOLD"},
9532     {"bits": [22, 22], "name": "SIMD_DEST_CNTL"},
9533     {"bits": [23, 23], "name": "FORCE_SIMD_DIST"},
9534     {"bits": [24, 26], "name": "CU_GROUP_COUNT"}
9539     {"bits": [0, 15], "name": "SH0_CU_EN"},
9540     {"bits": [16, 31], "name": "SH1_CU_EN"}
9545     {"bits": [0, 7], "name": "DATA"}
9550     {"bits": [0, 0], "name": "THREAD_TRACE_ENABLE"}
9555     {"bits": [0, 11], "name": "WAVES"},
9556     {"bits": [12, 24], "name": "WAVESIZE"}
9561     {"bits": [0, 3], "name": "DATA"}
9566     {"bits": [0, 15], "name": "ADDR"}
9571     {"bits": [0, 0], "name": "ATC"},
9572     {"bits": [1, 2], "name": "MTYPE"}
9577     {"bits": [0, 5], "name": "PERF_SEL"},
9578     {"bits": [10, 15], "name": "PERF_SEL1"},
9579     {"bits": [20, 23], "name": "CNTR_MODE"}
9584     {"bits": [0, 5], "name": "PERF_SEL2"},
9585     {"bits": [10, 15], "name": "PERF_SEL3"}
9590     {"bits": [0, 5], "name": "PERF_SEL"}
9595     {"bits": [0, 15], "name": "MEM_ADDR_HI"},
9596     {"bits": [16, 16], "name": "CS_PS_SEL"},
9597     {"bits": [25, 25], "name": "CACHE_POLICY"},
9598     {"bits": [27, 28], "name": "MTYPE"},
9599     {"bits": [29, 31], "name": "COMMAND"}
9604     {"bits": [2, 31], "name": "MEM_ADDR_LO"}
9609     {"bits": [0, 15], "name": "IB1_BASE_HI"}
9614     {"bits": [2, 31], "name": "IB1_BASE_LO"}
9619     {"bits": [0, 19], "name": "IB1_BUFSZ"}
9624     {"bits": [0, 15], "name": "IB2_BASE_HI"}
9629     {"bits": [2, 31], "name": "IB2_BASE_LO"}
9634     {"bits": [0, 19], "name": "IB2_BUFSZ"}
9639     {"bits": [0, 15], "name": "INIT_BASE_HI"}
9644     {"bits": [5, 31], "name": "INIT_BASE_LO"}
9649     {"bits": [0, 11], "name": "INIT_BUFSZ"}
9654     {"bits": [0, 7], "name": "COHER_BASE_HI_256B"}
9659     {"bits": [0, 0], "name": "DEST_BASE_0_ENA"},
9660     {"bits": [1, 1], "name": "DEST_BASE_1_ENA"},
9661     {"bits": [2, 2], "name": "TC_SD_ACTION_ENA"},
9662     {"bits": [3, 3], "name": "TC_NC_ACTION_ENA"},
9663     {"bits": [6, 6], "name": "CB0_DEST_BASE_ENA"},
9664     {"bits": [7, 7], "name": "CB1_DEST_BASE_ENA"},
9665     {"bits": [8, 8], "name": "CB2_DEST_BASE_ENA"},
9666     {"bits": [9, 9], "name": "CB3_DEST_BASE_ENA"},
9667     {"bits": [10, 10], "name": "CB4_DEST_BASE_ENA"},
9668     {"bits": [11, 11], "name": "CB5_DEST_BASE_ENA"},
9669     {"bits": [12, 12], "name": "CB6_DEST_BASE_ENA"},
9670     {"bits": [13, 13], "name": "CB7_DEST_BASE_ENA"},
9671     {"bits": [14, 14], "name": "DB_DEST_BASE_ENA"},
9672     {"bits": [15, 15], "name": "TCL1_VOL_ACTION_ENA"},
9673     {"bits": [18, 18], "name": "TC_WB_ACTION_ENA"},
9674     {"bits": [19, 19], "name": "DEST_BASE_2_ENA"},
9675     {"bits": [21, 21], "name": "DEST_BASE_3_ENA"},
9676     {"bits": [22, 22], "name": "TCL1_ACTION_ENA"},
9677     {"bits": [23, 23], "name": "TC_ACTION_ENA"},
9678     {"bits": [25, 25], "name": "CB_ACTION_ENA"},
9679     {"bits": [26, 26], "name": "DB_ACTION_ENA"},
9680     {"bits": [27, 27], "name": "SH_KCACHE_ACTION_ENA"},
9681     {"bits": [28, 28], "name": "SH_KCACHE_VOL_ACTION_ENA"},
9682     {"bits": [29, 29], "name": "SH_ICACHE_ACTION_ENA"},
9683     {"bits": [30, 30], "name": "SH_KCACHE_WB_ACTION_ENA"},
9684     {"bits": [31, 31], "name": "SH_SD_ACTION_ENA"}
9689     {"bits": [0, 7], "name": "COHER_SIZE_HI_256B"}
9694     {"bits": [0, 5], "name": "START_DELAY_COUNT"}
9699     {"bits": [0, 7], "name": "MATCHING_GFX_CNTX"},
9700     {"bits": [24, 25], "name": "MEID"},
9701     {"bits": [30, 30], "name": "PHASE1_STATUS"},
9702     {"bits": [31, 31], "name": "STATUS"}
9707     {"bits": [0, 0], "name": "MEC1_LOAD_BUSY"},
9708     {"bits": [1, 1], "name": "MEC1_SEMAPOHRE_BUSY"},
9709     {"bits": [2, 2], "name": "MEC1_MUTEX_BUSY"},
9710     {"bits": [3, 3], "name": "MEC1_MESSAGE_BUSY"},
9711     {"bits": [4, 4], "name": "MEC1_EOP_QUEUE_BUSY"},
9712     {"bits": [5, 5], "name": "MEC1_IQ_QUEUE_BUSY"},
9713     {"bits": [6, 6], "name": "MEC1_IB_QUEUE_BUSY"},
9714     {"bits": [7, 7], "name": "MEC1_TC_BUSY"},
9715     {"bits": [8, 8], "name": "MEC1_DMA_BUSY"},
9716     {"bits": [9, 9], "name": "MEC1_PARTIAL_FLUSH_BUSY"},
9717     {"bits": [10, 10], "name": "MEC1_PIPE0_BUSY"},
9718     {"bits": [11, 11], "name": "MEC1_PIPE1_BUSY"},
9719     {"bits": [12, 12], "name": "MEC1_PIPE2_BUSY"},
9720     {"bits": [13, 13], "name": "MEC1_PIPE3_BUSY"},
9721     {"bits": [16, 16], "name": "MEC2_LOAD_BUSY"},
9722     {"bits": [17, 17], "name": "MEC2_SEMAPOHRE_BUSY"},
9723     {"bits": [18, 18], "name": "MEC2_MUTEX_BUSY"},
9724     {"bits": [19, 19], "name": "MEC2_MESSAGE_BUSY"},
9725     {"bits": [20, 20], "name": "MEC2_EOP_QUEUE_BUSY"},
9726     {"bits": [21, 21], "name": "MEC2_IQ_QUEUE_BUSY"},
9727     {"bits": [22, 22], "name": "MEC2_IB_QUEUE_BUSY"},
9728     {"bits": [23, 23], "name": "MEC2_TC_BUSY"},
9729     {"bits": [24, 24], "name": "MEC2_DMA_BUSY"},
9730     {"bits": [25, 25], "name": "MEC2_PARTIAL_FLUSH_BUSY"},
9731     {"bits": [26, 26], "name": "MEC2_PIPE0_BUSY"},
9732     {"bits": [27, 27], "name": "MEC2_PIPE1_BUSY"},
9733     {"bits": [28, 28], "name": "MEC2_PIPE2_BUSY"},
9734     {"bits": [29, 29], "name": "MEC2_PIPE3_BUSY"}
9739     {"bits": [0, 5], "name": "FREE_COUNT"}
9744     {"bits": [0, 3], "name": "COUNT"}
9749     {"bits": [0, 8], "name": "SCRATCH_INDEX"}
9754     {"bits": [3, 3], "name": "RCIU_TX_FREE_STALL"},
9755     {"bits": [4, 4], "name": "RCIU_PRIV_VIOLATION"},
9756     {"bits": [6, 6], "name": "TCIU_TX_FREE_STALL"},
9757     {"bits": [8, 8], "name": "MEC1_DECODING_PACKET"},
9758     {"bits": [9, 9], "name": "MEC1_WAIT_ON_RCIU"},
9759     {"bits": [10, 10], "name": "MEC1_WAIT_ON_RCIU_READ"},
9760     {"bits": [13, 13], "name": "MEC1_WAIT_ON_ROQ_DATA"},
9761     {"bits": [16, 16], "name": "MEC2_DECODING_PACKET"},
9762     {"bits": [17, 17], "name": "MEC2_WAIT_ON_RCIU"},
9763     {"bits": [18, 18], "name": "MEC2_WAIT_ON_RCIU_READ"},
9764     {"bits": [21, 21], "name": "MEC2_WAIT_ON_ROQ_DATA"},
9765     {"bits": [22, 22], "name": "ATCL2IU_WAITING_ON_FREE"},
9766     {"bits": [23, 23], "name": "ATCL2IU_WAITING_ON_TAGS"},
9767     {"bits": [24, 24], "name": "ATCL1_WAITING_ON_TRANS"}
9772     {"bits": [0, 0], "name": "MEC1_BUSY"},
9773     {"bits": [1, 1], "name": "MEC2_BUSY"},
9774     {"bits": [2, 2], "name": "DC0_BUSY"},
9775     {"bits": [3, 3], "name": "DC1_BUSY"},
9776     {"bits": [4, 4], "name": "RCIU1_BUSY"},
9777     {"bits": [5, 5], "name": "RCIU2_BUSY"},
9778     {"bits": [6, 6], "name": "ROQ1_BUSY"},
9779     {"bits": [7, 7], "name": "ROQ2_BUSY"},
9780     {"bits": [10, 10], "name": "TCIU_BUSY"},
9781     {"bits": [11, 11], "name": "SCRATCH_RAM_BUSY"},
9782     {"bits": [12, 12], "name": "QU_BUSY"},
9783     {"bits": [13, 13], "name": "ATCL2IU_BUSY"},
9784     {"bits": [29, 29], "name": "CPG_CPC_BUSY"},
9785     {"bits": [30, 30], "name": "CPF_CPC_BUSY"},
9786     {"bits": [31, 31], "name": "CPC_BUSY"}
9791     {"bits": [0, 0], "name": "REG_BUS_FIFO_BUSY"},
9792     {"bits": [1, 1], "name": "CSF_RING_BUSY"},
9793     {"bits": [2, 2], "name": "CSF_INDIRECT1_BUSY"},
9794     {"bits": [3, 3], "name": "CSF_INDIRECT2_BUSY"},
9795     {"bits": [4, 4], "name": "CSF_STATE_BUSY"},
9796     {"bits": [5, 5], "name": "CSF_CE_INDR1_BUSY"},
9797     {"bits": [6, 6], "name": "CSF_CE_INDR2_BUSY"},
9798     {"bits": [7, 7], "name": "CSF_ARBITER_BUSY"},
9799     {"bits": [8, 8], "name": "CSF_INPUT_BUSY"},
9800     {"bits": [9, 9], "name": "OUTSTANDING_READ_TAGS"},
9801     {"bits": [11, 11], "name": "HPD_PROCESSING_EOP_BUSY"},
9802     {"bits": [12, 12], "name": "HQD_DISPATCH_BUSY"},
9803     {"bits": [13, 13], "name": "HQD_IQ_TIMER_BUSY"},
9804     {"bits": [14, 14], "name": "HQD_DMA_OFFLOAD_BUSY"},
9805     {"bits": [15, 15], "name": "HQD_WAIT_SEMAPHORE_BUSY"},
9806     {"bits": [16, 16], "name": "HQD_SIGNAL_SEMAPHORE_BUSY"},
9807     {"bits": [17, 17], "name": "HQD_MESSAGE_BUSY"},
9808     {"bits": [18, 18], "name": "HQD_PQ_FETCHER_BUSY"},
9809     {"bits": [19, 19], "name": "HQD_IB_FETCHER_BUSY"},
9810     {"bits": [20, 20], "name": "HQD_IQ_FETCHER_BUSY"},
9811     {"bits": [21, 21], "name": "HQD_EOP_FETCHER_BUSY"},
9812     {"bits": [22, 22], "name": "HQD_CONSUMED_RPTR_BUSY"},
9813     {"bits": [23, 23], "name": "HQD_FETCHER_ARB_BUSY"},
9814     {"bits": [24, 24], "name": "HQD_ROQ_ALIGN_BUSY"},
9815     {"bits": [25, 25], "name": "HQD_ROQ_EOP_BUSY"},
9816     {"bits": [26, 26], "name": "HQD_ROQ_IQ_BUSY"},
9817     {"bits": [27, 27], "name": "HQD_ROQ_PQ_BUSY"},
9818     {"bits": [28, 28], "name": "HQD_ROQ_IB_BUSY"},
9819     {"bits": [29, 29], "name": "HQD_WPTR_POLL_BUSY"},
9820     {"bits": [30, 30], "name": "HQD_PQ_BUSY"},
9821     {"bits": [31, 31], "name": "HQD_IB_BUSY"}
9826     {"bits": [0, 0], "name": "RING_FETCHING_DATA"},
9827     {"bits": [1, 1], "name": "INDR1_FETCHING_DATA"},
9828     {"bits": [2, 2], "name": "INDR2_FETCHING_DATA"},
9829     {"bits": [3, 3], "name": "STATE_FETCHING_DATA"},
9830     {"bits": [5, 5], "name": "TCIU_WAITING_ON_FREE"},
9831     {"bits": [6, 6], "name": "TCIU_WAITING_ON_TAGS"},
9832     {"bits": [7, 7], "name": "ATCL2IU_WAITING_ON_FREE"},
9833     {"bits": [8, 8], "name": "ATCL2IU_WAITING_ON_TAGS"},
9834     {"bits": [9, 9], "name": "ATCL1_WAITING_ON_TRANS"}
9839     {"bits": [0, 0], "name": "POST_WPTR_GFX_BUSY"},
9840     {"bits": [1, 1], "name": "CSF_BUSY"},
9841     {"bits": [4, 4], "name": "ROQ_ALIGN_BUSY"},
9842     {"bits": [5, 5], "name": "ROQ_RING_BUSY"},
9843     {"bits": [6, 6], "name": "ROQ_INDIRECT1_BUSY"},
9844     {"bits": [7, 7], "name": "ROQ_INDIRECT2_BUSY"},
9845     {"bits": [8, 8], "name": "ROQ_STATE_BUSY"},
9846     {"bits": [9, 9], "name": "ROQ_CE_RING_BUSY"},
9847     {"bits": [10, 10], "name": "ROQ_CE_INDIRECT1_BUSY"},
9848     {"bits": [11, 11], "name": "ROQ_CE_INDIRECT2_BUSY"},
9849     {"bits": [12, 12], "name": "SEMAPHORE_BUSY"},
9850     {"bits": [13, 13], "name": "INTERRUPT_BUSY"},
9851     {"bits": [14, 14], "name": "TCIU_BUSY"},
9852     {"bits": [15, 15], "name": "HQD_BUSY"},
9853     {"bits": [16, 16], "name": "PRT_BUSY"},
9854     {"bits": [17, 17], "name": "ATCL2IU_BUSY"},
9855     {"bits": [26, 26], "name": "CPF_GFX_BUSY"},
9856     {"bits": [27, 27], "name": "CPF_CMP_BUSY"},
9857     {"bits": [28, 29], "name": "GRBM_CPF_STAT_BUSY"},
9858     {"bits": [30, 30], "name": "CPC_CPF_BUSY"},
9859     {"bits": [31, 31], "name": "CPF_BUSY"}
9864     {"bits": [4, 5], "name": "MIN_AVAILSZ"},
9865     {"bits": [16, 19], "name": "BUFFER_DEPTH"},
9866     {"bits": [28, 28], "name": "PIO_FIFO_EMPTY"},
9867     {"bits": [29, 29], "name": "PIO_FIFO_FULL"},
9868     {"bits": [30, 31], "name": "PIO_COUNT"}
9873     {"bits": [0, 20], "name": "BYTE_COUNT"},
9874     {"bits": [21, 21], "name": "DIS_WC"},
9875     {"bits": [22, 23], "name": "SRC_SWAP"},
9876     {"bits": [24, 25], "name": "DST_SWAP"},
9877     {"bits": [26, 26], "name": "SAS"},
9878     {"bits": [27, 27], "name": "DAS"},
9879     {"bits": [28, 28], "name": "SAIC"},
9880     {"bits": [29, 29], "name": "DAIC"},
9881     {"bits": [30, 30], "name": "RAW_WAIT"}
9886     {"bits": [10, 11], "name": "SRC_MTYPE"},
9887     {"bits": [12, 12], "name": "SRC_ATC"},
9888     {"bits": [13, 13], "name": "SRC_CACHE_POLICY"},
9889     {"bits": [20, 21], "name": "DST_SELECT"},
9890     {"bits": [22, 23], "name": "DST_MTYPE"},
9891     {"bits": [24, 24], "name": "DST_ATC"},
9892     {"bits": [25, 25], "name": "DST_CACHE_POLICY"},
9893     {"bits": [29, 30], "name": "SRC_SELECT"}
9898     {"bits": [0, 15], "name": "DST_ADDR_HI"}
9903     {"bits": [0, 15], "name": "SRC_ADDR_HI"}
9908     {"bits": [0, 25], "name": "DMA_READ_TAG"},
9909     {"bits": [28, 28], "name": "DMA_READ_TAG_VALID"}
9914     {"bits": [0, 15], "name": "COUNT"}
9919     {"bits": [0, 0], "name": "DISABLE_DRAW_WINDOW_LO_MAX"},
9920     {"bits": [1, 1], "name": "DISABLE_DRAW_WINDOW_LO_MIN"},
9921     {"bits": [2, 2], "name": "DISABLE_DRAW_WINDOW_HI"},
9922     {"bits": [8, 8], "name": "MODE"}
9927     {"bits": [0, 15], "name": "MIN"},
9928     {"bits": [16, 31], "name": "MAX"}
9933     {"bits": [0, 15], "name": "ADDR_HI"}
9938     {"bits": [2, 31], "name": "ADDR_LO"}
9943     {"bits": [0, 27], "name": "CNTX_ID"}
9948     {"bits": [0, 15], "name": "CNTX_ID"},
9949     {"bits": [16, 17], "name": "DST_SEL"},
9950     {"bits": [24, 26], "name": "INT_SEL"},
9951     {"bits": [29, 31], "name": "DATA_SEL"}
9956     {"bits": [0, 6], "name": "WBINV_TC_OP"},
9957     {"bits": [12, 17], "name": "WBINV_ACTION_ENA"},
9958     {"bits": [25, 25], "name": "CACHE_CONTROL"},
9959     {"bits": [27, 28], "name": "MTYPE"}
9964     {"bits": [0, 19], "name": "IB1_OFFSET"}
9969     {"bits": [0, 19], "name": "IB1_PREAMBLE_BEGIN"}
9974     {"bits": [0, 19], "name": "IB1_PREAMBLE_END"}
9979     {"bits": [0, 19], "name": "IB2_OFFSET"}
9984     {"bits": [0, 19], "name": "IB2_PREAMBLE_BEGIN"}
9989     {"bits": [0, 19], "name": "IB2_PREAMBLE_END"}
9994     {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"}
9999     {"bits": [0, 15], "name": "ME_MC_RADDR_HI"},
10000     {"bits": [20, 21], "name": "MTYPE"},
10001     {"bits": [22, 22], "name": "CACHE_POLICY"}
10006     {"bits": [0, 1], "name": "ME_MC_RADDR_SWAP"},
10007     {"bits": [2, 31], "name": "ME_MC_RADDR_LO"}
10012     {"bits": [0, 15], "name": "ME_MC_WADDR_HI"},
10013     {"bits": [20, 21], "name": "MTYPE"},
10014     {"bits": [22, 22], "name": "CACHE_POLICY"}
10019     {"bits": [0, 1], "name": "ME_MC_WADDR_SWAP"},
10020     {"bits": [2, 31], "name": "ME_MC_WADDR_LO"}
10025     {"bits": [0, 3], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"},
10026     {"bits": [4, 7], "enum_ref": "SPM_PERFMON_STATE", "name": "SPM_PERFMON_STATE"},
10027     {"bits": [8, 9], "enum_ref": "CP_PERFMON_ENABLE_MODE", "name": "PERFMON_ENABLE_MODE"},
10028     {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"}
10033     {"bits": [31, 31], "name": "PERFMON_ENABLE"}
10038     {"bits": [0, 1], "name": "STATUS"}
10043     {"bits": [0, 7], "name": "IB_EN"}
10048     {"bits": [0, 0], "name": "CONFIG_REG_EN"},
10049     {"bits": [1, 1], "name": "CNTX_REG_EN"},
10050     {"bits": [16, 16], "name": "SH_GFX_REG_EN"},
10051     {"bits": [24, 24], "name": "SH_CS_REG_EN"}
10056     {"bits": [0, 15], "name": "PIPE_STATS_ADDR_HI"}
10061     {"bits": [2, 31], "name": "PIPE_STATS_ADDR_LO"}
10066     {"bits": [25, 25], "name": "CACHE_CONTROL"},
10067     {"bits": [27, 28], "name": "MTYPE"}
10072     {"bits": [0, 0], "name": "NOT_VISIBLE"}
10077     {"bits": [0, 19], "name": "RB_OFFSET"}
10082     {"bits": [0, 1], "name": "RINGID"}
10087     {"bits": [0, 0], "name": "Z_PASS_ACITVE"},
10088     {"bits": [1, 1], "name": "STREAMOUT_ACTIVE"},
10089     {"bits": [2, 2], "name": "PIPELINE_ACTIVE"},
10090     {"bits": [3, 3], "name": "STIPPLE_ACTIVE"},
10091     {"bits": [4, 4], "name": "VGT_BUFFERS_ACTIVE"},
10092     {"bits": [5, 5], "name": "SCREEN_EXT_ACTIVE"},
10093     {"bits": [6, 6], "name": "DRAW_INDIRECT_ACTIVE"},
10094     {"bits": [7, 7], "name": "DISP_INDIRECT_ACTIVE"}
10099     {"bits": [0, 7], "name": "SCRATCH_INDEX"}
10104     {"bits": [0, 15], "name": "SEM_ADDR_HI"},
10105     {"bits": [16, 16], "name": "SEM_USE_MAILBOX"},
10106     {"bits": [20, 20], "name": "SEM_SIGNAL_TYPE"},
10107     {"bits": [24, 25], "name": "SEM_CLIENT_CODE"},
10108     {"bits": [29, 31], "name": "SEM_SELECT"}
10113     {"bits": [0, 1], "name": "SEM_ADDR_SWAP"},
10114     {"bits": [3, 31], "name": "SEM_ADDR_LO"}
10119     {"bits": [0, 15], "name": "STREAM_OUT_ADDR_HI"}
10124     {"bits": [2, 31], "name": "STREAM_OUT_ADDR_LO"}
10129     {"bits": [0, 0], "name": "OFFSET_UPDATE_DONE"}
10134     {"bits": [0, 15], "name": "ST_BASE_HI"}
10139     {"bits": [2, 31], "name": "ST_BASE_LO"}
10144     {"bits": [0, 19], "name": "ST_BUFSZ"}
10149     {"bits": [0, 3], "name": "VMID"}
10154     {"bits": [0, 2], "name": "SRC_STATE_ID"}
10159     {"bits": [0, 0], "name": "ALPHA_TO_MASK_ENABLE"},
10160     {"bits": [8, 9], "name": "ALPHA_TO_MASK_OFFSET0"},
10161     {"bits": [10, 11], "name": "ALPHA_TO_MASK_OFFSET1"},
10162     {"bits": [12, 13], "name": "ALPHA_TO_MASK_OFFSET2"},
10163     {"bits": [14, 15], "name": "ALPHA_TO_MASK_OFFSET3"},
10164     {"bits": [16, 16], "name": "OFFSET_ROUND"}
10169     {"bits": [0, 0], "name": "ZPASS_INCREMENT_DISABLE"},
10170     {"bits": [1, 1], "name": "PERFECT_ZPASS_COUNTS"},
10171     {"bits": [4, 6], "name": "SAMPLE_RATE"},
10172     {"bits": [8, 11], "name": "ZPASS_ENABLE"},
10173     {"bits": [12, 15], "name": "ZFAIL_ENABLE"},
10174     {"bits": [16, 19], "name": "SFAIL_ENABLE"},
10175     {"bits": [20, 23], "name": "DBFAIL_ENABLE"},
10176     {"bits": [24, 27], "name": "SLICE_EVEN_ENABLE"},
10177     {"bits": [28, 31], "name": "SLICE_ODD_ENABLE"}
10182     {"bits": [0, 0], "name": "STENCIL_ENABLE"},
10183     {"bits": [1, 1], "name": "Z_ENABLE"},
10184     {"bits": [2, 2], "name": "Z_WRITE_ENABLE"},
10185     {"bits": [3, 3], "name": "DEPTH_BOUNDS_ENABLE"},
10186     {"bits": [4, 6], "enum_ref": "CompareFrag", "name": "ZFUNC"},
10187     {"bits": [7, 7], "name": "BACKFACE_ENABLE"},
10188     {"bits": [8, 10], "enum_ref": "CompareFrag", "name": "STENCILFUNC"},
10189     {"bits": [20, 22], "enum_ref": "CompareFrag", "name": "STENCILFUNC_BF"},
10190     {"bits": [30, 30], "name": "ENABLE_COLOR_WRITES_ON_DEPTH_FAIL"},
10191     {"bits": [31, 31], "name": "DISABLE_COLOR_WRITES_ON_DEPTH_PASS"}
10196     {"bits": [0, 3], "name": "ADDR5_SWIZZLE_MASK"},
10197     {"bits": [4, 7], "enum_ref": "ArrayMode", "name": "ARRAY_MODE"},
10198     {"bits": [8, 12], "enum_ref": "PipeConfig", "name": "PIPE_CONFIG"},
10199     {"bits": [13, 14], "enum_ref": "BankWidth", "name": "BANK_WIDTH"},
10200     {"bits": [15, 16], "enum_ref": "BankHeight", "name": "BANK_HEIGHT"},
10201     {"bits": [17, 18], "enum_ref": "MacroTileAspect", "name": "MACRO_TILE_ASPECT"},
10202     {"bits": [19, 20], "enum_ref": "NumBanks", "name": "NUM_BANKS"}
10207     {"bits": [0, 10], "name": "PITCH_TILE_MAX"},
10208     {"bits": [11, 21], "name": "HEIGHT_TILE_MAX"}
10213     {"bits": [0, 21], "name": "SLICE_TILE_MAX"}
10218     {"bits": [0, 10], "name": "SLICE_START"},
10219     {"bits": [13, 23], "name": "SLICE_MAX"},
10220     {"bits": [24, 24], "name": "Z_READ_ONLY"},
10221     {"bits": [25, 25], "name": "STENCIL_READ_ONLY"}
10226     {"bits": [0, 2], "name": "MAX_ANCHOR_SAMPLES"},
10227     {"bits": [4, 6], "name": "PS_ITER_SAMPLES"},
10228     {"bits": [8, 10], "name": "MASK_EXPORT_NUM_SAMPLES"},
10229     {"bits": [12, 14], "name": "ALPHA_TO_MASK_NUM_SAMPLES"},
10230     {"bits": [16, 16], "name": "HIGH_QUALITY_INTERSECTIONS"},
10231     {"bits": [17, 17], "name": "INCOHERENT_EQAA_READS"},
10232     {"bits": [18, 18], "name": "INTERPOLATE_COMP_Z"},
10233     {"bits": [19, 19], "name": "INTERPOLATE_SRC_Z"},
10234     {"bits": [20, 20], "name": "STATIC_ANCHOR_ASSOCIATIONS"},
10235     {"bits": [21, 21], "name": "ALPHA_TO_MASK_EQAA_DISABLE"},
10236     {"bits": [24, 26], "name": "OVERRASTERIZATION_AMOUNT"},
10237     {"bits": [27, 27], "name": "ENABLE_POSTZ_OVERRASTERIZATION"}
10242     {"bits": [0, 0], "name": "LINEAR"},
10243     {"bits": [1, 1], "name": "FULL_CACHE"},
10244     {"bits": [2, 2], "name": "HTILE_USES_PRELOAD_WIN"},
10245     {"bits": [3, 3], "name": "PRELOAD"},
10246     {"bits": [4, 9], "name": "PREFETCH_WIDTH"},
10247     {"bits": [10, 15], "name": "PREFETCH_HEIGHT"},
10248     {"bits": [16, 16], "name": "DST_OUTSIDE_ZERO_TO_ONE"},
10249     {"bits": [17, 17], "name": "TC_COMPATIBLE"}
10254     {"bits": [0, 9], "name": "PERF_SEL"},
10255     {"bits": [10, 19], "name": "PERF_SEL1"},
10256     {"bits": [20, 23], "name": "CNTR_MODE"},
10257     {"bits": [24, 27], "name": "PERF_MODE1"},
10258     {"bits": [28, 31], "name": "PERF_MODE"}
10263     {"bits": [0, 9], "name": "PERF_SEL2"},
10264     {"bits": [10, 19], "name": "PERF_SEL3"},
10265     {"bits": [24, 27], "name": "PERF_MODE3"},
10266     {"bits": [28, 31], "name": "PERF_MODE2"}
10271     {"bits": [0, 7], "name": "START_X"},
10272     {"bits": [8, 15], "name": "START_Y"},
10273     {"bits": [16, 23], "name": "MAX_X"},
10274     {"bits": [24, 31], "name": "MAX_Y"}
10279     {"bits": [0, 0], "name": "DEPTH_CLEAR_ENABLE"},
10280     {"bits": [1, 1], "name": "STENCIL_CLEAR_ENABLE"},
10281     {"bits": [2, 2], "name": "DEPTH_COPY"},
10282     {"bits": [3, 3], "name": "STENCIL_COPY"},
10283     {"bits": [4, 4], "name": "RESUMMARIZE_ENABLE"},
10284     {"bits": [5, 5], "name": "STENCIL_COMPRESS_DISABLE"},
10285     {"bits": [6, 6], "name": "DEPTH_COMPRESS_DISABLE"},
10286     {"bits": [7, 7], "name": "COPY_CENTROID"},
10287     {"bits": [8, 11], "name": "COPY_SAMPLE"},
10288     {"bits": [12, 12], "name": "DECOMPRESS_ENABLE"}
10293     {"bits": [0, 1], "enum_ref": "ForceControl", "name": "FORCE_HIZ_ENABLE"},
10294     {"bits": [2, 3], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE0"},
10295     {"bits": [4, 5], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE1"},
10296     {"bits": [6, 6], "name": "FORCE_SHADER_Z_ORDER"},
10297     {"bits": [7, 7], "name": "FAST_Z_DISABLE"},
10298     {"bits": [8, 8], "name": "FAST_STENCIL_DISABLE"},
10299     {"bits": [9, 9], "name": "NOOP_CULL_DISABLE"},
10300     {"bits": [10, 10], "name": "FORCE_COLOR_KILL"},
10301     {"bits": [11, 11], "name": "FORCE_Z_READ"},
10302     {"bits": [12, 12], "name": "FORCE_STENCIL_READ"},
10303     {"bits": [13, 14], "enum_ref": "ForceControl", "name": "FORCE_FULL_Z_RANGE"},
10304     {"bits": [15, 15], "name": "FORCE_QC_SMASK_CONFLICT"},
10305     {"bits": [16, 16], "name": "DISABLE_VIEWPORT_CLAMP"},
10306     {"bits": [17, 17], "name": "IGNORE_SC_ZRANGE"},
10307     {"bits": [18, 18], "name": "DISABLE_FULLY_COVERED"},
10308     {"bits": [19, 20], "enum_ref": "ZLimitSumm", "name": "FORCE_Z_LIMIT_SUMM"},
10309     {"bits": [21, 25], "name": "MAX_TILES_IN_DTT"},
10310     {"bits": [26, 26], "name": "DISABLE_TILE_RATE_TILES"},
10311     {"bits": [27, 27], "name": "FORCE_Z_DIRTY"},
10312     {"bits": [28, 28], "name": "FORCE_STENCIL_DIRTY"},
10313     {"bits": [29, 29], "name": "FORCE_Z_VALID"},
10314     {"bits": [30, 30], "name": "FORCE_STENCIL_VALID"},
10315     {"bits": [31, 31], "name": "PRESERVE_COMPRESSION"}
10320     {"bits": [0, 1], "enum_ref": "DbPSLControl", "name": "PARTIAL_SQUAD_LAUNCH_CONTROL"},
10321     {"bits": [2, 4], "name": "PARTIAL_SQUAD_LAUNCH_COUNTDOWN"},
10322     {"bits": [5, 5], "name": "DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION"},
10323     {"bits": [6, 6], "name": "DISABLE_SMEM_EXPCLEAR_OPTIMIZATION"},
10324     {"bits": [7, 7], "name": "DISABLE_COLOR_ON_VALIDATION"},
10325     {"bits": [8, 8], "name": "DECOMPRESS_Z_ON_FLUSH"},
10326     {"bits": [9, 9], "name": "DISABLE_REG_SNOOP"},
10327     {"bits": [10, 10], "name": "DEPTH_BOUNDS_HIER_DEPTH_DISABLE"},
10328     {"bits": [11, 11], "name": "SEPARATE_HIZS_FUNC_ENABLE"},
10329     {"bits": [12, 14], "enum_ref": "CompareFrag", "name": "HIZ_ZFUNC"},
10330     {"bits": [15, 17], "name": "HIS_SFUNC_FF"},
10331     {"bits": [18, 20], "name": "HIS_SFUNC_BF"},
10332     {"bits": [21, 21], "name": "PRESERVE_ZRANGE"},
10333     {"bits": [22, 22], "name": "PRESERVE_SRESULTS"},
10334     {"bits": [23, 23], "name": "DISABLE_FAST_PASS"}
10339     {"bits": [0, 0], "name": "Z_EXPORT_ENABLE"},
10340     {"bits": [1, 1], "name": "STENCIL_TEST_VAL_EXPORT_ENABLE"},
10341     {"bits": [2, 2], "name": "STENCIL_OP_VAL_EXPORT_ENABLE"},
10342     {"bits": [4, 5], "enum_ref": "ZOrder", "name": "Z_ORDER"},
10343     {"bits": [6, 6], "name": "KILL_ENABLE"},
10344     {"bits": [7, 7], "name": "COVERAGE_TO_MASK_ENABLE"},
10345     {"bits": [8, 8], "name": "MASK_EXPORT_ENABLE"},
10346     {"bits": [9, 9], "name": "EXEC_ON_HIER_FAIL"},
10347     {"bits": [10, 10], "name": "EXEC_ON_NOOP"},
10348     {"bits": [11, 11], "name": "ALPHA_TO_MASK_DISABLE"},
10349     {"bits": [12, 12], "name": "DEPTH_BEFORE_SHADER"},
10350     {"bits": [13, 14], "enum_ref": "ConservativeZExport", "name": "CONSERVATIVE_Z_EXPORT"}
10355     {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC0"},
10356     {"bits": [4, 11], "name": "COMPAREVALUE0"},
10357     {"bits": [12, 19], "name": "COMPAREMASK0"},
10358     {"bits": [24, 24], "name": "ENABLE0"}
10363     {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC1"},
10364     {"bits": [4, 11], "name": "COMPAREVALUE1"},
10365     {"bits": [12, 19], "name": "COMPAREMASK1"},
10366     {"bits": [24, 24], "name": "ENABLE1"}
10371     {"bits": [0, 7], "name": "STENCILTESTVAL"},
10372     {"bits": [8, 15], "name": "STENCILMASK"},
10373     {"bits": [16, 23], "name": "STENCILWRITEMASK"},
10374     {"bits": [24, 31], "name": "STENCILOPVAL"}
10379     {"bits": [0, 7], "name": "STENCILTESTVAL_BF"},
10380     {"bits": [8, 15], "name": "STENCILMASK_BF"},
10381     {"bits": [16, 23], "name": "STENCILWRITEMASK_BF"},
10382     {"bits": [24, 31], "name": "STENCILOPVAL_BF"}
10387     {"bits": [0, 7], "name": "CLEAR"}
10392     {"bits": [0, 3], "enum_ref": "StencilOp", "name": "STENCILFAIL"},
10393     {"bits": [4, 7], "enum_ref": "StencilOp", "name": "STENCILZPASS"},
10394     {"bits": [8, 11], "enum_ref": "StencilOp", "name": "STENCILZFAIL"},
10395     {"bits": [12, 15], "enum_ref": "StencilOp", "name": "STENCILFAIL_BF"},
10396     {"bits": [16, 19], "enum_ref": "StencilOp", "name": "STENCILZPASS_BF"},
10397     {"bits": [20, 23], "enum_ref": "StencilOp", "name": "STENCILZFAIL_BF"}
10402     {"bits": [0, 0], "enum_ref": "StencilFormat", "name": "FORMAT"},
10403     {"bits": [13, 15], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},
10404     {"bits": [20, 22], "name": "TILE_MODE_INDEX"},
10405     {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"},
10406     {"bits": [29, 29], "name": "TILE_STENCIL_DISABLE"},
10407     {"bits": [30, 30], "name": "CLEAR_DISALLOWED"}
10412     {"bits": [0, 30], "name": "COUNT_HI"}
10417     {"bits": [0, 1], "enum_ref": "ZFormat", "name": "FORMAT"},
10418     {"bits": [2, 3], "name": "NUM_SAMPLES"},
10419     {"bits": [13, 15], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},
10420     {"bits": [20, 22], "name": "TILE_MODE_INDEX"},
10421     {"bits": [23, 26], "name": "DECOMPRESS_ON_N_ZPLANES"},
10422     {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"},
10423     {"bits": [28, 28], "name": "READ_SIZE"},
10424     {"bits": [29, 29], "name": "TILE_SURFACE_ENABLE"},
10425     {"bits": [30, 30], "name": "CLEAR_DISALLOWED"},
10426     {"bits": [31, 31], "name": "ZRANGE_PRECISION"}
10431     {"bits": [0, 2], "name": "NUM_PIPES"},
10432     {"bits": [4, 6], "name": "PIPE_INTERLEAVE_SIZE"},
10433     {"bits": [8, 10], "name": "BANK_INTERLEAVE_SIZE"},
10434     {"bits": [12, 13], "name": "NUM_SHADER_ENGINES"},
10435     {"bits": [16, 18], "name": "SHADER_ENGINE_TILE_SIZE"},
10436     {"bits": [20, 22], "name": "NUM_GPUS"},
10437     {"bits": [24, 25], "name": "MULTI_GPU_TILE_SIZE"},
10438     {"bits": [28, 29], "name": "ROW_SIZE"},
10439     {"bits": [30, 30], "name": "NUM_LOWER_PIPES"}
10444     {"bits": [0, 1], "enum_ref": "BankWidth", "name": "BANK_WIDTH"},
10445     {"bits": [2, 3], "enum_ref": "BankHeight", "name": "BANK_HEIGHT"},
10446     {"bits": [4, 5], "enum_ref": "MacroTileAspect", "name": "MACRO_TILE_ASPECT"},
10447     {"bits": [6, 7], "enum_ref": "NumBanks", "name": "NUM_BANKS"}
10452     {"bits": [2, 5], "enum_ref": "ArrayMode", "name": "ARRAY_MODE"},
10453     {"bits": [6, 10], "enum_ref": "PipeConfig", "name": "PIPE_CONFIG"},
10454     {"bits": [11, 13], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},
10455     {"bits": [22, 24], "enum_ref": "MicroTileMode", "name": "MICRO_TILE_MODE_NEW"},
10456     {"bits": [25, 26], "name": "SAMPLE_SPLIT"}
10461     {"bits": [0, 15], "name": "BASE"},
10462     {"bits": [16, 31], "name": "UNUSED"}
10467     {"bits": [0, 5], "name": "AINC"},
10468     {"bits": [6, 7], "name": "UNUSED1"},
10469     {"bits": [8, 9], "name": "DMODE"},
10470     {"bits": [10, 31], "name": "UNUSED2"}
10475     {"bits": [0, 0], "name": "COMPLETE"},
10476     {"bits": [1, 31], "name": "UNUSED"}
10481     {"bits": [0, 7], "name": "OFFSET0"},
10482     {"bits": [8, 31], "name": "UNUSED"}
10487     {"bits": [0, 7], "name": "OFFSET1"},
10488     {"bits": [8, 31], "name": "UNUSED"}
10493     {"bits": [0, 7], "name": "OP"},
10494     {"bits": [8, 31], "name": "UNUSED"}
10499     {"bits": [0, 15], "name": "SIZE"},
10500     {"bits": [16, 31], "name": "UNUSED"}
10505     {"bits": [0, 0], "name": "FLAG"},
10506     {"bits": [1, 12], "name": "COUNTER"},
10507     {"bits": [13, 13], "name": "TYPE"},
10508     {"bits": [14, 14], "name": "DED"},
10509     {"bits": [15, 15], "name": "RELEASE_ALL"},
10510     {"bits": [16, 26], "name": "HEAD_QUEUE"},
10511     {"bits": [27, 27], "name": "HEAD_VALID"},
10512     {"bits": [28, 28], "name": "HEAD_FLAG"},
10513     {"bits": [29, 31], "name": "UNUSED1"}
10518     {"bits": [0, 15], "name": "RESOURCE_CNT"},
10519     {"bits": [16, 31], "name": "UNUSED"}
10524     {"bits": [0, 5], "name": "INDEX"},
10525     {"bits": [6, 31], "name": "UNUSED"}
10530     {"bits": [0, 15], "name": "DS_ADDRESS"},
10531     {"bits": [16, 19], "name": "CRAWLER"},
10532     {"bits": [20, 21], "name": "CRAWLER_TYPE"},
10533     {"bits": [22, 29], "name": "UNUSED"},
10534     {"bits": [30, 30], "name": "NO_ALLOC"},
10535     {"bits": [31, 31], "name": "ENABLE"}
10540     {"bits": [0, 3], "name": "INDEX"},
10541     {"bits": [4, 31], "name": "UNUSED"}
10546     {"bits": [0, 30], "name": "VALUE"},
10547     {"bits": [31, 31], "name": "INCDEC"}
10552     {"bits": [0, 7], "name": "INSTANCE_INDEX"},
10553     {"bits": [8, 15], "name": "SH_INDEX"},
10554     {"bits": [16, 23], "name": "SE_INDEX"},
10555     {"bits": [29, 29], "name": "SH_BROADCAST_WRITES"},
10556     {"bits": [30, 30], "name": "INSTANCE_BROADCAST_WRITES"},
10557     {"bits": [31, 31], "name": "SE_BROADCAST_WRITES"}
10562     {"bits": [0, 5], "name": "PERF_SEL"},
10563     {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"},
10564     {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"},
10565     {"bits": [12, 12], "name": "VGT_BUSY_USER_DEFINED_MASK"},
10566     {"bits": [13, 13], "name": "TA_BUSY_USER_DEFINED_MASK"},
10567     {"bits": [14, 14], "name": "SX_BUSY_USER_DEFINED_MASK"},
10568     {"bits": [16, 16], "name": "SPI_BUSY_USER_DEFINED_MASK"},
10569     {"bits": [17, 17], "name": "SC_BUSY_USER_DEFINED_MASK"},
10570     {"bits": [18, 18], "name": "PA_BUSY_USER_DEFINED_MASK"},
10571     {"bits": [19, 19], "name": "GRBM_BUSY_USER_DEFINED_MASK"},
10572     {"bits": [20, 20], "name": "DB_BUSY_USER_DEFINED_MASK"},
10573     {"bits": [21, 21], "name": "CB_BUSY_USER_DEFINED_MASK"},
10574     {"bits": [22, 22], "name": "CP_BUSY_USER_DEFINED_MASK"},
10575     {"bits": [23, 23], "name": "IA_BUSY_USER_DEFINED_MASK"},
10576     {"bits": [24, 24], "name": "GDS_BUSY_USER_DEFINED_MASK"},
10577     {"bits": [25, 25], "name": "BCI_BUSY_USER_DEFINED_MASK"},
10578     {"bits": [26, 26], "name": "RLC_BUSY_USER_DEFINED_MASK"},
10579     {"bits": [27, 27], "name": "TC_BUSY_USER_DEFINED_MASK"},
10580     {"bits": [28, 28], "name": "WD_BUSY_USER_DEFINED_MASK"}
10585     {"bits": [0, 5], "name": "PERF_SEL"},
10586     {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"},
10587     {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"},
10588     {"bits": [12, 12], "name": "TA_BUSY_USER_DEFINED_MASK"},
10589     {"bits": [13, 13], "name": "SX_BUSY_USER_DEFINED_MASK"},
10590     {"bits": [15, 15], "name": "SPI_BUSY_USER_DEFINED_MASK"},
10591     {"bits": [16, 16], "name": "SC_BUSY_USER_DEFINED_MASK"},
10592     {"bits": [17, 17], "name": "DB_BUSY_USER_DEFINED_MASK"},
10593     {"bits": [18, 18], "name": "CB_BUSY_USER_DEFINED_MASK"},
10594     {"bits": [19, 19], "name": "VGT_BUSY_USER_DEFINED_MASK"},
10595     {"bits": [20, 20], "name": "PA_BUSY_USER_DEFINED_MASK"},
10596     {"bits": [21, 21], "name": "BCI_BUSY_USER_DEFINED_MASK"}
10601     {"bits": [0, 3], "name": "ME0PIPE0_CMDFIFO_AVAIL"},
10602     {"bits": [5, 5], "name": "SRBM_RQ_PENDING"},
10603     {"bits": [7, 7], "name": "ME0PIPE0_CF_RQ_PENDING"},
10604     {"bits": [8, 8], "name": "ME0PIPE0_PF_RQ_PENDING"},
10605     {"bits": [9, 9], "name": "GDS_DMA_RQ_PENDING"},
10606     {"bits": [12, 12], "name": "DB_CLEAN"},
10607     {"bits": [13, 13], "name": "CB_CLEAN"},
10608     {"bits": [14, 14], "name": "TA_BUSY"},
10609     {"bits": [15, 15], "name": "GDS_BUSY"},
10610     {"bits": [16, 16], "name": "WD_BUSY_NO_DMA"},
10611     {"bits": [17, 17], "name": "VGT_BUSY"},
10612     {"bits": [18, 18], "name": "IA_BUSY_NO_DMA"},
10613     {"bits": [19, 19], "name": "IA_BUSY"},
10614     {"bits": [20, 20], "name": "SX_BUSY"},
10615     {"bits": [21, 21], "name": "WD_BUSY"},
10616     {"bits": [22, 22], "name": "SPI_BUSY"},
10617     {"bits": [23, 23], "name": "BCI_BUSY"},
10618     {"bits": [24, 24], "name": "SC_BUSY"},
10619     {"bits": [25, 25], "name": "PA_BUSY"},
10620     {"bits": [26, 26], "name": "DB_BUSY"},
10621     {"bits": [28, 28], "name": "CP_COHERENCY_BUSY"},
10622     {"bits": [29, 29], "name": "CP_BUSY"},
10623     {"bits": [30, 30], "name": "CB_BUSY"},
10624     {"bits": [31, 31], "name": "GUI_ACTIVE"}
10629     {"bits": [0, 3], "name": "ME0PIPE1_CMDFIFO_AVAIL"},
10630     {"bits": [4, 4], "name": "ME0PIPE1_CF_RQ_PENDING"},
10631     {"bits": [5, 5], "name": "ME0PIPE1_PF_RQ_PENDING"},
10632     {"bits": [6, 6], "name": "ME1PIPE0_RQ_PENDING"},
10633     {"bits": [7, 7], "name": "ME1PIPE1_RQ_PENDING"},
10634     {"bits": [8, 8], "name": "ME1PIPE2_RQ_PENDING"},
10635     {"bits": [9, 9], "name": "ME1PIPE3_RQ_PENDING"},
10636     {"bits": [10, 10], "name": "ME2PIPE0_RQ_PENDING"},
10637     {"bits": [11, 11], "name": "ME2PIPE1_RQ_PENDING"},
10638     {"bits": [12, 12], "name": "ME2PIPE2_RQ_PENDING"},
10639     {"bits": [13, 13], "name": "ME2PIPE3_RQ_PENDING"},
10640     {"bits": [14, 14], "name": "RLC_RQ_PENDING"},
10641     {"bits": [24, 24], "name": "RLC_BUSY"},
10642     {"bits": [25, 25], "name": "TC_BUSY"},
10643     {"bits": [26, 26], "name": "TCC_CC_RESIDENT"},
10644     {"bits": [28, 28], "name": "CPF_BUSY"},
10645     {"bits": [29, 29], "name": "CPC_BUSY"},
10646     {"bits": [30, 30], "name": "CPG_BUSY"}
10651     {"bits": [1, 1], "name": "DB_CLEAN"},
10652     {"bits": [2, 2], "name": "CB_CLEAN"},
10653     {"bits": [22, 22], "name": "BCI_BUSY"},
10654     {"bits": [23, 23], "name": "VGT_BUSY"},
10655     {"bits": [24, 24], "name": "PA_BUSY"},
10656     {"bits": [25, 25], "name": "TA_BUSY"},
10657     {"bits": [26, 26], "name": "SX_BUSY"},
10658     {"bits": [27, 27], "name": "SPI_BUSY"},
10659     {"bits": [29, 29], "name": "SC_BUSY"},
10660     {"bits": [30, 30], "name": "DB_BUSY"},
10661     {"bits": [31, 31], "name": "CB_BUSY"}
10666     {"bits": [0, 15], "name": "PRIMGROUP_SIZE"},
10667     {"bits": [16, 16], "name": "PARTIAL_VS_WAVE_ON"},
10668     {"bits": [17, 17], "name": "SWITCH_ON_EOP"},
10669     {"bits": [18, 18], "name": "PARTIAL_ES_WAVE_ON"},
10670     {"bits": [19, 19], "name": "SWITCH_ON_EOI"},
10671     {"bits": [20, 20], "name": "WD_SWITCH_ON_EOP"},
10672     {"bits": [28, 31], "name": "MAX_PRIMGRP_IN_WAVE"}
10677     {"bits": [0, 0], "name": "UCP_ENA_0"},
10678     {"bits": [1, 1], "name": "UCP_ENA_1"},
10679     {"bits": [2, 2], "name": "UCP_ENA_2"},
10680     {"bits": [3, 3], "name": "UCP_ENA_3"},
10681     {"bits": [4, 4], "name": "UCP_ENA_4"},
10682     {"bits": [5, 5], "name": "UCP_ENA_5"},
10683     {"bits": [13, 13], "name": "PS_UCP_Y_SCALE_NEG"},
10684     {"bits": [14, 15], "name": "PS_UCP_MODE"},
10685     {"bits": [16, 16], "name": "CLIP_DISABLE"},
10686     {"bits": [17, 17], "name": "UCP_CULL_ONLY_ENA"},
10687     {"bits": [18, 18], "name": "BOUNDARY_EDGE_FLAG_ENA"},
10688     {"bits": [19, 19], "name": "DX_CLIP_SPACE_DEF"},
10689     {"bits": [20, 20], "name": "DIS_CLIP_ERR_DETECT"},
10690     {"bits": [21, 21], "name": "VTX_KILL_OR"},
10691     {"bits": [22, 22], "name": "DX_RASTERIZATION_KILL"},
10692     {"bits": [24, 24], "name": "DX_LINEAR_ATTR_CLIP_ENA"},
10693     {"bits": [25, 25], "name": "VTE_VPORT_PROVOKE_DISABLE"},
10694     {"bits": [26, 26], "name": "ZCLIP_NEAR_DISABLE"},
10695     {"bits": [27, 27], "name": "ZCLIP_FAR_DISABLE"}
10700     {"bits": [0, 0], "name": "VTE_XY_INF_DISCARD"},
10701     {"bits": [1, 1], "name": "VTE_Z_INF_DISCARD"},
10702     {"bits": [2, 2], "name": "VTE_W_INF_DISCARD"},
10703     {"bits": [3, 3], "name": "VTE_0XNANINF_IS_0"},
10704     {"bits": [4, 4], "name": "VTE_XY_NAN_RETAIN"},
10705     {"bits": [5, 5], "name": "VTE_Z_NAN_RETAIN"},
10706     {"bits": [6, 6], "name": "VTE_W_NAN_RETAIN"},
10707     {"bits": [7, 7], "name": "VTE_W_RECIP_NAN_IS_0"},
10708     {"bits": [8, 8], "name": "VS_XY_NAN_TO_INF"},
10709     {"bits": [9, 9], "name": "VS_XY_INF_RETAIN"},
10710     {"bits": [10, 10], "name": "VS_Z_NAN_TO_INF"},
10711     {"bits": [11, 11], "name": "VS_Z_INF_RETAIN"},
10712     {"bits": [12, 12], "name": "VS_W_NAN_TO_INF"},
10713     {"bits": [13, 13], "name": "VS_W_INF_RETAIN"},
10714     {"bits": [14, 14], "name": "VS_CLIP_DIST_INF_DISCARD"},
10715     {"bits": [20, 20], "name": "VTE_NO_OUTPUT_NEG_0"}
10720     {"bits": [0, 0], "name": "CLIP_DIST_ENA_0"},
10721     {"bits": [1, 1], "name": "CLIP_DIST_ENA_1"},
10722     {"bits": [2, 2], "name": "CLIP_DIST_ENA_2"},
10723     {"bits": [3, 3], "name": "CLIP_DIST_ENA_3"},
10724     {"bits": [4, 4], "name": "CLIP_DIST_ENA_4"},
10725     {"bits": [5, 5], "name": "CLIP_DIST_ENA_5"},
10726     {"bits": [6, 6], "name": "CLIP_DIST_ENA_6"},
10727     {"bits": [7, 7], "name": "CLIP_DIST_ENA_7"},
10728     {"bits": [8, 8], "name": "CULL_DIST_ENA_0"},
10729     {"bits": [9, 9], "name": "CULL_DIST_ENA_1"},
10730     {"bits": [10, 10], "name": "CULL_DIST_ENA_2"},
10731     {"bits": [11, 11], "name": "CULL_DIST_ENA_3"},
10732     {"bits": [12, 12], "name": "CULL_DIST_ENA_4"},
10733     {"bits": [13, 13], "name": "CULL_DIST_ENA_5"},
10734     {"bits": [14, 14], "name": "CULL_DIST_ENA_6"},
10735     {"bits": [15, 15], "name": "CULL_DIST_ENA_7"},
10736     {"bits": [16, 16], "name": "USE_VTX_POINT_SIZE"},
10737     {"bits": [17, 17], "name": "USE_VTX_EDGE_FLAG"},
10738     {"bits": [18, 18], "name": "USE_VTX_RENDER_TARGET_INDX"},
10739     {"bits": [19, 19], "name": "USE_VTX_VIEWPORT_INDX"},
10740     {"bits": [20, 20], "name": "USE_VTX_KILL_FLAG"},
10741     {"bits": [21, 21], "name": "VS_OUT_MISC_VEC_ENA"},
10742     {"bits": [22, 22], "name": "VS_OUT_CCDIST0_VEC_ENA"},
10743     {"bits": [23, 23], "name": "VS_OUT_CCDIST1_VEC_ENA"},
10744     {"bits": [24, 24], "name": "VS_OUT_MISC_SIDE_BUS_ENA"},
10745     {"bits": [25, 25], "name": "USE_VTX_GS_CUT_FLAG"},
10746     {"bits": [26, 26], "name": "USE_VTX_LINE_WIDTH"}
10751     {"bits": [0, 0], "name": "VPORT_X_SCALE_ENA"},
10752     {"bits": [1, 1], "name": "VPORT_X_OFFSET_ENA"},
10753     {"bits": [2, 2], "name": "VPORT_Y_SCALE_ENA"},
10754     {"bits": [3, 3], "name": "VPORT_Y_OFFSET_ENA"},
10755     {"bits": [4, 4], "name": "VPORT_Z_SCALE_ENA"},
10756     {"bits": [5, 5], "name": "VPORT_Z_OFFSET_ENA"},
10757     {"bits": [8, 8], "name": "VTX_XY_FMT"},
10758     {"bits": [9, 9], "name": "VTX_Z_FMT"},
10759     {"bits": [10, 10], "name": "VTX_W0_FMT"},
10760     {"bits": [11, 11], "name": "PERFCOUNTER_REF"}
10765     {"bits": [0, 2], "name": "MSAA_NUM_SAMPLES"},
10766     {"bits": [4, 4], "name": "AA_MASK_CENTROID_DTMN"},
10767     {"bits": [13, 16], "name": "MAX_SAMPLE_DIST"},
10768     {"bits": [20, 22], "name": "MSAA_EXPOSED_SAMPLES"},
10769     {"bits": [24, 25], "name": "DETAIL_TO_EXPOSED_MODE"}
10774     {"bits": [0, 15], "name": "AA_MASK_X0Y0"},
10775     {"bits": [16, 31], "name": "AA_MASK_X1Y0"}
10780     {"bits": [0, 15], "name": "AA_MASK_X0Y1"},
10781     {"bits": [16, 31], "name": "AA_MASK_X1Y1"}
10786     {"bits": [0, 3], "name": "S0_X"},
10787     {"bits": [4, 7], "name": "S0_Y"},
10788     {"bits": [8, 11], "name": "S1_X"},
10789     {"bits": [12, 15], "name": "S1_Y"},
10790     {"bits": [16, 19], "name": "S2_X"},
10791     {"bits": [20, 23], "name": "S2_Y"},
10792     {"bits": [24, 27], "name": "S3_X"},
10793     {"bits": [28, 31], "name": "S3_Y"}
10798     {"bits": [0, 3], "name": "S4_X"},
10799     {"bits": [4, 7], "name": "S4_Y"},
10800     {"bits": [8, 11], "name": "S5_X"},
10801     {"bits": [12, 15], "name": "S5_Y"},
10802     {"bits": [16, 19], "name": "S6_X"},
10803     {"bits": [20, 23], "name": "S6_Y"},
10804     {"bits": [24, 27], "name": "S7_X"},
10805     {"bits": [28, 31], "name": "S7_Y"}
10810     {"bits": [0, 3], "name": "S8_X"},
10811     {"bits": [4, 7], "name": "S8_Y"},
10812     {"bits": [8, 11], "name": "S9_X"},
10813     {"bits": [12, 15], "name": "S9_Y"},
10814     {"bits": [16, 19], "name": "S10_X"},
10815     {"bits": [20, 23], "name": "S10_Y"},
10816     {"bits": [24, 27], "name": "S11_X"},
10817     {"bits": [28, 31], "name": "S11_Y"}
10822     {"bits": [0, 3], "name": "S12_X"},
10823     {"bits": [4, 7], "name": "S12_Y"},
10824     {"bits": [8, 11], "name": "S13_X"},
10825     {"bits": [12, 15], "name": "S13_Y"},
10826     {"bits": [16, 19], "name": "S14_X"},
10827     {"bits": [20, 23], "name": "S14_Y"},
10828     {"bits": [24, 27], "name": "S15_X"},
10829     {"bits": [28, 31], "name": "S15_Y"}
10834     {"bits": [0, 3], "name": "DISTANCE_0"},
10835     {"bits": [4, 7], "name": "DISTANCE_1"},
10836     {"bits": [8, 11], "name": "DISTANCE_2"},
10837     {"bits": [12, 15], "name": "DISTANCE_3"},
10838     {"bits": [16, 19], "name": "DISTANCE_4"},
10839     {"bits": [20, 23], "name": "DISTANCE_5"},
10840     {"bits": [24, 27], "name": "DISTANCE_6"},
10841     {"bits": [28, 31], "name": "DISTANCE_7"}
10846     {"bits": [0, 3], "name": "DISTANCE_8"},
10847     {"bits": [4, 7], "name": "DISTANCE_9"},
10848     {"bits": [8, 11], "name": "DISTANCE_10"},
10849     {"bits": [12, 15], "name": "DISTANCE_11"},
10850     {"bits": [16, 19], "name": "DISTANCE_12"},
10851     {"bits": [20, 23], "name": "DISTANCE_13"},
10852     {"bits": [24, 27], "name": "DISTANCE_14"},
10853     {"bits": [28, 31], "name": "DISTANCE_15"}
10858     {"bits": [0, 14], "name": "BR_X"},
10859     {"bits": [16, 30], "name": "BR_Y"}
10864     {"bits": [0, 14], "name": "TL_X"},
10865     {"bits": [16, 30], "name": "TL_Y"}
10870     {"bits": [0, 15], "enum_ref": "CLIP_RULE", "name": "CLIP_RULE"}
10875     {"bits": [0, 3], "name": "ER_TRI"},
10876     {"bits": [4, 7], "name": "ER_POINT"},
10877     {"bits": [8, 11], "name": "ER_RECT"},
10878     {"bits": [12, 17], "name": "ER_LINE_LR"},
10879     {"bits": [18, 23], "name": "ER_LINE_RL"},
10880     {"bits": [24, 27], "name": "ER_LINE_TB"},
10881     {"bits": [28, 31], "name": "ER_LINE_BT"}
10886     {"bits": [0, 14], "name": "TL_X"},
10887     {"bits": [16, 30], "name": "TL_Y"},
10888     {"bits": [31, 31], "name": "WINDOW_OFFSET_DISABLE"}
10893     {"bits": [9, 9], "name": "EXPAND_LINE_WIDTH"},
10894     {"bits": [10, 10], "name": "LAST_PIXEL"},
10895     {"bits": [11, 11], "name": "PERPENDICULAR_ENDCAP_ENA"},
10896     {"bits": [12, 12], "name": "DX10_DIAMOND_TEST_ENA"}
10901     {"bits": [0, 15], "name": "LINE_PATTERN"},
10902     {"bits": [16, 23], "name": "REPEAT_COUNT"},
10903     {"bits": [28, 28], "name": "PATTERN_BIT_ORDER"},
10904     {"bits": [29, 30], "name": "AUTO_RESET_CNTL"}
10909     {"bits": [0, 3], "name": "CURRENT_PTR"},
10910     {"bits": [8, 15], "name": "CURRENT_COUNT"}
10915     {"bits": [0, 0], "name": "MSAA_ENABLE"},
10916     {"bits": [1, 1], "name": "VPORT_SCISSOR_ENABLE"},
10917     {"bits": [2, 2], "name": "LINE_STIPPLE_ENABLE"},
10918     {"bits": [3, 3], "name": "SEND_UNLIT_STILES_TO_PKR"}
10923     {"bits": [0, 0], "name": "WALK_SIZE"},
10924     {"bits": [1, 1], "name": "WALK_ALIGNMENT"},
10925     {"bits": [2, 2], "name": "WALK_ALIGN8_PRIM_FITS_ST"},
10926     {"bits": [3, 3], "name": "WALK_FENCE_ENABLE"},
10927     {"bits": [4, 6], "name": "WALK_FENCE_SIZE"},
10928     {"bits": [7, 7], "name": "SUPERTILE_WALK_ORDER_ENABLE"},
10929     {"bits": [8, 8], "name": "TILE_WALK_ORDER_ENABLE"},
10930     {"bits": [9, 9], "name": "TILE_COVER_DISABLE"},
10931     {"bits": [10, 10], "name": "TILE_COVER_NO_SCISSOR"},
10932     {"bits": [11, 11], "name": "ZMM_LINE_EXTENT"},
10933     {"bits": [12, 12], "name": "ZMM_LINE_OFFSET"},
10934     {"bits": [13, 13], "name": "ZMM_RECT_EXTENT"},
10935     {"bits": [14, 14], "name": "KILL_PIX_POST_HI_Z"},
10936     {"bits": [15, 15], "name": "KILL_PIX_POST_DETAIL_MASK"},
10937     {"bits": [16, 16], "name": "PS_ITER_SAMPLE"},
10938     {"bits": [17, 17], "name": "MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE"},
10939     {"bits": [18, 18], "name": "MULTI_GPU_SUPERTILE_ENABLE"},
10940     {"bits": [19, 19], "name": "GPU_ID_OVERRIDE_ENABLE"},
10941     {"bits": [20, 23], "name": "GPU_ID_OVERRIDE"},
10942     {"bits": [24, 24], "name": "MULTI_GPU_PRIM_DISCARD_ENABLE"},
10943     {"bits": [25, 25], "name": "FORCE_EOV_CNTDWN_ENABLE"},
10944     {"bits": [26, 26], "name": "FORCE_EOV_REZ_ENABLE"},
10945     {"bits": [27, 27], "name": "OUT_OF_ORDER_PRIMITIVE_ENABLE"},
10946     {"bits": [28, 30], "name": "OUT_OF_ORDER_WATER_MARK"}
10951     {"bits": [0, 13], "name": "X_COORD"}
10956     {"bits": [0, 0], "name": "ENABLE_HV_PRE_SHADER"},
10957     {"bits": [1, 1], "name": "FORCE_PRE_SHADER_ALL_PIXELS"}
10962     {"bits": [0, 13], "name": "Y_COORD"}
10967     {"bits": [0, 9], "name": "PERF_SEL"}
10972     {"bits": [0, 1], "enum_ref": "RbMap", "name": "RB_MAP_PKR0"},
10973     {"bits": [2, 3], "enum_ref": "RbMap", "name": "RB_MAP_PKR1"},
10974     {"bits": [4, 5], "enum_ref": "RbXsel2", "name": "RB_XSEL2"},
10975     {"bits": [6, 6], "enum_ref": "RbXsel", "name": "RB_XSEL"},
10976     {"bits": [7, 7], "enum_ref": "RbYsel", "name": "RB_YSEL"},
10977     {"bits": [8, 9], "enum_ref": "PkrMap", "name": "PKR_MAP"},
10978     {"bits": [10, 11], "enum_ref": "PkrXsel", "name": "PKR_XSEL"},
10979     {"bits": [12, 13], "enum_ref": "PkrYsel", "name": "PKR_YSEL"},
10980     {"bits": [14, 15], "enum_ref": "PkrXsel2", "name": "PKR_XSEL2"},
10981     {"bits": [16, 17], "enum_ref": "ScMap", "name": "SC_MAP"},
10982     {"bits": [18, 19], "enum_ref": "ScXsel", "name": "SC_XSEL"},
10983     {"bits": [20, 21], "enum_ref": "ScYsel", "name": "SC_YSEL"},
10984     {"bits": [24, 25], "enum_ref": "SeMap", "name": "SE_MAP"},
10985     {"bits": [26, 27], "enum_ref": "SeXsel", "name": "SE_XSEL"},
10986     {"bits": [28, 29], "enum_ref": "SeYsel", "name": "SE_YSEL"}
10991     {"bits": [0, 1], "enum_ref": "SePairMap", "name": "SE_PAIR_MAP"},
10992     {"bits": [2, 3], "enum_ref": "SePairXsel", "name": "SE_PAIR_XSEL"},
10993     {"bits": [4, 5], "enum_ref": "SePairYsel", "name": "SE_PAIR_YSEL"}
10998     {"bits": [0, 1], "name": "SLICE_EVEN_ENABLE"},
10999     {"bits": [2, 3], "name": "SLICE_ODD_ENABLE"}
11004     {"bits": [0, 15], "name": "X"},
11005     {"bits": [16, 31], "name": "Y"}
11010     {"bits": [0, 15], "name": "BR_X"},
11011     {"bits": [16, 31], "name": "BR_Y"}
11016     {"bits": [0, 15], "name": "TL_X"},
11017     {"bits": [16, 31], "name": "TL_Y"}
11022     {"bits": [0, 15], "name": "WINDOW_X_OFFSET"},
11023     {"bits": [16, 31], "name": "WINDOW_Y_OFFSET"}
11028     {"bits": [0, 8], "name": "HW_SCREEN_OFFSET_X"},
11029     {"bits": [16, 24], "name": "HW_SCREEN_OFFSET_Y"}
11034     {"bits": [0, 15], "name": "WIDTH"}
11039     {"bits": [0, 1], "name": "LINE_STIPPLE_RESET"},
11040     {"bits": [2, 2], "name": "EXPAND_FULL_LENGTH"},
11041     {"bits": [3, 3], "name": "FRACTIONAL_ACCUM"},
11042     {"bits": [4, 4], "name": "DIAMOND_ADJUST"}
11047     {"bits": [0, 23], "name": "LINE_STIPPLE_VALUE"}
11052     {"bits": [0, 15], "name": "PERFCOUNTER_HI"}
11057     {"bits": [0, 9], "name": "PERF_SEL"},
11058     {"bits": [10, 19], "name": "PERF_SEL1"},
11059     {"bits": [20, 23], "name": "CNTR_MODE"}
11064     {"bits": [0, 9], "name": "PERF_SEL2"},
11065     {"bits": [10, 19], "name": "PERF_SEL3"}
11070     {"bits": [0, 9], "name": "PERF_SEL"},
11071     {"bits": [20, 23], "name": "CNTR_MODE"}
11076     {"bits": [0, 15], "name": "MIN_SIZE"},
11077     {"bits": [16, 31], "name": "MAX_SIZE"}
11082     {"bits": [0, 15], "name": "HEIGHT"},
11083     {"bits": [16, 31], "name": "WIDTH"}
11088     {"bits": [0, 7], "name": "POLY_OFFSET_NEG_NUM_DB_BITS"},
11089     {"bits": [8, 8], "name": "POLY_OFFSET_DB_IS_FLOAT_FMT"}
11094     {"bits": [0, 0], "name": "TRIANGLE_FILTER_DISABLE"},
11095     {"bits": [1, 1], "name": "LINE_FILTER_DISABLE"},
11096     {"bits": [2, 2], "name": "POINT_FILTER_DISABLE"},
11097     {"bits": [3, 3], "name": "RECTANGLE_FILTER_DISABLE"},
11098     {"bits": [4, 4], "name": "TRIANGLE_EXPAND_ENA"},
11099     {"bits": [5, 5], "name": "LINE_EXPAND_ENA"},
11100     {"bits": [6, 6], "name": "POINT_EXPAND_ENA"},
11101     {"bits": [7, 7], "name": "RECTANGLE_EXPAND_ENA"},
11102     {"bits": [8, 15], "name": "PRIM_EXPAND_CONSTANT"},
11103     {"bits": [30, 30], "name": "XMAX_RIGHT_EXCLUSION"},
11104     {"bits": [31, 31], "name": "YMAX_BOTTOM_EXCLUSION"}
11109     {"bits": [0, 0], "name": "CULL_FRONT"},
11110     {"bits": [1, 1], "name": "CULL_BACK"},
11111     {"bits": [2, 2], "name": "FACE"},
11112     {"bits": [3, 4], "enum_ref": "PA_SU_SC_MODE_CNTL__POLY_MODE", "name": "POLY_MODE"},
11113     {"bits": [5, 7], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_FRONT_PTYPE"},
11114     {"bits": [8, 10], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_BACK_PTYPE"},
11115     {"bits": [11, 11], "name": "POLY_OFFSET_FRONT_ENABLE"},
11116     {"bits": [12, 12], "name": "POLY_OFFSET_BACK_ENABLE"},
11117     {"bits": [13, 13], "name": "POLY_OFFSET_PARA_ENABLE"},
11118     {"bits": [16, 16], "name": "VTX_WINDOW_OFFSET_ENABLE"},
11119     {"bits": [19, 19], "name": "PROVOKING_VTX_LAST"},
11120     {"bits": [20, 20], "name": "PERSP_CORR_DIS"},
11121     {"bits": [21, 21], "name": "MULTI_PRIM_IB_ENA"}
11126     {"bits": [0, 0], "name": "PIX_CENTER"},
11127     {"bits": [1, 2], "enum_ref": "PA_SU_VTX_CNTL__ROUND_MODE", "name": "ROUND_MODE"},
11128     {"bits": [3, 5], "enum_ref": "QUANT_MODE", "name": "QUANT_MODE"}
11133     {"bits": [0, 7], "name": "PERFCOUNTER_SELECT"}
11138     {"bits": [0, 0], "name": "PERFMON_CLOCK_STATE"}
11143     {"bits": [0, 2], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"},
11144     {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"}
11149     {"bits": [0, 7], "name": "PERFMON_SAMPLE_DELAY"},
11150     {"bits": [8, 31], "name": "RESERVED"}
11155     {"bits": [0, 11], "name": "RESERVED1"},
11156     {"bits": [12, 13], "name": "PERFMON_RING_MODE"},
11157     {"bits": [14, 15], "name": "RESERVED"},
11158     {"bits": [16, 31], "name": "PERFMON_SAMPLE_INTERVAL"}
11163     {"bits": [0, 15], "name": "RING_BASE_HI"},
11164     {"bits": [16, 31], "name": "RESERVED"}
11169     {"bits": [0, 7], "name": "PERFMON_SEGMENT_SIZE"},
11170     {"bits": [8, 10], "name": "RESERVED1"},
11171     {"bits": [11, 15], "name": "GLOBAL_NUM_LINE"},
11172     {"bits": [16, 20], "name": "SE0_NUM_LINE"},
11173     {"bits": [21, 25], "name": "SE1_NUM_LINE"},
11174     {"bits": [26, 30], "name": "SE2_NUM_LINE"},
11175     {"bits": [31, 31], "name": "RESERVED"}
11180     {"bits": [0, 7], "name": "OBSOLETE_UMSK"},
11181     {"bits": [16, 17], "name": "OBSOLETE_SWAP"}
11186     {"bits": [0, 0], "name": "PERSP_CENTER_CNTL"},
11187     {"bits": [4, 4], "name": "PERSP_CENTROID_CNTL"},
11188     {"bits": [8, 8], "name": "LINEAR_CENTER_CNTL"},
11189     {"bits": [12, 12], "name": "LINEAR_CENTROID_CNTL"},
11190     {"bits": [16, 17], "name": "POS_FLOAT_LOCATION"},
11191     {"bits": [20, 20], "name": "POS_FLOAT_ULC"},
11192     {"bits": [24, 24], "name": "FRONT_FACE_ALL_BITS"}
11197     {"bits": [0, 20], "name": "GPR_WRITE_PRIORITY"},
11198     {"bits": [21, 23], "name": "EXP_PRIORITY_ORDER"},
11199     {"bits": [24, 24], "name": "ENABLE_SQG_TOP_EVENTS"},
11200     {"bits": [25, 25], "name": "ENABLE_SQG_BOP_EVENTS"},
11201     {"bits": [26, 26], "name": "RSRC_MGMT_RESET"},
11202     {"bits": [27, 27], "name": "TTRACE_STALL_ALL"}
11207     {"bits": [0, 0], "name": "FLAT_SHADE_ENA"},
11208     {"bits": [1, 1], "name": "PNT_SPRITE_ENA"},
11209     {"bits": [2, 4], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_X"},
11210     {"bits": [5, 7], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Y"},
11211     {"bits": [8, 10], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Z"},
11212     {"bits": [11, 13], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_W"},
11213     {"bits": [14, 14], "name": "PNT_SPRITE_TOP_1"}
11218     {"bits": [0, 7], "name": "PERF_SEL"}
11223     {"bits": [0, 3], "name": "BIN0_MIN"},
11224     {"bits": [4, 7], "name": "BIN0_MAX"},
11225     {"bits": [8, 11], "name": "BIN1_MIN"},
11226     {"bits": [12, 15], "name": "BIN1_MAX"},
11227     {"bits": [16, 19], "name": "BIN2_MIN"},
11228     {"bits": [20, 23], "name": "BIN2_MAX"},
11229     {"bits": [24, 27], "name": "BIN3_MIN"},
11230     {"bits": [28, 31], "name": "BIN3_MAX"}
11235     {"bits": [0, 5], "name": "OFFSET"},
11236     {"bits": [8, 9], "name": "DEFAULT_VAL"},
11237     {"bits": [10, 10], "name": "FLAT_SHADE"},
11238     {"bits": [13, 16], "name": "CYL_WRAP"},
11239     {"bits": [17, 17], "name": "PT_SPRITE_TEX"},
11240     {"bits": [18, 18], "name": "DUP"},
11241     {"bits": [19, 19], "name": "FP16_INTERP_MODE"},
11242     {"bits": [20, 20], "name": "USE_DEFAULT_ATTR1"},
11243     {"bits": [21, 22], "name": "DEFAULT_VAL_ATTR1"},
11244     {"bits": [23, 23], "name": "PT_SPRITE_TEX_ATTR1"},
11245     {"bits": [24, 24], "name": "ATTR0_VALID"},
11246     {"bits": [25, 25], "name": "ATTR1_VALID"}
11251     {"bits": [0, 5], "name": "OFFSET"},
11252     {"bits": [8, 9], "name": "DEFAULT_VAL"},
11253     {"bits": [10, 10], "name": "FLAT_SHADE"},
11254     {"bits": [18, 18], "name": "DUP"},
11255     {"bits": [19, 19], "name": "FP16_INTERP_MODE"},
11256     {"bits": [20, 20], "name": "USE_DEFAULT_ATTR1"},
11257     {"bits": [21, 22], "name": "DEFAULT_VAL_ATTR1"},
11258     {"bits": [24, 24], "name": "ATTR0_VALID"},
11259     {"bits": [25, 25], "name": "ATTR1_VALID"}
11264     {"bits": [0, 0], "name": "PERSP_SAMPLE_ENA"},
11265     {"bits": [1, 1], "name": "PERSP_CENTER_ENA"},
11266     {"bits": [2, 2], "name": "PERSP_CENTROID_ENA"},
11267     {"bits": [3, 3], "name": "PERSP_PULL_MODEL_ENA"},
11268     {"bits": [4, 4], "name": "LINEAR_SAMPLE_ENA"},
11269     {"bits": [5, 5], "name": "LINEAR_CENTER_ENA"},
11270     {"bits": [6, 6], "name": "LINEAR_CENTROID_ENA"},
11271     {"bits": [7, 7], "name": "LINE_STIPPLE_TEX_ENA"},
11272     {"bits": [8, 8], "name": "POS_X_FLOAT_ENA"},
11273     {"bits": [9, 9], "name": "POS_Y_FLOAT_ENA"},
11274     {"bits": [10, 10], "name": "POS_Z_FLOAT_ENA"},
11275     {"bits": [11, 11], "name": "POS_W_FLOAT_ENA"},
11276     {"bits": [12, 12], "name": "FRONT_FACE_ENA"},
11277     {"bits": [13, 13], "name": "ANCILLARY_ENA"},
11278     {"bits": [14, 14], "name": "SAMPLE_COVERAGE_ENA"},
11279     {"bits": [15, 15], "name": "POS_FIXED_PT_ENA"}
11284     {"bits": [0, 5], "name": "NUM_INTERP"},
11285     {"bits": [6, 6], "name": "PARAM_GEN"},
11286     {"bits": [14, 14], "name": "BC_OPTIMIZE_DISABLE"}
11291     {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL0_EXPORT_FORMAT"},
11292     {"bits": [4, 7], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL1_EXPORT_FORMAT"},
11293     {"bits": [8, 11], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL2_EXPORT_FORMAT"},
11294     {"bits": [12, 15], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL3_EXPORT_FORMAT"},
11295     {"bits": [16, 19], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL4_EXPORT_FORMAT"},
11296     {"bits": [20, 23], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL5_EXPORT_FORMAT"},
11297     {"bits": [24, 27], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL6_EXPORT_FORMAT"},
11298     {"bits": [28, 31], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL7_EXPORT_FORMAT"}
11303     {"bits": [0, 5], "name": "LIMIT"}
11308     {"bits": [0, 5], "name": "VGPRS"},
11309     {"bits": [6, 9], "name": "SGPRS"},
11310     {"bits": [10, 11], "name": "PRIORITY"},
11311     {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
11312     {"bits": [20, 20], "name": "PRIV"},
11313     {"bits": [21, 21], "name": "DX10_CLAMP"},
11314     {"bits": [22, 22], "name": "DEBUG_MODE"},
11315     {"bits": [23, 23], "name": "IEEE_MODE"},
11316     {"bits": [24, 24], "name": "CU_GROUP_ENABLE"},
11317     {"bits": [25, 27], "name": "CACHE_CTL"},
11318     {"bits": [28, 28], "name": "CDBG_USER"}
11323     {"bits": [0, 5], "name": "VGPRS"},
11324     {"bits": [6, 9], "name": "SGPRS"},
11325     {"bits": [10, 11], "name": "PRIORITY"},
11326     {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
11327     {"bits": [20, 20], "name": "PRIV"},
11328     {"bits": [21, 21], "name": "DX10_CLAMP"},
11329     {"bits": [22, 22], "name": "DEBUG_MODE"},
11330     {"bits": [23, 23], "name": "IEEE_MODE"},
11331     {"bits": [24, 26], "name": "CACHE_CTL"},
11332     {"bits": [27, 27], "name": "CDBG_USER"}
11337     {"bits": [0, 5], "name": "VGPRS"},
11338     {"bits": [6, 9], "name": "SGPRS"},
11339     {"bits": [10, 11], "name": "PRIORITY"},
11340     {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
11341     {"bits": [20, 20], "name": "PRIV"},
11342     {"bits": [21, 21], "name": "DX10_CLAMP"},
11343     {"bits": [22, 22], "name": "DEBUG_MODE"},
11344     {"bits": [23, 23], "name": "IEEE_MODE"},
11345     {"bits": [24, 25], "name": "VGPR_COMP_CNT"},
11346     {"bits": [26, 28], "name": "CACHE_CTL"},
11347     {"bits": [29, 29], "name": "CDBG_USER"}
11352     {"bits": [0, 5], "name": "VGPRS"},
11353     {"bits": [6, 9], "name": "SGPRS"},
11354     {"bits": [10, 11], "name": "PRIORITY"},
11355     {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
11356     {"bits": [20, 20], "name": "PRIV"},
11357     {"bits": [21, 21], "name": "DX10_CLAMP"},
11358     {"bits": [22, 22], "name": "DEBUG_MODE"},
11359     {"bits": [23, 23], "name": "IEEE_MODE"},
11360     {"bits": [24, 24], "name": "CU_GROUP_DISABLE"},
11361     {"bits": [25, 27], "name": "CACHE_CTL"},
11362     {"bits": [28, 28], "name": "CDBG_USER"}
11367     {"bits": [0, 5], "name": "VGPRS"},
11368     {"bits": [6, 9], "name": "SGPRS"},
11369     {"bits": [10, 11], "name": "PRIORITY"},
11370     {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
11371     {"bits": [20, 20], "name": "PRIV"},
11372     {"bits": [21, 21], "name": "DX10_CLAMP"},
11373     {"bits": [22, 22], "name": "DEBUG_MODE"},
11374     {"bits": [23, 23], "name": "IEEE_MODE"},
11375     {"bits": [24, 25], "name": "VGPR_COMP_CNT"},
11376     {"bits": [26, 26], "name": "CU_GROUP_ENABLE"},
11377     {"bits": [27, 29], "name": "CACHE_CTL"},
11378     {"bits": [30, 30], "name": "CDBG_USER"}
11383     {"bits": [0, 0], "name": "SCRATCH_EN"},
11384     {"bits": [1, 5], "name": "USER_SGPR"},
11385     {"bits": [6, 6], "name": "TRAP_PRESENT"},
11386     {"bits": [7, 7], "name": "OC_LDS_EN"},
11387     {"bits": [8, 16], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
11388     {"bits": [20, 28], "name": "LDS_SIZE"}
11393     {"bits": [0, 0], "name": "SCRATCH_EN"},
11394     {"bits": [1, 5], "name": "USER_SGPR"},
11395     {"bits": [6, 6], "name": "TRAP_PRESENT"},
11396     {"bits": [7, 15], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
11401     {"bits": [0, 0], "name": "SCRATCH_EN"},
11402     {"bits": [1, 5], "name": "USER_SGPR"},
11403     {"bits": [6, 6], "name": "TRAP_PRESENT"},
11404     {"bits": [7, 7], "name": "OC_LDS_EN"},
11405     {"bits": [8, 8], "name": "TG_SIZE_EN"},
11406     {"bits": [9, 17], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
11411     {"bits": [0, 0], "name": "SCRATCH_EN"},
11412     {"bits": [1, 5], "name": "USER_SGPR"},
11413     {"bits": [6, 6], "name": "TRAP_PRESENT"},
11414     {"bits": [7, 15], "name": "LDS_SIZE"},
11415     {"bits": [16, 24], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
11420     {"bits": [0, 0], "name": "SCRATCH_EN"},
11421     {"bits": [1, 5], "name": "USER_SGPR"},
11422     {"bits": [6, 6], "name": "TRAP_PRESENT"},
11423     {"bits": [7, 7], "name": "WAVE_CNT_EN"},
11424     {"bits": [8, 15], "name": "EXTRA_LDS_SIZE"},
11425     {"bits": [16, 24], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
11430     {"bits": [0, 0], "name": "SCRATCH_EN"},
11431     {"bits": [1, 5], "name": "USER_SGPR"},
11432     {"bits": [6, 6], "name": "TRAP_PRESENT"},
11433     {"bits": [7, 7], "name": "OC_LDS_EN"},
11434     {"bits": [8, 8], "name": "SO_BASE0_EN"},
11435     {"bits": [9, 9], "name": "SO_BASE1_EN"},
11436     {"bits": [10, 10], "name": "SO_BASE2_EN"},
11437     {"bits": [11, 11], "name": "SO_BASE3_EN"},
11438     {"bits": [12, 12], "name": "SO_EN"},
11439     {"bits": [13, 21], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
11440     {"bits": [24, 24], "name": "DISPATCH_DRAW_EN"}
11445     {"bits": [0, 15], "name": "CU_EN"},
11446     {"bits": [16, 21], "name": "WAVE_LIMIT"},
11447     {"bits": [22, 25], "name": "LOCK_LOW_THRESHOLD"},
11448     {"bits": [26, 31], "name": "GROUP_FIFO_DEPTH"}
11453     {"bits": [0, 5], "name": "WAVE_LIMIT"},
11454     {"bits": [6, 9], "name": "LOCK_LOW_THRESHOLD"},
11455     {"bits": [10, 15], "name": "GROUP_FIFO_DEPTH"}
11460     {"bits": [0, 15], "name": "CU_EN"},
11461     {"bits": [16, 21], "name": "WAVE_LIMIT"},
11462     {"bits": [22, 25], "name": "LOCK_LOW_THRESHOLD"}
11467     {"bits": [0, 3], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS0_EXPORT_FORMAT"},
11468     {"bits": [4, 7], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS1_EXPORT_FORMAT"},
11469     {"bits": [8, 11], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS2_EXPORT_FORMAT"},
11470     {"bits": [12, 15], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS3_EXPORT_FORMAT"}
11475     {"bits": [0, 7], "name": "MEM_BASE"}
11480     {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "Z_EXPORT_FORMAT"}
11485     {"bits": [1, 5], "name": "VS_EXPORT_COUNT"},
11486     {"bits": [6, 6], "name": "VS_HALF_PACK"}
11491     {"bits": [0, 0], "name": "TARGET_INST"},
11492     {"bits": [1, 1], "name": "TARGET_DATA"},
11493     {"bits": [2, 2], "name": "INVALIDATE"},
11494     {"bits": [3, 3], "name": "WRITEBACK"},
11495     {"bits": [4, 4], "name": "VOL"},
11496     {"bits": [16, 16], "name": "COMPLETE"}
11501     {"bits": [0, 0], "name": "DWB"},
11502     {"bits": [1, 1], "name": "DIRTY"}
11507     {"bits": [0, 15], "name": "BASE_ADDRESS_HI"},
11508     {"bits": [16, 29], "name": "STRIDE"},
11509     {"bits": [30, 30], "name": "CACHE_SWIZZLE"},
11510     {"bits": [31, 31], "name": "SWIZZLE_ENABLE"}
11515     {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"},
11516     {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"},
11517     {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"},
11518     {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"},
11519     {"bits": [12, 14], "enum_ref": "BUF_NUM_FORMAT", "name": "NUM_FORMAT"},
11520     {"bits": [15, 18], "enum_ref": "BUF_DATA_FORMAT", "name": "DATA_FORMAT"},
11521     {"bits": [19, 20], "name": "ELEMENT_SIZE"},
11522     {"bits": [21, 22], "name": "INDEX_STRIDE"},
11523     {"bits": [23, 23], "name": "ADD_TID_ENABLE"},
11524     {"bits": [24, 24], "name": "ATC"},
11525     {"bits": [25, 25], "name": "HASH_ENABLE"},
11526     {"bits": [26, 26], "name": "HEAP"},
11527     {"bits": [27, 29], "name": "MTYPE"},
11528     {"bits": [30, 31], "enum_ref": "SQ_RSRC_BUF_TYPE", "name": "TYPE"}
11533     {"bits": [0, 7], "name": "BASE_ADDRESS_HI"},
11534     {"bits": [8, 19], "name": "MIN_LOD"},
11535     {"bits": [20, 25], "enum_ref": "IMG_DATA_FORMAT", "name": "DATA_FORMAT"},
11536     {"bits": [26, 29], "enum_ref": "IMG_NUM_FORMAT", "name": "NUM_FORMAT"},
11537     {"bits": [30, 31], "name": "MTYPE"}
11542     {"bits": [0, 13], "name": "WIDTH"},
11543     {"bits": [14, 27], "name": "HEIGHT"},
11544     {"bits": [28, 30], "name": "PERF_MOD"},
11545     {"bits": [31, 31], "name": "INTERLACED"}
11550     {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"},
11551     {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"},
11552     {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"},
11553     {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"},
11554     {"bits": [12, 15], "name": "BASE_LEVEL"},
11555     {"bits": [16, 19], "name": "LAST_LEVEL"},
11556     {"bits": [20, 24], "name": "TILING_INDEX"},
11557     {"bits": [25, 25], "name": "POW2_PAD"},
11558     {"bits": [26, 26], "name": "MTYPE"},
11559     {"bits": [27, 27], "name": "ATC"},
11560     {"bits": [28, 31], "enum_ref": "SQ_RSRC_IMG_TYPE", "name": "TYPE"}
11565     {"bits": [0, 12], "name": "DEPTH"},
11566     {"bits": [13, 26], "name": "PITCH"}
11571     {"bits": [0, 12], "name": "BASE_ARRAY"},
11572     {"bits": [13, 25], "name": "LAST_ARRAY"}
11577     {"bits": [0, 11], "name": "MIN_LOD_WARN"},
11578     {"bits": [12, 19], "name": "COUNTER_BANK_ID"},
11579     {"bits": [20, 20], "name": "LOD_HDW_CNT_EN"},
11580     {"bits": [21, 21], "name": "COMPRESSION_EN"},
11581     {"bits": [22, 22], "name": "ALPHA_IS_ON_MSB"},
11582     {"bits": [23, 23], "name": "COLOR_TRANSFORM"},
11583     {"bits": [24, 27], "name": "LOST_ALPHA_BITS"},
11584     {"bits": [28, 31], "name": "LOST_COLOR_BITS"}
11589     {"bits": [0, 2], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_X"},
11590     {"bits": [3, 5], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Y"},
11591     {"bits": [6, 8], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Z"},
11592     {"bits": [9, 11], "name": "MAX_ANISO_RATIO"},
11593     {"bits": [12, 14], "enum_ref": "SQ_TEX_DEPTH_COMPARE", "name": "DEPTH_COMPARE_FUNC"},
11594     {"bits": [15, 15], "name": "FORCE_UNNORMALIZED"},
11595     {"bits": [16, 18], "name": "ANISO_THRESHOLD"},
11596     {"bits": [19, 19], "name": "MC_COORD_TRUNC"},
11597     {"bits": [20, 20], "name": "FORCE_DEGAMMA"},
11598     {"bits": [21, 26], "name": "ANISO_BIAS"},
11599     {"bits": [27, 27], "name": "TRUNC_COORD"},
11600     {"bits": [28, 28], "name": "DISABLE_CUBE_WRAP"},
11601     {"bits": [29, 30], "enum_ref": "SQ_IMG_FILTER_TYPE", "name": "FILTER_MODE"},
11602     {"bits": [31, 31], "name": "COMPAT_MODE"}
11607     {"bits": [0, 11], "name": "MIN_LOD"},
11608     {"bits": [12, 23], "name": "MAX_LOD"},
11609     {"bits": [24, 27], "name": "PERF_MIP"},
11610     {"bits": [28, 31], "name": "PERF_Z"}
11615     {"bits": [0, 13], "name": "LOD_BIAS"},
11616     {"bits": [14, 19], "name": "LOD_BIAS_SEC"},
11617     {"bits": [20, 21], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MAG_FILTER"},
11618     {"bits": [22, 23], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MIN_FILTER"},
11619     {"bits": [24, 25], "enum_ref": "SQ_TEX_Z_FILTER", "name": "Z_FILTER"},
11620     {"bits": [26, 27], "enum_ref": "SQ_TEX_MIP_FILTER", "name": "MIP_FILTER"},
11621     {"bits": [28, 28], "name": "MIP_POINT_PRECLAMP"},
11622     {"bits": [29, 29], "name": "DISABLE_LSB_CEIL"},
11623     {"bits": [30, 30], "name": "FILTER_PREC_FIX"},
11624     {"bits": [31, 31], "name": "ANISO_OVERRIDE"}
11629     {"bits": [0, 11], "name": "BORDER_COLOR_PTR"},
11630     {"bits": [29, 29], "name": "UPGRADED_DEPTH"},
11631     {"bits": [30, 31], "enum_ref": "SQ_TEX_BORDER_COLOR", "name": "BORDER_COLOR_TYPE"}
11636     {"bits": [0, 8], "name": "PERF_SEL"},
11637     {"bits": [12, 15], "name": "SQC_BANK_MASK"},
11638     {"bits": [16, 19], "name": "SQC_CLIENT_MASK"},
11639     {"bits": [20, 23], "name": "SPM_MODE"},
11640     {"bits": [24, 27], "name": "SIMD_MASK"},
11641     {"bits": [28, 31], "name": "PERF_MODE"}
11646     {"bits": [0, 0], "name": "PS_EN"},
11647     {"bits": [1, 1], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"},
11648     {"bits": [2, 2], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"},
11649     {"bits": [3, 3], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"},
11650     {"bits": [4, 4], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"},
11651     {"bits": [5, 5], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"},
11652     {"bits": [6, 6], "name": "CS_EN"},
11653     {"bits": [8, 12], "name": "CNTR_RATE"},
11654     {"bits": [13, 13], "name": "DISABLE_FLUSH"}
11659     {"bits": [0, 0], "name": "FORCE_EN"}
11664     {"bits": [0, 15], "name": "SH0_MASK"},
11665     {"bits": [16, 31], "name": "SH1_MASK"}
11670     {"bits": [0, 3], "name": "ADDR_HI"}
11675     {"bits": [31, 31], "name": "RESET_BUFFER"}
11680     {"bits": [0, 2], "name": "HIWATER"}
11685     {"bits": [0, 4], "name": "CU_SEL"},
11686     {"bits": [5, 5], "name": "SH_SEL"},
11687     {"bits": [7, 7], "name": "REG_STALL_EN"},
11688     {"bits": [8, 11], "name": "SIMD_EN"},
11689     {"bits": [12, 13], "name": "VM_ID_MASK"},
11690     {"bits": [14, 14], "name": "SPI_STALL_EN"},
11691     {"bits": [15, 15], "name": "SQ_STALL_EN"},
11692     {"bits": [16, 31], "name": "RANDOM_SEED"}
11697     {"bits": [0, 2], "name": "MASK_PS"},
11698     {"bits": [3, 5], "name": "MASK_VS"},
11699     {"bits": [6, 8], "name": "MASK_GS"},
11700     {"bits": [9, 11], "name": "MASK_ES"},
11701     {"bits": [12, 14], "name": "MASK_HS"},
11702     {"bits": [15, 17], "name": "MASK_LS"},
11703     {"bits": [18, 20], "name": "MASK_CS"},
11704     {"bits": [21, 22], "name": "MODE"},
11705     {"bits": [23, 24], "name": "CAPTURE_MODE"},
11706     {"bits": [25, 25], "name": "AUTOFLUSH_EN"},
11707     {"bits": [26, 26], "name": "PRIV"},
11708     {"bits": [27, 28], "name": "ISSUE_MASK"},
11709     {"bits": [29, 29], "name": "TEST_MODE"},
11710     {"bits": [30, 30], "name": "INTERRUPT_EN"},
11711     {"bits": [31, 31], "name": "WRAP"}
11716     {"bits": [0, 21], "name": "SIZE"}
11721     {"bits": [0, 9], "name": "FINISH_PENDING"},
11722     {"bits": [16, 25], "name": "FINISH_DONE"},
11723     {"bits": [29, 29], "name": "NEW_BUF"},
11724     {"bits": [30, 30], "name": "BUSY"},
11725     {"bits": [31, 31], "name": "FULL"}
11730     {"bits": [0, 15], "name": "TOKEN_MASK"},
11731     {"bits": [16, 23], "name": "REG_MASK"},
11732     {"bits": [24, 24], "name": "REG_DROP_ON_STALL"}
11737     {"bits": [0, 29], "name": "WPTR"},
11738     {"bits": [30, 31], "name": "READ_OFFSET"}
11743     {"bits": [0, 5], "name": "VGPR_BASE"},
11744     {"bits": [8, 13], "name": "VGPR_SIZE"},
11745     {"bits": [16, 21], "name": "SGPR_BASE"},
11746     {"bits": [24, 27], "name": "SGPR_SIZE"}
11751     {"bits": [0, 3], "name": "WAVE_ID"},
11752     {"bits": [4, 5], "name": "SIMD_ID"},
11753     {"bits": [6, 7], "name": "PIPE_ID"},
11754     {"bits": [8, 11], "name": "CU_ID"},
11755     {"bits": [12, 12], "name": "SH_ID"},
11756     {"bits": [13, 14], "name": "SE_ID"},
11757     {"bits": [16, 19], "name": "TG_ID"},
11758     {"bits": [20, 23], "name": "VM_ID"},
11759     {"bits": [24, 26], "name": "QUEUE_ID"},
11760     {"bits": [27, 29], "name": "STATE_ID"},
11761     {"bits": [30, 31], "name": "ME_ID"}
11766     {"bits": [0, 2], "name": "IBUF_ST"},
11767     {"bits": [3, 3], "name": "PC_INVALID"},
11768     {"bits": [4, 4], "name": "NEED_NEXT_DW"},
11769     {"bits": [5, 7], "name": "NO_PREFETCH_CNT"},
11770     {"bits": [8, 9], "name": "IBUF_RPTR"},
11771     {"bits": [10, 11], "name": "IBUF_WPTR"},
11772     {"bits": [16, 19], "name": "INST_STR_ST"},
11773     {"bits": [20, 23], "name": "MISC_CNT"},
11774     {"bits": [24, 25], "name": "ECC_ST"},
11775     {"bits": [26, 26], "name": "IS_HYB"},
11776     {"bits": [27, 28], "name": "HYB_CNT"},
11777     {"bits": [29, 29], "name": "KILL"},
11778     {"bits": [30, 30], "name": "NEED_KILL_IFETCH"}
11783     {"bits": [0, 0], "name": "IXNACK"},
11784     {"bits": [1, 1], "name": "XNACK"},
11785     {"bits": [2, 2], "name": "TA_NEED_RESET"},
11786     {"bits": [4, 7], "name": "XCNT"},
11787     {"bits": [8, 11], "name": "QCNT"}
11792     {"bits": [0, 3], "name": "VM_CNT"},
11793     {"bits": [4, 6], "name": "EXP_CNT"},
11794     {"bits": [8, 11], "name": "LGKM_CNT"},
11795     {"bits": [12, 14], "name": "VALU_CNT"},
11796     {"bits": [15, 15], "name": "FIRST_REPLAY"},
11797     {"bits": [16, 19], "name": "RCNT"}
11802     {"bits": [0, 7], "name": "LDS_BASE"},
11803     {"bits": [12, 20], "name": "LDS_SIZE"}
11808     {"bits": [0, 3], "name": "FP_ROUND"},
11809     {"bits": [4, 7], "name": "FP_DENORM"},
11810     {"bits": [8, 8], "name": "DX10_CLAMP"},
11811     {"bits": [9, 9], "name": "IEEE"},
11812     {"bits": [10, 10], "name": "LOD_CLAMPED"},
11813     {"bits": [11, 11], "name": "DEBUG_EN"},
11814     {"bits": [12, 20], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
11815     {"bits": [27, 27], "name": "GPR_IDX_EN"},
11816     {"bits": [28, 28], "name": "VSKIP"},
11817     {"bits": [29, 31], "name": "CSP"}
11822     {"bits": [0, 7], "name": "PC_HI"}
11827     {"bits": [0, 0], "name": "SCC"},
11828     {"bits": [1, 2], "name": "SPI_PRIO"},
11829     {"bits": [3, 4], "name": "USER_PRIO"},
11830     {"bits": [5, 5], "name": "PRIV"},
11831     {"bits": [6, 6], "name": "TRAP_EN"},
11832     {"bits": [7, 7], "name": "TTRACE_EN"},
11833     {"bits": [8, 8], "name": "EXPORT_RDY"},
11834     {"bits": [9, 9], "name": "EXECZ"},
11835     {"bits": [10, 10], "name": "VCCZ"},
11836     {"bits": [11, 11], "name": "IN_TG"},
11837     {"bits": [12, 12], "name": "IN_BARRIER"},
11838     {"bits": [13, 13], "name": "HALT"},
11839     {"bits": [14, 14], "name": "TRAP"},
11840     {"bits": [15, 15], "name": "TTRACE_CU_EN"},
11841     {"bits": [16, 16], "name": "VALID"},
11842     {"bits": [17, 17], "name": "ECC_ERR"},
11843     {"bits": [18, 18], "name": "SKIP_EXPORT"},
11844     {"bits": [19, 19], "name": "PERF_EN"},
11845     {"bits": [20, 20], "name": "COND_DBG_USER"},
11846     {"bits": [21, 21], "name": "COND_DBG_SYS"},
11847     {"bits": [22, 22], "name": "ALLOW_REPLAY"},
11848     {"bits": [23, 23], "name": "INST_ATC"},
11849     {"bits": [27, 27], "name": "MUST_EXPORT"}
11854     {"bits": [0, 7], "name": "ADDR_HI"}
11859     {"bits": [0, 8], "enum_ref": "EXCP_EN", "name": "EXCP"},
11860     {"bits": [10, 10], "name": "SAVECTX"},
11861     {"bits": [16, 21], "name": "EXCP_CYCLE"},
11862     {"bits": [29, 31], "name": "DP_RATE"}
11867     {"bits": [0, 9], "name": "PERFCOUNTER_SELECT"},
11868     {"bits": [10, 19], "name": "PERFCOUNTER_SELECT1"},
11869     {"bits": [20, 23], "name": "CNTR_MODE"}
11874     {"bits": [0, 9], "name": "PERFCOUNTER_SELECT2"},
11875     {"bits": [10, 19], "name": "PERFCOUNTER_SELECT3"}
11880     {"bits": [0, 7], "name": "ADDRESS"}
11885     {"bits": [0, 9], "name": "PERF_SEL2"},
11886     {"bits": [10, 19], "name": "PERF_SEL3"},
11887     {"bits": [24, 27], "name": "PERF_MODE2"},
11888     {"bits": [28, 31], "name": "PERF_MODE3"}
11893     {"bits": [0, 9], "name": "PERF_SEL"},
11894     {"bits": [20, 23], "name": "CNTR_MODE"},
11895     {"bits": [28, 31], "name": "PERF_MODE"}
11900     {"bits": [0, 7], "name": "PERF_SEL"},
11901     {"bits": [10, 17], "name": "PERF_SEL1"},
11902     {"bits": [20, 23], "name": "CNTR_MODE"},
11903     {"bits": [24, 27], "name": "PERF_MODE1"},
11904     {"bits": [28, 31], "name": "PERF_MODE"}
11909     {"bits": [0, 7], "name": "PERF_SEL2"},
11910     {"bits": [10, 17], "name": "PERF_SEL3"},
11911     {"bits": [24, 27], "name": "PERF_MODE3"},
11912     {"bits": [28, 31], "name": "PERF_MODE2"}
11917     {"bits": [0, 7], "name": "BASE_ADDR"}
11922     {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"},
11923     {"bits": [2, 3], "enum_ref": "VGT_DMA_SWAP_MODE", "name": "SWAP_MODE"},
11924     {"bits": [4, 5], "enum_ref": "VGT_DMA_BUF_TYPE", "name": "BUF_TYPE"},
11925     {"bits": [6, 6], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"},
11926     {"bits": [9, 9], "name": "NOT_EOP"},
11927     {"bits": [10, 10], "name": "REQ_PATH"},
11928     {"bits": [11, 12], "name": "MTYPE"}
11933     {"bits": [0, 1], "enum_ref": "VGT_DI_SOURCE_SELECT", "name": "SOURCE_SELECT"},
11934     {"bits": [2, 3], "enum_ref": "VGT_DI_MAJOR_MODE_SELECT", "name": "MAJOR_MODE"},
11935     {"bits": [4, 4], "name": "SPRITE_EN_R6XX"},
11936     {"bits": [5, 5], "name": "NOT_EOP"},
11937     {"bits": [6, 6], "name": "USE_OPAQUE"}
11942     {"bits": [0, 14], "name": "ITEMSIZE"}
11947     {"bits": [0, 10], "name": "ES_PER_GS"}
11952     {"bits": [0, 27], "name": "ADDRESS_LOW"}
11957     {"bits": [0, 5], "enum_ref": "VGT_EVENT_TYPE", "name": "EVENT_TYPE"},
11958     {"bits": [18, 26], "name": "ADDRESS_HI"},
11959     {"bits": [27, 27], "name": "EXTENDED_EVENT"}
11964     {"bits": [0, 3], "name": "DECR"}
11969     {"bits": [0, 3], "name": "FIRST_DECR"}
11974     {"bits": [0, 4], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"},
11975     {"bits": [14, 14], "name": "RETAIN_ORDER"},
11976     {"bits": [15, 15], "name": "RETAIN_QUADS"},
11977     {"bits": [16, 18], "name": "PRIM_ORDER"}
11982     {"bits": [0, 0], "name": "COMP_X_EN"},
11983     {"bits": [1, 1], "name": "COMP_Y_EN"},
11984     {"bits": [2, 2], "name": "COMP_Z_EN"},
11985     {"bits": [3, 3], "name": "COMP_W_EN"},
11986     {"bits": [8, 15], "name": "STRIDE"},
11987     {"bits": [16, 23], "name": "SHIFT"}
11992     {"bits": [0, 3], "name": "X_CONV"},
11993     {"bits": [4, 7], "name": "X_OFFSET"},
11994     {"bits": [8, 11], "name": "Y_CONV"},
11995     {"bits": [12, 15], "name": "Y_OFFSET"},
11996     {"bits": [16, 19], "name": "Z_CONV"},
11997     {"bits": [20, 23], "name": "Z_OFFSET"},
11998     {"bits": [24, 27], "name": "W_CONV"},
11999     {"bits": [28, 31], "name": "W_OFFSET"}
12004     {"bits": [0, 14], "name": "OFFSET"}
12009     {"bits": [0, 0], "name": "ENABLE"},
12010     {"bits": [2, 8], "name": "CNT"}
12015     {"bits": [0, 10], "name": "MAX_VERT_OUT"}
12020     {"bits": [0, 2], "enum_ref": "VGT_GS_MODE_TYPE", "name": "MODE"},
12021     {"bits": [3, 3], "name": "RESERVED_0"},
12022     {"bits": [4, 5], "enum_ref": "VGT_GS_CUT_MODE", "name": "CUT_MODE"},
12023     {"bits": [6, 10], "name": "RESERVED_1"},
12024     {"bits": [11, 11], "name": "GS_C_PACK_EN"},
12025     {"bits": [12, 12], "name": "RESERVED_2"},
12026     {"bits": [13, 13], "name": "ES_PASSTHRU"},
12027     {"bits": [14, 14], "name": "RESERVED_3"},
12028     {"bits": [15, 15], "name": "RESERVED_4"},
12029     {"bits": [16, 16], "name": "RESERVED_5"},
12030     {"bits": [17, 17], "name": "PARTIAL_THD_AT_EOI"},
12031     {"bits": [18, 18], "name": "SUPPRESS_CUTS"},
12032     {"bits": [19, 19], "name": "ES_WRITE_OPTIMIZE"},
12033     {"bits": [20, 20], "name": "GS_WRITE_OPTIMIZE"},
12034     {"bits": [21, 22], "name": "ONCHIP"}
12039     {"bits": [0, 10], "name": "ES_VERTS_PER_SUBGRP"},
12040     {"bits": [11, 21], "name": "GS_PRIMS_PER_SUBGRP"}
12045     {"bits": [0, 5], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE"},
12046     {"bits": [8, 13], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_1"},
12047     {"bits": [16, 21], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_2"},
12048     {"bits": [22, 27], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_3"},
12049     {"bits": [31, 31], "name": "UNIQUE_TYPE_PER_STREAM"}
12054     {"bits": [0, 10], "name": "GS_PER_ES"}
12059     {"bits": [0, 3], "name": "GS_PER_VS"}
12064     {"bits": [0, 1], "name": "TESS_MODE"}
12069     {"bits": [0, 7], "name": "REUSE_DEPTH"}
12074     {"bits": [0, 8], "name": "OFFCHIP_BUFFERING"},
12075     {"bits": [9, 10], "enum_ref": "VGT_HS_OFFCHIP_PARAM__OFFCHIP_GRANULARITY", "name": "OFFCHIP_GRANULARITY"}
12080     {"bits": [0, 7], "name": "NUM_PATCHES"},
12081     {"bits": [8, 13], "name": "HS_NUM_INPUT_CP"},
12082     {"bits": [14, 19], "name": "HS_NUM_OUTPUT_CP"}
12087     {"bits": [0, 0], "name": "RESET_EN"}
12092     {"bits": [0, 2], "name": "PATH_SELECT"}
12097     {"bits": [0, 6], "name": "DEALLOC_DIST"}
12102     {"bits": [0, 7], "name": "PERF_SEL"},
12103     {"bits": [28, 31], "name": "PERF_MODE"}
12108     {"bits": [0, 7], "name": "PERF_SEID_IGNORE_MASK"}
12113     {"bits": [0, 0], "name": "PRIMITIVEID_EN"},
12114     {"bits": [1, 1], "name": "DISABLE_RESET_ON_EOI"}
12119     {"bits": [0, 5], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"}
12124     {"bits": [0, 0], "name": "REUSE_OFF"}
12129     {"bits": [0, 1], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"},
12130     {"bits": [2, 2], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"},
12131     {"bits": [3, 4], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"},
12132     {"bits": [5, 5], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"},
12133     {"bits": [6, 7], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"},
12134     {"bits": [8, 8], "name": "DYNAMIC_HS"},
12135     {"bits": [9, 9], "name": "DISPATCH_DRAW_EN"},
12136     {"bits": [10, 10], "name": "DIS_DEALLOC_ACCUM_0"},
12137     {"bits": [11, 11], "name": "DIS_DEALLOC_ACCUM_1"},
12138     {"bits": [12, 12], "name": "VS_WAVE_ID_EN"}
12143     {"bits": [0, 3], "name": "STREAM_0_BUFFER_EN"},
12144     {"bits": [4, 7], "name": "STREAM_1_BUFFER_EN"},
12145     {"bits": [8, 11], "name": "STREAM_2_BUFFER_EN"},
12146     {"bits": [12, 15], "name": "STREAM_3_BUFFER_EN"}
12151     {"bits": [0, 0], "name": "STREAMOUT_0_EN"},
12152     {"bits": [1, 1], "name": "STREAMOUT_1_EN"},
12153     {"bits": [2, 2], "name": "STREAMOUT_2_EN"},
12154     {"bits": [3, 3], "name": "STREAMOUT_3_EN"},
12155     {"bits": [4, 6], "name": "RAST_STREAM"},
12156     {"bits": [8, 11], "name": "RAST_STREAM_MASK"},
12157     {"bits": [31, 31], "name": "USE_RAST_STREAM_MASK"}
12162     {"bits": [0, 8], "name": "VERTEX_STRIDE"}
12167     {"bits": [0, 9], "name": "STRIDE"}
12172     {"bits": [0, 7], "name": "ACCUM_ISOLINE"},
12173     {"bits": [8, 15], "name": "ACCUM_TRI"},
12174     {"bits": [16, 23], "name": "ACCUM_QUAD"}
12179     {"bits": [0, 1], "enum_ref": "VGT_TESS_TYPE", "name": "TYPE"},
12180     {"bits": [2, 4], "enum_ref": "VGT_TESS_PARTITION", "name": "PARTITIONING"},
12181     {"bits": [5, 7], "enum_ref": "VGT_TESS_TOPOLOGY", "name": "TOPOLOGY"},
12182     {"bits": [8, 8], "name": "RESERVED_REDUC_AXIS"},
12183     {"bits": [9, 9], "name": "DEPRECATED"},
12184     {"bits": [10, 13], "name": "NUM_DS_WAVES_PER_SIMD"},
12185     {"bits": [14, 14], "name": "DISABLE_DONUTS"},
12186     {"bits": [15, 15], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"},
12187     {"bits": [17, 18], "enum_ref": "VGT_DIST_MODE", "name": "DISTRIBUTION_MODE"},
12188     {"bits": [19, 20], "name": "MTYPE"}
12193     {"bits": [0, 15], "name": "SIZE"}
12198     {"bits": [0, 7], "name": "VTX_REUSE_DEPTH"}
12203     {"bits": [0, 0], "name": "VTX_CNT_EN"}