Lines Matching refs:name
5 {"name": "ARRAY_LINEAR_GENERAL", "value": 0},
6 {"name": "ARRAY_LINEAR_ALIGNED", "value": 1},
7 {"name": "ARRAY_1D_TILED_THIN1", "value": 2},
8 {"name": "ARRAY_1D_TILED_THICK", "value": 3},
9 {"name": "ARRAY_2D_TILED_THIN1", "value": 4},
10 {"name": "ARRAY_PRT_TILED_THIN1", "value": 5},
11 {"name": "ARRAY_PRT_2D_TILED_THIN1", "value": 6},
12 {"name": "ARRAY_2D_TILED_THICK", "value": 7},
13 {"name": "ARRAY_2D_TILED_XTHICK", "value": 8},
14 {"name": "ARRAY_PRT_TILED_THICK", "value": 9},
15 {"name": "ARRAY_PRT_2D_TILED_THICK", "value": 10},
16 {"name": "ARRAY_PRT_3D_TILED_THIN1", "value": 11},
17 {"name": "ARRAY_3D_TILED_THIN1", "value": 12},
18 {"name": "ARRAY_3D_TILED_THICK", "value": 13},
19 {"name": "ARRAY_3D_TILED_XTHICK", "value": 14},
20 {"name": "ARRAY_PRT_3D_TILED_THICK", "value": 15}
25 {"name": "BUF_DATA_FORMAT_INVALID", "value": 0},
26 {"name": "BUF_DATA_FORMAT_8", "value": 1},
27 {"name": "BUF_DATA_FORMAT_16", "value": 2},
28 {"name": "BUF_DATA_FORMAT_8_8", "value": 3},
29 {"name": "BUF_DATA_FORMAT_32", "value": 4},
30 {"name": "BUF_DATA_FORMAT_16_16", "value": 5},
31 {"name": "BUF_DATA_FORMAT_10_11_11", "value": 6},
32 {"name": "BUF_DATA_FORMAT_11_11_10", "value": 7},
33 {"name": "BUF_DATA_FORMAT_10_10_10_2", "value": 8},
34 {"name": "BUF_DATA_FORMAT_2_10_10_10", "value": 9},
35 {"name": "BUF_DATA_FORMAT_8_8_8_8", "value": 10},
36 {"name": "BUF_DATA_FORMAT_32_32", "value": 11},
37 {"name": "BUF_DATA_FORMAT_16_16_16_16", "value": 12},
38 {"name": "BUF_DATA_FORMAT_32_32_32", "value": 13},
39 {"name": "BUF_DATA_FORMAT_32_32_32_32", "value": 14},
40 {"name": "BUF_DATA_FORMAT_RESERVED_15", "value": 15}
45 {"name": "BUF_NUM_FORMAT_UNORM", "value": 0},
46 {"name": "BUF_NUM_FORMAT_SNORM", "value": 1},
47 {"name": "BUF_NUM_FORMAT_USCALED", "value": 2},
48 {"name": "BUF_NUM_FORMAT_SSCALED", "value": 3},
49 {"name": "BUF_NUM_FORMAT_UINT", "value": 4},
50 {"name": "BUF_NUM_FORMAT_SINT", "value": 5},
51 {"name": "BUF_NUM_FORMAT_RESERVED_6", "value": 6},
52 {"name": "BUF_NUM_FORMAT_FLOAT", "value": 7}
57 {"name": "ADDR_SURF_BANK_HEIGHT_1", "value": 0},
58 {"name": "ADDR_SURF_BANK_HEIGHT_2", "value": 1},
59 {"name": "ADDR_SURF_BANK_HEIGHT_4", "value": 2},
60 {"name": "ADDR_SURF_BANK_HEIGHT_8", "value": 3}
65 {"name": "ADDR_SURF_BANK_WIDTH_1", "value": 0},
66 {"name": "ADDR_SURF_BANK_WIDTH_2", "value": 1},
67 {"name": "ADDR_SURF_BANK_WIDTH_4", "value": 2},
68 {"name": "ADDR_SURF_BANK_WIDTH_8", "value": 3}
73 {"name": "BLEND_ZERO", "value": 0},
74 {"name": "BLEND_ONE", "value": 1},
75 {"name": "BLEND_SRC_COLOR", "value": 2},
76 {"name": "BLEND_ONE_MINUS_SRC_COLOR", "value": 3},
77 {"name": "BLEND_SRC_ALPHA", "value": 4},
78 {"name": "BLEND_ONE_MINUS_SRC_ALPHA", "value": 5},
79 {"name": "BLEND_DST_ALPHA", "value": 6},
80 {"name": "BLEND_ONE_MINUS_DST_ALPHA", "value": 7},
81 {"name": "BLEND_DST_COLOR", "value": 8},
82 {"name": "BLEND_ONE_MINUS_DST_COLOR", "value": 9},
83 {"name": "BLEND_SRC_ALPHA_SATURATE", "value": 10},
84 {"name": "BLEND_BOTH_SRC_ALPHA", "value": 11},
85 {"name": "BLEND_BOTH_INV_SRC_ALPHA", "value": 12},
86 {"name": "BLEND_CONSTANT_COLOR", "value": 13},
87 {"name": "BLEND_ONE_MINUS_CONSTANT_COLOR", "value": 14},
88 {"name": "BLEND_SRC1_COLOR", "value": 15},
89 {"name": "BLEND_INV_SRC1_COLOR", "value": 16},
90 {"name": "BLEND_SRC1_ALPHA", "value": 17},
91 {"name": "BLEND_INV_SRC1_ALPHA", "value": 18},
92 {"name": "BLEND_CONSTANT_ALPHA", "value": 19},
93 {"name": "BLEND_ONE_MINUS_CONSTANT_ALPHA", "value": 20}
98 {"name": "FORCE_OPT_AUTO", "value": 0},
99 {"name": "FORCE_OPT_DISABLE", "value": 1},
100 {"name": "FORCE_OPT_ENABLE_IF_SRC_A_0", "value": 2},
101 {"name": "FORCE_OPT_ENABLE_IF_SRC_RGB_0", "value": 3},
102 {"name": "FORCE_OPT_ENABLE_IF_SRC_ARGB_0", "value": 4},
103 {"name": "FORCE_OPT_ENABLE_IF_SRC_A_1", "value": 5},
104 {"name": "FORCE_OPT_ENABLE_IF_SRC_RGB_1", "value": 6},
105 {"name": "FORCE_OPT_ENABLE_IF_SRC_ARGB_1", "value": 7}
110 {"name": "CB_DISABLE", "value": 0},
111 {"name": "CB_NORMAL", "value": 1},
112 {"name": "CB_ELIMINATE_FAST_CLEAR", "value": 2},
113 {"name": "CB_RESOLVE", "value": 3},
114 {"name": "CB_DECOMPRESS", "value": 4},
115 {"name": "CB_FMASK_DECOMPRESS", "value": 5},
116 {"name": "CB_DCC_DECOMPRESS", "value": 6}
121 {"name": "CB_PERF_CLEAR_FILTER_SEL_NONCLEAR", "value": 0},
122 {"name": "CB_PERF_CLEAR_FILTER_SEL_CLEAR", "value": 1}
127 {"name": "CB_PERF_OP_FILTER_SEL_WRITE_ONLY", "value": 0},
128 {"name": "CB_PERF_OP_FILTER_SEL_NEEDS_DESTINATION", "value": 1},
129 {"name": "CB_PERF_OP_FILTER_SEL_RESOLVE", "value": 2},
130 {"name": "CB_PERF_OP_FILTER_SEL_DECOMPRESS", "value": 3},
131 {"name": "CB_PERF_OP_FILTER_SEL_FMASK_DECOMPRESS", "value": 4},
132 {"name": "CB_PERF_OP_FILTER_SEL_ELIMINATE_FAST_CLEAR", "value": 5}
137 {"name": "MAX_BLOCK_SIZE_64B", "value": 0},
138 {"name": "MAX_BLOCK_SIZE_128B", "value": 1},
139 {"name": "MAX_BLOCK_SIZE_256B", "value": 2}
144 {"name": "MIN_BLOCK_SIZE_32B", "value": 0},
145 {"name": "MIN_BLOCK_SIZE_64B", "value": 1}
150 {"name": "OUT", "value": 1},
151 {"name": "IN_0", "value": 2},
152 {"name": "IN_1", "value": 4},
153 {"name": "IN_10", "value": 8},
154 {"name": "IN_2", "value": 16},
155 {"name": "IN_20", "value": 32},
156 {"name": "IN_21", "value": 64},
157 {"name": "IN_210", "value": 128},
158 {"name": "IN_3", "value": 256},
159 {"name": "IN_30", "value": 512},
160 {"name": "IN_31", "value": 1024},
161 {"name": "IN_310", "value": 2048},
162 {"name": "IN_32", "value": 4096},
163 {"name": "IN_320", "value": 8192},
164 {"name": "IN_321", "value": 16384},
165 {"name": "IN_3210", "value": 32768}
170 {"name": "CP_PERFMON_ENABLE_MODE_ALWAYS_COUNT", "value": 0},
171 {"name": "CP_PERFMON_ENABLE_MODE_RESERVED_1", "value": 1},
172 {"name": "CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_TRUE", "value": 2},
173 {"name": "CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_FALSE", "value": 3}
178 {"name": "CP_PERFMON_STATE_DISABLE_AND_RESET", "value": 0},
179 {"name": "CP_PERFMON_STATE_START_COUNTING", "value": 1},
180 {"name": "CP_PERFMON_STATE_STOP_COUNTING", "value": 2},
181 {"name": "CP_PERFMON_STATE_RESERVED_3", "value": 3},
182 {"name": "CP_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM", "value": 4},
183 {"name": "CP_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM", "value": 5}
188 {"name": "CMASK_ADDR_TILED", "value": 0},
189 {"name": "CMASK_ADDR_LINEAR", "value": 1},
190 {"name": "CMASK_ADDR_COMPATIBLE", "value": 2}
195 {"name": "COLOR_INVALID", "value": 0},
196 {"name": "COLOR_8", "value": 1},
197 {"name": "COLOR_16", "value": 2},
198 {"name": "COLOR_8_8", "value": 3},
199 {"name": "COLOR_32", "value": 4},
200 {"name": "COLOR_16_16", "value": 5},
201 {"name": "COLOR_10_11_11", "value": 6},
202 {"name": "COLOR_11_11_10", "value": 7},
203 {"name": "COLOR_10_10_10_2", "value": 8},
204 {"name": "COLOR_2_10_10_10", "value": 9},
205 {"name": "COLOR_8_8_8_8", "value": 10},
206 {"name": "COLOR_32_32", "value": 11},
207 {"name": "COLOR_16_16_16_16", "value": 12},
208 {"name": "COLOR_RESERVED_13", "value": 13},
209 {"name": "COLOR_32_32_32_32", "value": 14},
210 {"name": "COLOR_RESERVED_15", "value": 15},
211 {"name": "COLOR_5_6_5", "value": 16},
212 {"name": "COLOR_1_5_5_5", "value": 17},
213 {"name": "COLOR_5_5_5_1", "value": 18},
214 {"name": "COLOR_4_4_4_4", "value": 19},
215 {"name": "COLOR_8_24", "value": 20},
216 {"name": "COLOR_24_8", "value": 21},
217 {"name": "COLOR_X24_8_32_FLOAT", "value": 22},
218 {"name": "COLOR_RESERVED_23", "value": 23},
219 {"name": "COLOR_RESERVED_24", "value": 24},
220 {"name": "COLOR_RESERVED_25", "value": 25},
221 {"name": "COLOR_RESERVED_26", "value": 26},
222 {"name": "COLOR_RESERVED_27", "value": 27},
223 {"name": "COLOR_RESERVED_28", "value": 28},
224 {"name": "COLOR_RESERVED_29", "value": 29},
225 {"name": "COLOR_RESERVED_30", "value": 30}
230 {"name": "COMB_DST_PLUS_SRC", "value": 0},
231 {"name": "COMB_SRC_MINUS_DST", "value": 1},
232 {"name": "COMB_MIN_DST_SRC", "value": 2},
233 {"name": "COMB_MAX_DST_SRC", "value": 3},
234 {"name": "COMB_DST_MINUS_SRC", "value": 4}
239 {"name": "FRAG_NEVER", "value": 0},
240 {"name": "FRAG_LESS", "value": 1},
241 {"name": "FRAG_EQUAL", "value": 2},
242 {"name": "FRAG_LEQUAL", "value": 3},
243 {"name": "FRAG_GREATER", "value": 4},
244 {"name": "FRAG_NOTEQUAL", "value": 5},
245 {"name": "FRAG_GEQUAL", "value": 6},
246 {"name": "FRAG_ALWAYS", "value": 7}
251 {"name": "EXPORT_ANY_Z", "value": 0},
252 {"name": "EXPORT_LESS_THAN_Z", "value": 1},
253 {"name": "EXPORT_GREATER_THAN_Z", "value": 2},
254 {"name": "EXPORT_RESERVED", "value": 3}
259 {"name": "PSLC_AUTO", "value": 0},
260 {"name": "PSLC_ON_HANG_ONLY", "value": 1},
261 {"name": "PSLC_ASAP", "value": 2},
262 {"name": "PSLC_COUNTDOWN", "value": 3}
267 {"name": "INVALID", "value": 1},
268 {"name": "INPUT_DENORMAL", "value": 2},
269 {"name": "DIVIDE_BY_ZERO", "value": 4},
270 {"name": "OVERFLOW", "value": 8},
271 {"name": "UNDERFLOW", "value": 16},
272 {"name": "INEXACT", "value": 32},
273 {"name": "INT_DIVIDE_BY_ZERO", "value": 64},
274 {"name": "ADDRESS_WATCH", "value": 128},
275 {"name": "MEMORY_VIOLATION", "value": 256}
280 {"name": "FP_32_DENORMS", "value": 48},
281 {"name": "FP_64_DENORMS", "value": 192},
282 {"name": "FP_ALL_DENORMS", "value": 240}
287 {"name": "FORCE_OFF", "value": 0},
288 {"name": "FORCE_ENABLE", "value": 1},
289 {"name": "FORCE_DISABLE", "value": 2},
290 {"name": "FORCE_RESERVED", "value": 3}
295 {"name": "IMG_DATA_FORMAT_INVALID", "value": 0},
296 {"name": "IMG_DATA_FORMAT_8", "value": 1},
297 {"name": "IMG_DATA_FORMAT_16", "value": 2},
298 {"name": "IMG_DATA_FORMAT_8_8", "value": 3},
299 {"name": "IMG_DATA_FORMAT_32", "value": 4},
300 {"name": "IMG_DATA_FORMAT_16_16", "value": 5},
301 {"name": "IMG_DATA_FORMAT_10_11_11", "value": 6},
302 {"name": "IMG_DATA_FORMAT_11_11_10", "value": 7},
303 {"name": "IMG_DATA_FORMAT_10_10_10_2", "value": 8},
304 {"name": "IMG_DATA_FORMAT_2_10_10_10", "value": 9},
305 {"name": "IMG_DATA_FORMAT_8_8_8_8", "value": 10},
306 {"name": "IMG_DATA_FORMAT_32_32", "value": 11},
307 {"name": "IMG_DATA_FORMAT_16_16_16_16", "value": 12},
308 {"name": "IMG_DATA_FORMAT_32_32_32", "value": 13},
309 {"name": "IMG_DATA_FORMAT_32_32_32_32", "value": 14},
310 {"name": "IMG_DATA_FORMAT_16_AS_32_32", "value": 15},
311 {"name": "IMG_DATA_FORMAT_5_6_5", "value": 16},
312 {"name": "IMG_DATA_FORMAT_1_5_5_5", "value": 17},
313 {"name": "IMG_DATA_FORMAT_5_5_5_1", "value": 18},
314 {"name": "IMG_DATA_FORMAT_4_4_4_4", "value": 19},
315 {"name": "IMG_DATA_FORMAT_8_24", "value": 20},
316 {"name": "IMG_DATA_FORMAT_24_8", "value": 21},
317 {"name": "IMG_DATA_FORMAT_X24_8_32", "value": 22},
318 {"name": "IMG_DATA_FORMAT_8_AS_8_8_8_8", "value": 23},
319 {"name": "IMG_DATA_FORMAT_ETC2_RGB", "value": 24},
320 {"name": "IMG_DATA_FORMAT_ETC2_RGBA", "value": 25},
321 {"name": "IMG_DATA_FORMAT_ETC2_R", "value": 26},
322 {"name": "IMG_DATA_FORMAT_ETC2_RG", "value": 27},
323 {"name": "IMG_DATA_FORMAT_ETC2_RGBA1", "value": 28},
324 {"name": "IMG_DATA_FORMAT_RESERVED_29", "value": 29},
325 {"name": "IMG_DATA_FORMAT_RESERVED_30", "value": 30},
326 {"name": "IMG_DATA_FORMAT_RESERVED_31", "value": 31},
327 {"name": "IMG_DATA_FORMAT_GB_GR", "value": 32},
328 {"name": "IMG_DATA_FORMAT_BG_RG", "value": 33},
329 {"name": "IMG_DATA_FORMAT_5_9_9_9", "value": 34},
330 {"name": "IMG_DATA_FORMAT_BC1", "value": 35},
331 {"name": "IMG_DATA_FORMAT_BC2", "value": 36},
332 {"name": "IMG_DATA_FORMAT_BC3", "value": 37},
333 {"name": "IMG_DATA_FORMAT_BC4", "value": 38},
334 {"name": "IMG_DATA_FORMAT_BC5", "value": 39},
335 {"name": "IMG_DATA_FORMAT_BC6", "value": 40},
336 {"name": "IMG_DATA_FORMAT_BC7", "value": 41},
337 {"name": "IMG_DATA_FORMAT_16_AS_16_16_16_16", "value": 42},
338 {"name": "IMG_DATA_FORMAT_16_AS_32_32_32_32", "value": 43},
339 {"name": "IMG_DATA_FORMAT_FMASK8_S2_F1", "value": 44},
340 {"name": "IMG_DATA_FORMAT_FMASK8_S4_F1", "value": 45},
341 {"name": "IMG_DATA_FORMAT_FMASK8_S8_F1", "value": 46},
342 {"name": "IMG_DATA_FORMAT_FMASK8_S2_F2", "value": 47},
343 {"name": "IMG_DATA_FORMAT_FMASK8_S4_F2", "value": 48},
344 {"name": "IMG_DATA_FORMAT_FMASK8_S4_F4", "value": 49},
345 {"name": "IMG_DATA_FORMAT_FMASK16_S16_F1", "value": 50},
346 {"name": "IMG_DATA_FORMAT_FMASK16_S8_F2", "value": 51},
347 {"name": "IMG_DATA_FORMAT_FMASK32_S16_F2", "value": 52},
348 {"name": "IMG_DATA_FORMAT_FMASK32_S8_F4", "value": 53},
349 {"name": "IMG_DATA_FORMAT_FMASK32_S8_F8", "value": 54},
350 {"name": "IMG_DATA_FORMAT_FMASK64_S16_F4", "value": 55},
351 {"name": "IMG_DATA_FORMAT_FMASK64_S16_F8", "value": 56},
352 {"name": "IMG_DATA_FORMAT_4_4", "value": 57},
353 {"name": "IMG_DATA_FORMAT_6_5_5", "value": 58},
354 {"name": "IMG_DATA_FORMAT_1", "value": 59},
355 {"name": "IMG_DATA_FORMAT_1_REVERSED", "value": 60},
356 {"name": "IMG_DATA_FORMAT_8_AS_32", "value": 61},
357 {"name": "IMG_DATA_FORMAT_8_AS_32_32", "value": 62},
358 {"name": "IMG_DATA_FORMAT_32_AS_32_32_32_32", "value": 63}
363 {"name": "IMG_NUM_FORMAT_UNORM", "value": 0},
364 {"name": "IMG_NUM_FORMAT_SNORM", "value": 1},
365 {"name": "IMG_NUM_FORMAT_USCALED", "value": 2},
366 {"name": "IMG_NUM_FORMAT_SSCALED", "value": 3},
367 {"name": "IMG_NUM_FORMAT_UINT", "value": 4},
368 {"name": "IMG_NUM_FORMAT_SINT", "value": 5},
369 {"name": "IMG_NUM_FORMAT_RESERVED_6", "value": 6},
370 {"name": "IMG_NUM_FORMAT_FLOAT", "value": 7},
371 {"name": "IMG_NUM_FORMAT_RESERVED_8", "value": 8},
372 {"name": "IMG_NUM_FORMAT_SRGB", "value": 9},
373 {"name": "IMG_NUM_FORMAT_RESERVED_10", "value": 10},
374 {"name": "IMG_NUM_FORMAT_RESERVED_11", "value": 11},
375 {"name": "IMG_NUM_FORMAT_RESERVED_12", "value": 12},
376 {"name": "IMG_NUM_FORMAT_RESERVED_13", "value": 13},
377 {"name": "IMG_NUM_FORMAT_RESERVED_14", "value": 14},
378 {"name": "IMG_NUM_FORMAT_RESERVED_15", "value": 15}
383 {"name": "ADDR_SURF_MACRO_ASPECT_1", "value": 0},
384 {"name": "ADDR_SURF_MACRO_ASPECT_2", "value": 1},
385 {"name": "ADDR_SURF_MACRO_ASPECT_4", "value": 2},
386 {"name": "ADDR_SURF_MACRO_ASPECT_8", "value": 3}
391 {"name": "ADDR_SURF_DISPLAY_MICRO_TILING", "value": 0},
392 {"name": "ADDR_SURF_THIN_MICRO_TILING", "value": 1},
393 {"name": "ADDR_SURF_DEPTH_MICRO_TILING", "value": 2},
394 {"name": "ADDR_SURF_ROTATED_MICRO_TILING", "value": 3},
395 {"name": "ADDR_SURF_THICK_MICRO_TILING", "value": 4}
400 {"name": "ADDR_SURF_2_BANK", "value": 0},
401 {"name": "ADDR_SURF_4_BANK", "value": 1},
402 {"name": "ADDR_SURF_8_BANK", "value": 2},
403 {"name": "ADDR_SURF_16_BANK", "value": 3}
408 {"name": "X_DRAW_POINTS", "value": 0},
409 {"name": "X_DRAW_LINES", "value": 1},
410 {"name": "X_DRAW_TRIANGLES", "value": 2}
415 {"name": "X_DISABLE_POLY_MODE", "value": 0},
416 {"name": "X_DUAL_MODE", "value": 1}
421 {"name": "X_TRUNCATE", "value": 0},
422 {"name": "X_ROUND", "value": 1},
423 {"name": "X_ROUND_TO_EVEN", "value": 2},
424 {"name": "X_ROUND_TO_ODD", "value": 3}
429 {"name": "ADDR_SURF_P2", "value": 0},
430 {"name": "ADDR_SURF_P2_RESERVED0", "value": 1},
431 {"name": "ADDR_SURF_P2_RESERVED1", "value": 2},
432 {"name": "ADDR_SURF_P2_RESERVED2", "value": 3},
433 {"name": "ADDR_SURF_P4_8x16", "value": 4},
434 {"name": "ADDR_SURF_P4_16x16", "value": 5},
435 {"name": "ADDR_SURF_P4_16x32", "value": 6},
436 {"name": "ADDR_SURF_P4_32x32", "value": 7},
437 {"name": "ADDR_SURF_P8_16x16_8x16", "value": 8},
438 {"name": "ADDR_SURF_P8_16x32_8x16", "value": 9},
439 {"name": "ADDR_SURF_P8_32x32_8x16", "value": 10},
440 {"name": "ADDR_SURF_P8_16x32_16x16", "value": 11},
441 {"name": "ADDR_SURF_P8_32x32_16x16", "value": 12},
442 {"name": "ADDR_SURF_P8_32x32_16x32", "value": 13},
443 {"name": "ADDR_SURF_P8_32x64_32x32", "value": 14},
444 {"name": "ADDR_SURF_P8_RESERVED0", "value": 15},
445 {"name": "ADDR_SURF_P16_32x32_8x16", "value": 16},
446 {"name": "ADDR_SURF_P16_32x32_16x16", "value": 17}
451 {"name": "RASTER_CONFIG_PKR_MAP_0", "value": 0},
452 {"name": "RASTER_CONFIG_PKR_MAP_1", "value": 1},
453 {"name": "RASTER_CONFIG_PKR_MAP_2", "value": 2},
454 {"name": "RASTER_CONFIG_PKR_MAP_3", "value": 3}
459 {"name": "RASTER_CONFIG_PKR_XSEL_0", "value": 0},
460 {"name": "RASTER_CONFIG_PKR_XSEL_1", "value": 1},
461 {"name": "RASTER_CONFIG_PKR_XSEL_2", "value": 2},
462 {"name": "RASTER_CONFIG_PKR_XSEL_3", "value": 3}
467 {"name": "RASTER_CONFIG_PKR_XSEL2_0", "value": 0},
468 {"name": "RASTER_CONFIG_PKR_XSEL2_1", "value": 1},
469 {"name": "RASTER_CONFIG_PKR_XSEL2_2", "value": 2},
470 {"name": "RASTER_CONFIG_PKR_XSEL2_3", "value": 3}
475 {"name": "RASTER_CONFIG_PKR_YSEL_0", "value": 0},
476 {"name": "RASTER_CONFIG_PKR_YSEL_1", "value": 1},
477 {"name": "RASTER_CONFIG_PKR_YSEL_2", "value": 2},
478 {"name": "RASTER_CONFIG_PKR_YSEL_3", "value": 3}
483 {"name": "X_16_8_FIXED_POINT_1_16TH", "value": 0},
484 {"name": "X_16_8_FIXED_POINT_1_8TH", "value": 1},
485 {"name": "X_16_8_FIXED_POINT_1_4TH", "value": 2},
486 {"name": "X_16_8_FIXED_POINT_1_2", "value": 3},
487 {"name": "X_16_8_FIXED_POINT_1", "value": 4},
488 {"name": "X_16_8_FIXED_POINT_1_256TH", "value": 5},
489 {"name": "X_14_10_FIXED_POINT_1_1024TH", "value": 6},
490 {"name": "X_12_12_FIXED_POINT_1_4096TH", "value": 7}
495 {"name": "ROP3_CLEAR", "value": 0},
496 {"name": "X_0X05", "value": 5},
497 {"name": "X_0X0A", "value": 10},
498 {"name": "X_0X0F", "value": 15},
499 {"name": "ROP3_NOR", "value": 17},
500 {"name": "ROP3_AND_INVERTED", "value": 34},
501 {"name": "ROP3_COPY_INVERTED", "value": 51},
502 {"name": "ROP3_AND_REVERSE", "value": 68},
503 {"name": "X_0X50", "value": 80},
504 {"name": "ROP3_INVERT", "value": 85},
505 {"name": "X_0X5A", "value": 90},
506 {"name": "X_0X5F", "value": 95},
507 {"name": "ROP3_XOR", "value": 102},
508 {"name": "ROP3_NAND", "value": 119},
509 {"name": "ROP3_AND", "value": 136},
510 {"name": "ROP3_EQUIVALENT", "value": 153},
511 {"name": "X_0XA0", "value": 160},
512 {"name": "X_0XA5", "value": 165},
513 {"name": "ROP3_NO_OP", "value": 170},
514 {"name": "X_0XAF", "value": 175},
515 {"name": "ROP3_OR_INVERTED", "value": 187},
516 {"name": "ROP3_COPY", "value": 204},
517 {"name": "ROP3_OR_REVERSE", "value": 221},
518 {"name": "ROP3_OR", "value": 238},
519 {"name": "X_0XF0", "value": 240},
520 {"name": "X_0XF5", "value": 245},
521 {"name": "X_0XFA", "value": 250},
522 {"name": "ROP3_SET", "value": 255}
527 {"name": "RASTER_CONFIG_RB_MAP_0", "value": 0},
528 {"name": "RASTER_CONFIG_RB_MAP_1", "value": 1},
529 {"name": "RASTER_CONFIG_RB_MAP_2", "value": 2},
530 {"name": "RASTER_CONFIG_RB_MAP_3", "value": 3}
535 {"name": "RASTER_CONFIG_RB_XSEL_0", "value": 0},
536 {"name": "RASTER_CONFIG_RB_XSEL_1", "value": 1}
541 {"name": "RASTER_CONFIG_RB_XSEL2_0", "value": 0},
542 {"name": "RASTER_CONFIG_RB_XSEL2_1", "value": 1},
543 {"name": "RASTER_CONFIG_RB_XSEL2_2", "value": 2},
544 {"name": "RASTER_CONFIG_RB_XSEL2_3", "value": 3}
549 {"name": "RASTER_CONFIG_RB_YSEL_0", "value": 0},
550 {"name": "RASTER_CONFIG_RB_YSEL_1", "value": 1}
555 {"name": "SPI_PNT_SPRITE_SEL_0", "value": 0},
556 {"name": "SPI_PNT_SPRITE_SEL_1", "value": 1},
557 {"name": "SPI_PNT_SPRITE_SEL_S", "value": 2},
558 {"name": "SPI_PNT_SPRITE_SEL_T", "value": 3},
559 {"name": "SPI_PNT_SPRITE_SEL_NONE", "value": 4}
564 {"name": "SPI_SHADER_ZERO", "value": 0},
565 {"name": "SPI_SHADER_32_R", "value": 1},
566 {"name": "SPI_SHADER_32_GR", "value": 2},
567 {"name": "SPI_SHADER_32_AR", "value": 3},
568 {"name": "SPI_SHADER_FP16_ABGR", "value": 4},
569 {"name": "SPI_SHADER_UNORM16_ABGR", "value": 5},
570 {"name": "SPI_SHADER_SNORM16_ABGR", "value": 6},
571 {"name": "SPI_SHADER_UINT16_ABGR", "value": 7},
572 {"name": "SPI_SHADER_SINT16_ABGR", "value": 8},
573 {"name": "SPI_SHADER_32_ABGR", "value": 9}
578 {"name": "SPI_SHADER_NONE", "value": 0},
579 {"name": "SPI_SHADER_1COMP", "value": 1},
580 {"name": "SPI_SHADER_2COMP", "value": 2},
581 {"name": "SPI_SHADER_4COMPRESS", "value": 3},
582 {"name": "SPI_SHADER_4COMP", "value": 4}
587 {"name": "STRM_PERFMON_STATE_DISABLE_AND_RESET", "value": 0},
588 {"name": "STRM_PERFMON_STATE_START_COUNTING", "value": 1},
589 {"name": "STRM_PERFMON_STATE_STOP_COUNTING", "value": 2},
590 {"name": "STRM_PERFMON_STATE_RESERVED_3", "value": 3},
591 {"name": "STRM_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM", "value": 4},
592 {"name": "STRM_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM", "value": 5}
597 {"name": "SQ_IMG_FILTER_MODE_BLEND", "value": 0},
598 {"name": "SQ_IMG_FILTER_MODE_MIN", "value": 1},
599 {"name": "SQ_IMG_FILTER_MODE_MAX", "value": 2}
604 {"name": "SQ_RSRC_BUF", "value": 0},
605 {"name": "SQ_RSRC_BUF_RSVD_1", "value": 1},
606 {"name": "SQ_RSRC_BUF_RSVD_2", "value": 2},
607 {"name": "SQ_RSRC_BUF_RSVD_3", "value": 3}
612 {"name": "SQ_RSRC_IMG_RSVD_0", "value": 0},
613 {"name": "SQ_RSRC_IMG_RSVD_1", "value": 1},
614 {"name": "SQ_RSRC_IMG_RSVD_2", "value": 2},
615 {"name": "SQ_RSRC_IMG_RSVD_3", "value": 3},
616 {"name": "SQ_RSRC_IMG_RSVD_4", "value": 4},
617 {"name": "SQ_RSRC_IMG_RSVD_5", "value": 5},
618 {"name": "SQ_RSRC_IMG_RSVD_6", "value": 6},
619 {"name": "SQ_RSRC_IMG_RSVD_7", "value": 7},
620 {"name": "SQ_RSRC_IMG_1D", "value": 8},
621 {"name": "SQ_RSRC_IMG_2D", "value": 9},
622 {"name": "SQ_RSRC_IMG_3D", "value": 10},
623 {"name": "SQ_RSRC_IMG_CUBE", "value": 11},
624 {"name": "SQ_RSRC_IMG_1D_ARRAY", "value": 12},
625 {"name": "SQ_RSRC_IMG_2D_ARRAY", "value": 13},
626 {"name": "SQ_RSRC_IMG_2D_MSAA", "value": 14},
627 {"name": "SQ_RSRC_IMG_2D_MSAA_ARRAY", "value": 15}
632 {"name": "SQ_SEL_0", "value": 0},
633 {"name": "SQ_SEL_1", "value": 1},
634 {"name": "SQ_SEL_RESERVED_0", "value": 2},
635 {"name": "SQ_SEL_RESERVED_1", "value": 3},
636 {"name": "SQ_SEL_X", "value": 4},
637 {"name": "SQ_SEL_Y", "value": 5},
638 {"name": "SQ_SEL_Z", "value": 6},
639 {"name": "SQ_SEL_W", "value": 7}
644 {"name": "SQ_TEX_BORDER_COLOR_TRANS_BLACK", "value": 0},
645 {"name": "SQ_TEX_BORDER_COLOR_OPAQUE_BLACK", "value": 1},
646 {"name": "SQ_TEX_BORDER_COLOR_OPAQUE_WHITE", "value": 2},
647 {"name": "SQ_TEX_BORDER_COLOR_REGISTER", "value": 3}
652 {"name": "SQ_TEX_WRAP", "value": 0},
653 {"name": "SQ_TEX_MIRROR", "value": 1},
654 {"name": "SQ_TEX_CLAMP_LAST_TEXEL", "value": 2},
655 {"name": "SQ_TEX_MIRROR_ONCE_LAST_TEXEL", "value": 3},
656 {"name": "SQ_TEX_CLAMP_HALF_BORDER", "value": 4},
657 {"name": "SQ_TEX_MIRROR_ONCE_HALF_BORDER", "value": 5},
658 {"name": "SQ_TEX_CLAMP_BORDER", "value": 6},
659 {"name": "SQ_TEX_MIRROR_ONCE_BORDER", "value": 7}
664 {"name": "SQ_TEX_DEPTH_COMPARE_NEVER", "value": 0},
665 {"name": "SQ_TEX_DEPTH_COMPARE_LESS", "value": 1},
666 {"name": "SQ_TEX_DEPTH_COMPARE_EQUAL", "value": 2},
667 {"name": "SQ_TEX_DEPTH_COMPARE_LESSEQUAL", "value": 3},
668 {"name": "SQ_TEX_DEPTH_COMPARE_GREATER", "value": 4},
669 {"name": "SQ_TEX_DEPTH_COMPARE_NOTEQUAL", "value": 5},
670 {"name": "SQ_TEX_DEPTH_COMPARE_GREATEREQUAL", "value": 6},
671 {"name": "SQ_TEX_DEPTH_COMPARE_ALWAYS", "value": 7}
676 {"name": "SQ_TEX_MIP_FILTER_NONE", "value": 0},
677 {"name": "SQ_TEX_MIP_FILTER_POINT", "value": 1},
678 {"name": "SQ_TEX_MIP_FILTER_LINEAR", "value": 2},
679 {"name": "SQ_TEX_MIP_FILTER_POINT_ANISO_ADJ", "value": 3}
684 {"name": "SQ_TEX_XY_FILTER_POINT", "value": 0},
685 {"name": "SQ_TEX_XY_FILTER_BILINEAR", "value": 1},
686 {"name": "SQ_TEX_XY_FILTER_ANISO_POINT", "value": 2},
687 {"name": "SQ_TEX_XY_FILTER_ANISO_BILINEAR", "value": 3}
692 {"name": "SQ_TEX_Z_FILTER_NONE", "value": 0},
693 {"name": "SQ_TEX_Z_FILTER_POINT", "value": 1},
694 {"name": "SQ_TEX_Z_FILTER_LINEAR", "value": 2}
699 {"name": "BLEND_OPT_PRESERVE_NONE_IGNORE_ALL", "value": 0},
700 {"name": "BLEND_OPT_PRESERVE_ALL_IGNORE_NONE", "value": 1},
701 {"name": "BLEND_OPT_PRESERVE_C1_IGNORE_C0", "value": 2},
702 {"name": "BLEND_OPT_PRESERVE_C0_IGNORE_C1", "value": 3},
703 {"name": "BLEND_OPT_PRESERVE_A1_IGNORE_A0", "value": 4},
704 {"name": "BLEND_OPT_PRESERVE_A0_IGNORE_A1", "value": 5},
705 {"name": "BLEND_OPT_PRESERVE_NONE_IGNORE_A0", "value": 6},
706 {"name": "BLEND_OPT_PRESERVE_NONE_IGNORE_NONE", "value": 7}
711 {"name": "EXACT", "value": 0},
712 {"name": "11BIT_FORMAT", "value": 1},
713 {"name": "10BIT_FORMAT", "value": 3},
714 {"name": "8BIT_FORMAT", "value": 6},
715 {"name": "6BIT_FORMAT", "value": 11},
716 {"name": "5BIT_FORMAT", "value": 13},
717 {"name": "4BIT_FORMAT", "value": 15}
722 {"name": "SX_RT_EXPORT_NO_CONVERSION", "value": 0},
723 {"name": "SX_RT_EXPORT_32_R", "value": 1},
724 {"name": "SX_RT_EXPORT_32_A", "value": 2},
725 {"name": "SX_RT_EXPORT_10_11_11", "value": 3},
726 {"name": "SX_RT_EXPORT_2_10_10_10", "value": 4},
727 {"name": "SX_RT_EXPORT_8_8_8_8", "value": 5},
728 {"name": "SX_RT_EXPORT_5_6_5", "value": 6},
729 {"name": "SX_RT_EXPORT_1_5_5_5", "value": 7},
730 {"name": "SX_RT_EXPORT_4_4_4_4", "value": 8},
731 {"name": "SX_RT_EXPORT_16_16_GR", "value": 9},
732 {"name": "SX_RT_EXPORT_16_16_AR", "value": 10}
737 {"name": "OPT_COMB_NONE", "value": 0},
738 {"name": "OPT_COMB_ADD", "value": 1},
739 {"name": "OPT_COMB_SUBTRACT", "value": 2},
740 {"name": "OPT_COMB_MIN", "value": 3},
741 {"name": "OPT_COMB_MAX", "value": 4},
742 {"name": "OPT_COMB_REVSUBTRACT", "value": 5},
743 {"name": "OPT_COMB_BLEND_DISABLED", "value": 6},
744 {"name": "OPT_COMB_SAFE_ADD", "value": 7}
749 {"name": "RASTER_CONFIG_SC_MAP_0", "value": 0},
750 {"name": "RASTER_CONFIG_SC_MAP_1", "value": 1},
751 {"name": "RASTER_CONFIG_SC_MAP_2", "value": 2},
752 {"name": "RASTER_CONFIG_SC_MAP_3", "value": 3}
757 {"name": "RASTER_CONFIG_SC_XSEL_8_WIDE_TILE", "value": 0},
758 {"name": "RASTER_CONFIG_SC_XSEL_16_WIDE_TILE", "value": 1},
759 {"name": "RASTER_CONFIG_SC_XSEL_32_WIDE_TILE", "value": 2},
760 {"name": "RASTER_CONFIG_SC_XSEL_64_WIDE_TILE", "value": 3}
765 {"name": "RASTER_CONFIG_SC_YSEL_8_WIDE_TILE", "value": 0},
766 {"name": "RASTER_CONFIG_SC_YSEL_16_WIDE_TILE", "value": 1},
767 {"name": "RASTER_CONFIG_SC_YSEL_32_WIDE_TILE", "value": 2},
768 {"name": "RASTER_CONFIG_SC_YSEL_64_WIDE_TILE", "value": 3}
773 {"name": "RASTER_CONFIG_SE_MAP_0", "value": 0},
774 {"name": "RASTER_CONFIG_SE_MAP_1", "value": 1},
775 {"name": "RASTER_CONFIG_SE_MAP_2", "value": 2},
776 {"name": "RASTER_CONFIG_SE_MAP_3", "value": 3}
781 {"name": "RASTER_CONFIG_SE_PAIR_MAP_0", "value": 0},
782 {"name": "RASTER_CONFIG_SE_PAIR_MAP_1", "value": 1},
783 {"name": "RASTER_CONFIG_SE_PAIR_MAP_2", "value": 2},
784 {"name": "RASTER_CONFIG_SE_PAIR_MAP_3", "value": 3}
789 {"name": "RASTER_CONFIG_SE_PAIR_XSEL_8_WIDE_TILE", "value": 0},
790 {"name": "RASTER_CONFIG_SE_PAIR_XSEL_16_WIDE_TILE", "value": 1},
791 {"name": "RASTER_CONFIG_SE_PAIR_XSEL_32_WIDE_TILE", "value": 2},
792 {"name": "RASTER_CONFIG_SE_PAIR_XSEL_64_WIDE_TILE", "value": 3}
797 {"name": "RASTER_CONFIG_SE_PAIR_YSEL_8_WIDE_TILE", "value": 0},
798 {"name": "RASTER_CONFIG_SE_PAIR_YSEL_16_WIDE_TILE", "value": 1},
799 {"name": "RASTER_CONFIG_SE_PAIR_YSEL_32_WIDE_TILE", "value": 2},
800 {"name": "RASTER_CONFIG_SE_PAIR_YSEL_64_WIDE_TILE", "value": 3}
805 {"name": "RASTER_CONFIG_SE_XSEL_8_WIDE_TILE", "value": 0},
806 {"name": "RASTER_CONFIG_SE_XSEL_16_WIDE_TILE", "value": 1},
807 {"name": "RASTER_CONFIG_SE_XSEL_32_WIDE_TILE", "value": 2},
808 {"name": "RASTER_CONFIG_SE_XSEL_64_WIDE_TILE", "value": 3}
813 {"name": "RASTER_CONFIG_SE_YSEL_8_WIDE_TILE", "value": 0},
814 {"name": "RASTER_CONFIG_SE_YSEL_16_WIDE_TILE", "value": 1},
815 {"name": "RASTER_CONFIG_SE_YSEL_32_WIDE_TILE", "value": 2},
816 {"name": "RASTER_CONFIG_SE_YSEL_64_WIDE_TILE", "value": 3}
821 {"name": "STENCIL_INVALID", "value": 0},
822 {"name": "STENCIL_8", "value": 1}
827 {"name": "STENCIL_KEEP", "value": 0},
828 {"name": "STENCIL_ZERO", "value": 1},
829 {"name": "STENCIL_ONES", "value": 2},
830 {"name": "STENCIL_REPLACE_TEST", "value": 3},
831 {"name": "STENCIL_REPLACE_OP", "value": 4},
832 {"name": "STENCIL_ADD_CLAMP", "value": 5},
833 {"name": "STENCIL_SUB_CLAMP", "value": 6},
834 {"name": "STENCIL_INVERT", "value": 7},
835 {"name": "STENCIL_ADD_WRAP", "value": 8},
836 {"name": "STENCIL_SUB_WRAP", "value": 9},
837 {"name": "STENCIL_AND", "value": 10},
838 {"name": "STENCIL_OR", "value": 11},
839 {"name": "STENCIL_XOR", "value": 12},
840 {"name": "STENCIL_NAND", "value": 13},
841 {"name": "STENCIL_NOR", "value": 14},
842 {"name": "STENCIL_XNOR", "value": 15}
847 {"name": "ENDIAN_NONE", "value": 0},
848 {"name": "ENDIAN_8IN16", "value": 1},
849 {"name": "ENDIAN_8IN32", "value": 2},
850 {"name": "ENDIAN_8IN64", "value": 3}
855 {"name": "NUMBER_UNORM", "value": 0},
856 {"name": "NUMBER_SNORM", "value": 1},
857 {"name": "NUMBER_USCALED", "value": 2},
858 {"name": "NUMBER_SSCALED", "value": 3},
859 {"name": "NUMBER_UINT", "value": 4},
860 {"name": "NUMBER_SINT", "value": 5},
861 {"name": "NUMBER_SRGB", "value": 6},
862 {"name": "NUMBER_FLOAT", "value": 7}
867 {"name": "SWAP_STD", "value": 0},
868 {"name": "SWAP_ALT", "value": 1},
869 {"name": "SWAP_STD_REV", "value": 2},
870 {"name": "SWAP_ALT_REV", "value": 3}
875 {"name": "ADDR_SURF_TILE_SPLIT_64B", "value": 0},
876 {"name": "ADDR_SURF_TILE_SPLIT_128B", "value": 1},
877 {"name": "ADDR_SURF_TILE_SPLIT_256B", "value": 2},
878 {"name": "ADDR_SURF_TILE_SPLIT_512B", "value": 3},
879 {"name": "ADDR_SURF_TILE_SPLIT_1KB", "value": 4},
880 {"name": "ADDR_SURF_TILE_SPLIT_2KB", "value": 5},
881 {"name": "ADDR_SURF_TILE_SPLIT_4KB", "value": 6}
886 {"name": "NO_DIST", "value": 0},
887 {"name": "PATCHES", "value": 1},
888 {"name": "DONUTS", "value": 2}
893 {"name": "DI_MAJOR_MODE_0", "value": 0},
894 {"name": "DI_MAJOR_MODE_1", "value": 1}
899 {"name": "DI_PT_NONE", "value": 0},
900 {"name": "DI_PT_POINTLIST", "value": 1},
901 {"name": "DI_PT_LINELIST", "value": 2},
902 {"name": "DI_PT_LINESTRIP", "value": 3},
903 {"name": "DI_PT_TRILIST", "value": 4},
904 {"name": "DI_PT_TRIFAN", "value": 5},
905 {"name": "DI_PT_TRISTRIP", "value": 6},
906 {"name": "DI_PT_UNUSED_0", "value": 7},
907 {"name": "DI_PT_UNUSED_1", "value": 8},
908 {"name": "DI_PT_PATCH", "value": 9},
909 {"name": "DI_PT_LINELIST_ADJ", "value": 10},
910 {"name": "DI_PT_LINESTRIP_ADJ", "value": 11},
911 {"name": "DI_PT_TRILIST_ADJ", "value": 12},
912 {"name": "DI_PT_TRISTRIP_ADJ", "value": 13},
913 {"name": "DI_PT_UNUSED_3", "value": 14},
914 {"name": "DI_PT_UNUSED_4", "value": 15},
915 {"name": "DI_PT_TRI_WITH_WFLAGS", "value": 16},
916 {"name": "DI_PT_RECTLIST", "value": 17},
917 {"name": "DI_PT_LINELOOP", "value": 18},
918 {"name": "DI_PT_QUADLIST", "value": 19},
919 {"name": "DI_PT_QUADSTRIP", "value": 20},
920 {"name": "DI_PT_POLYGON", "value": 21},
921 {"name": "DI_PT_2D_COPY_RECT_LIST_V0", "value": 22},
922 {"name": "DI_PT_2D_COPY_RECT_LIST_V1", "value": 23},
923 {"name": "DI_PT_2D_COPY_RECT_LIST_V2", "value": 24},
924 {"name": "DI_PT_2D_COPY_RECT_LIST_V3", "value": 25},
925 {"name": "DI_PT_2D_FILL_RECT_LIST", "value": 26},
926 {"name": "DI_PT_2D_LINE_STRIP", "value": 27},
927 {"name": "DI_PT_2D_TRI_STRIP", "value": 28}
932 {"name": "DI_SRC_SEL_DMA", "value": 0},
933 {"name": "DI_SRC_SEL_IMMEDIATE", "value": 1},
934 {"name": "DI_SRC_SEL_AUTO_INDEX", "value": 2},
935 {"name": "DI_SRC_SEL_RESERVED", "value": 3}
940 {"name": "VGT_DMA_BUF_MEM", "value": 0},
941 {"name": "VGT_DMA_BUF_RING", "value": 1},
942 {"name": "VGT_DMA_BUF_SETUP", "value": 2},
943 {"name": "VGT_DMA_PTR_UPDATE", "value": 3}
948 {"name": "VGT_DMA_SWAP_NONE", "value": 0},
949 {"name": "VGT_DMA_SWAP_16_BIT", "value": 1},
950 {"name": "VGT_DMA_SWAP_32_BIT", "value": 2},
951 {"name": "VGT_DMA_SWAP_WORD", "value": 3}
956 {"name": "Reserved_0x00", "value": 0},
957 {"name": "SAMPLE_STREAMOUTSTATS1", "value": 1},
958 {"name": "SAMPLE_STREAMOUTSTATS2", "value": 2},
959 {"name": "SAMPLE_STREAMOUTSTATS3", "value": 3},
960 {"name": "CACHE_FLUSH_TS", "value": 4},
961 {"name": "CONTEXT_DONE", "value": 5},
962 {"name": "CACHE_FLUSH", "value": 6},
963 {"name": "CS_PARTIAL_FLUSH", "value": 7},
964 {"name": "VGT_STREAMOUT_SYNC", "value": 8},
965 {"name": "Reserved_0x09", "value": 9},
966 {"name": "VGT_STREAMOUT_RESET", "value": 10},
967 {"name": "END_OF_PIPE_INCR_DE", "value": 11},
968 {"name": "END_OF_PIPE_IB_END", "value": 12},
969 {"name": "RST_PIX_CNT", "value": 13},
970 {"name": "Reserved_0x0E", "value": 14},
971 {"name": "VS_PARTIAL_FLUSH", "value": 15},
972 {"name": "PS_PARTIAL_FLUSH", "value": 16},
973 {"name": "FLUSH_HS_OUTPUT", "value": 17},
974 {"name": "FLUSH_LS_OUTPUT", "value": 18},
975 {"name": "Reserved_0x13", "value": 19},
976 {"name": "CACHE_FLUSH_AND_INV_TS_EVENT", "value": 20},
977 {"name": "ZPASS_DONE", "value": 21},
978 {"name": "CACHE_FLUSH_AND_INV_EVENT", "value": 22},
979 {"name": "PERFCOUNTER_START", "value": 23},
980 {"name": "PERFCOUNTER_STOP", "value": 24},
981 {"name": "PIPELINESTAT_START", "value": 25},
982 {"name": "PIPELINESTAT_STOP", "value": 26},
983 {"name": "PERFCOUNTER_SAMPLE", "value": 27},
984 {"name": "FLUSH_ES_OUTPUT", "value": 28},
985 {"name": "FLUSH_GS_OUTPUT", "value": 29},
986 {"name": "SAMPLE_PIPELINESTAT", "value": 30},
987 {"name": "SO_VGTSTREAMOUT_FLUSH", "value": 31},
988 {"name": "SAMPLE_STREAMOUTSTATS", "value": 32},
989 {"name": "RESET_VTX_CNT", "value": 33},
990 {"name": "BLOCK_CONTEXT_DONE", "value": 34},
991 {"name": "CS_CONTEXT_DONE", "value": 35},
992 {"name": "VGT_FLUSH", "value": 36},
993 {"name": "TGID_ROLLOVER", "value": 37},
994 {"name": "SQ_NON_EVENT", "value": 38},
995 {"name": "SC_SEND_DB_VPZ", "value": 39},
996 {"name": "BOTTOM_OF_PIPE_TS", "value": 40},
997 {"name": "FLUSH_SX_TS", "value": 41},
998 {"name": "DB_CACHE_FLUSH_AND_INV", "value": 42},
999 {"name": "FLUSH_AND_INV_DB_DATA_TS", "value": 43},
1000 {"name": "FLUSH_AND_INV_DB_META", "value": 44},
1001 {"name": "FLUSH_AND_INV_CB_DATA_TS", "value": 45},
1002 {"name": "FLUSH_AND_INV_CB_META", "value": 46},
1003 {"name": "CS_DONE", "value": 47},
1004 {"name": "PS_DONE", "value": 48},
1005 {"name": "FLUSH_AND_INV_CB_PIXEL_DATA", "value": 49},
1006 {"name": "SX_CB_RAT_ACK_REQUEST", "value": 50},
1007 {"name": "THREAD_TRACE_START", "value": 51},
1008 {"name": "THREAD_TRACE_STOP", "value": 52},
1009 {"name": "THREAD_TRACE_MARKER", "value": 53},
1010 {"name": "THREAD_TRACE_FLUSH", "value": 54},
1011 {"name": "THREAD_TRACE_FINISH", "value": 55},
1012 {"name": "PIXEL_PIPE_STAT_CONTROL", "value": 56},
1013 {"name": "PIXEL_PIPE_STAT_DUMP", "value": 57},
1014 {"name": "PIXEL_PIPE_STAT_RESET", "value": 58},
1015 {"name": "CONTEXT_SUSPEND", "value": 59},
1016 {"name": "OFFCHIP_HS_DEALLOC", "value": 60}
1021 {"name": "GS_CUT_1024", "value": 0},
1022 {"name": "GS_CUT_512", "value": 1},
1023 {"name": "GS_CUT_256", "value": 2},
1024 {"name": "GS_CUT_128", "value": 3}
1029 {"name": "GS_OFF", "value": 0},
1030 {"name": "GS_SCENARIO_A", "value": 1},
1031 {"name": "GS_SCENARIO_B", "value": 2},
1032 {"name": "GS_SCENARIO_G", "value": 3},
1033 {"name": "GS_SCENARIO_C", "value": 4},
1034 {"name": "SPRITE_EN", "value": 5}
1039 {"name": "POINTLIST", "value": 0},
1040 {"name": "LINESTRIP", "value": 1},
1041 {"name": "TRISTRIP", "value": 2}
1046 {"name": "X_8K_DWORDS", "value": 0},
1047 {"name": "X_4K_DWORDS", "value": 1},
1048 {"name": "X_2K_DWORDS", "value": 2},
1049 {"name": "X_1K_DWORDS", "value": 3}
1054 {"name": "VGT_INDEX_16", "value": 0},
1055 {"name": "VGT_INDEX_32", "value": 1},
1056 {"name": "VGT_INDEX_8", "value": 2}
1061 {"name": "VGT_POLICY_LRU", "value": 0},
1062 {"name": "VGT_POLICY_STREAM", "value": 1}
1067 {"name": "ES_STAGE_OFF", "value": 0},
1068 {"name": "ES_STAGE_DS", "value": 1},
1069 {"name": "ES_STAGE_REAL", "value": 2},
1070 {"name": "RESERVED_ES", "value": 3}
1075 {"name": "GS_STAGE_OFF", "value": 0},
1076 {"name": "GS_STAGE_ON", "value": 1}
1081 {"name": "HS_STAGE_OFF", "value": 0},
1082 {"name": "HS_STAGE_ON", "value": 1}
1087 {"name": "LS_STAGE_OFF", "value": 0},
1088 {"name": "LS_STAGE_ON", "value": 1},
1089 {"name": "CS_STAGE_ON", "value": 2},
1090 {"name": "RESERVED_LS", "value": 3}
1095 {"name": "VS_STAGE_REAL", "value": 0},
1096 {"name": "VS_STAGE_DS", "value": 1},
1097 {"name": "VS_STAGE_COPY_SHADER", "value": 2},
1098 {"name": "RESERVED_VS", "value": 3}
1103 {"name": "PART_INTEGER", "value": 0},
1104 {"name": "PART_POW2", "value": 1},
1105 {"name": "PART_FRAC_ODD", "value": 2},
1106 {"name": "PART_FRAC_EVEN", "value": 3}
1111 {"name": "OUTPUT_POINT", "value": 0},
1112 {"name": "OUTPUT_LINE", "value": 1},
1113 {"name": "OUTPUT_TRIANGLE_CW", "value": 2},
1114 {"name": "OUTPUT_TRIANGLE_CCW", "value": 3}
1119 {"name": "TESS_ISOLINE", "value": 0},
1120 {"name": "TESS_TRIANGLE", "value": 1},
1121 {"name": "TESS_QUAD", "value": 2}
1126 {"name": "Z_INVALID", "value": 0},
1127 {"name": "Z_16", "value": 1},
1128 {"name": "Z_24", "value": 2},
1129 {"name": "Z_32_FLOAT", "value": 3}
1134 {"name": "FORCE_SUMM_OFF", "value": 0},
1135 {"name": "FORCE_SUMM_MINZ", "value": 1},
1136 {"name": "FORCE_SUMM_MAXZ", "value": 2},
1137 {"name": "FORCE_SUMM_BOTH", "value": 3}
1142 {"name": "LATE_Z", "value": 0},
1143 {"name": "EARLY_Z_THEN_LATE_Z", "value": 1},
1144 {"name": "RE_Z", "value": 2},
1145 {"name": "EARLY_Z_THEN_RE_Z", "value": 3}
1153 "name": "SQ_WAVE_MODE",
1159 "name": "SQ_WAVE_STATUS",
1165 "name": "SQ_WAVE_TRAPSTS",
1171 "name": "SQ_WAVE_HW_ID",
1177 "name": "SQ_WAVE_GPR_ALLOC",
1183 "name": "SQ_WAVE_LDS_ALLOC",
1189 "name": "SQ_WAVE_IB_STS",
1195 "name": "SQ_WAVE_PC_LO"
1200 "name": "SQ_WAVE_PC_HI",
1206 "name": "SQ_WAVE_INST_DW0"
1211 "name": "SQ_WAVE_INST_DW1"
1216 "name": "SQ_WAVE_IB_DBG0",
1222 "name": "SQ_WAVE_IB_DBG1",
1228 "name": "SQ_WAVE_TBA_LO"
1233 "name": "SQ_WAVE_TBA_HI",
1239 "name": "SQ_WAVE_TMA_LO"
1244 "name": "SQ_WAVE_TMA_HI",
1250 "name": "SQ_WAVE_TTMP0"
1255 "name": "SQ_WAVE_TTMP1"
1260 "name": "SQ_WAVE_TTMP2"
1265 "name": "SQ_WAVE_TTMP3"
1270 "name": "SQ_WAVE_TTMP4"
1275 "name": "SQ_WAVE_TTMP5"
1280 "name": "SQ_WAVE_TTMP6"
1285 "name": "SQ_WAVE_TTMP7"
1290 "name": "SQ_WAVE_TTMP8"
1295 "name": "SQ_WAVE_TTMP9"
1300 "name": "SQ_WAVE_TTMP10"
1305 "name": "SQ_WAVE_TTMP11"
1310 "name": "SQ_WAVE_M0"
1315 "name": "SQ_WAVE_EXEC_LO"
1320 "name": "SQ_WAVE_EXEC_HI"
1325 "name": "GRBM_STATUS2",
1331 "name": "GRBM_STATUS",
1337 "name": "GRBM_STATUS_SE0",
1343 "name": "GRBM_STATUS_SE1",
1349 "name": "GRBM_STATUS_SE2",
1355 "name": "GRBM_STATUS_SE3",
1361 "name": "CP_CPC_STATUS",
1367 "name": "CP_CPC_BUSY_STAT",
1373 "name": "CP_CPC_STALLED_STAT1",
1379 "name": "CP_CPF_STATUS",
1385 "name": "CP_CPF_BUSY_STAT",
1391 "name": "CP_CPF_STALLED_STAT1",
1397 "name": "CP_CPC_GRBM_FREE_COUNT",
1403 "name": "CP_CPC_SCRATCH_INDEX",
1409 "name": "CP_CPC_SCRATCH_DATA"
1414 "name": "CP_CPC_HALT_HYST_COUNT",
1420 "name": "SQ_THREAD_TRACE_CNTR"
1425 "name": "SQ_BUF_RSRC_WORD0"
1430 "name": "SQ_BUF_RSRC_WORD1",
1436 "name": "SQ_BUF_RSRC_WORD2"
1441 "name": "SQ_BUF_RSRC_WORD3",
1447 "name": "SQ_IMG_RSRC_WORD0"
1452 "name": "SQ_IMG_RSRC_WORD1",
1458 "name": "SQ_IMG_RSRC_WORD2",
1464 "name": "SQ_IMG_RSRC_WORD3",
1470 "name": "SQ_IMG_RSRC_WORD4",
1476 "name": "SQ_IMG_RSRC_WORD5",
1482 "name": "SQ_IMG_RSRC_WORD6",
1488 "name": "SQ_IMG_RSRC_WORD7"
1493 "name": "SQ_IMG_SAMP_WORD0",
1499 "name": "SQ_IMG_SAMP_WORD1",
1505 "name": "SQ_IMG_SAMP_WORD2",
1511 "name": "SQ_IMG_SAMP_WORD3",
1517 "name": "SPI_CONFIG_CNTL",
1523 "name": "GB_ADDR_CONFIG",
1529 "name": "GB_TILE_MODE0",
1535 "name": "GB_TILE_MODE1",
1541 "name": "GB_TILE_MODE2",
1547 "name": "GB_TILE_MODE3",
1553 "name": "GB_TILE_MODE4",
1559 "name": "GB_TILE_MODE5",
1565 "name": "GB_TILE_MODE6",
1571 "name": "GB_TILE_MODE7",
1577 "name": "GB_TILE_MODE8",
1583 "name": "GB_TILE_MODE9",
1589 "name": "GB_TILE_MODE10",
1595 "name": "GB_TILE_MODE11",
1601 "name": "GB_TILE_MODE12",
1607 "name": "GB_TILE_MODE13",
1613 "name": "GB_TILE_MODE14",
1619 "name": "GB_TILE_MODE15",
1625 "name": "GB_TILE_MODE16",
1631 "name": "GB_TILE_MODE17",
1637 "name": "GB_TILE_MODE18",
1643 "name": "GB_TILE_MODE19",
1649 "name": "GB_TILE_MODE20",
1655 "name": "GB_TILE_MODE21",
1661 "name": "GB_TILE_MODE22",
1667 "name": "GB_TILE_MODE23",
1673 "name": "GB_TILE_MODE24",
1679 "name": "GB_TILE_MODE25",
1685 "name": "GB_TILE_MODE26",
1691 "name": "GB_TILE_MODE27",
1697 "name": "GB_TILE_MODE28",
1703 "name": "GB_TILE_MODE29",
1709 "name": "GB_TILE_MODE30",
1715 "name": "GB_TILE_MODE31",
1721 "name": "GB_MACROTILE_MODE0",
1727 "name": "GB_MACROTILE_MODE1",
1733 "name": "GB_MACROTILE_MODE2",
1739 "name": "GB_MACROTILE_MODE3",
1745 "name": "GB_MACROTILE_MODE4",
1751 "name": "GB_MACROTILE_MODE5",
1757 "name": "GB_MACROTILE_MODE6",
1763 "name": "GB_MACROTILE_MODE7",
1769 "name": "GB_MACROTILE_MODE8",
1775 "name": "GB_MACROTILE_MODE9",
1781 "name": "GB_MACROTILE_MODE10",
1787 "name": "GB_MACROTILE_MODE11",
1793 "name": "GB_MACROTILE_MODE12",
1799 "name": "GB_MACROTILE_MODE13",
1805 "name": "GB_MACROTILE_MODE14",
1811 "name": "GB_MACROTILE_MODE15",
1817 "name": "SPI_SHADER_TBA_LO_PS"
1822 "name": "SPI_SHADER_TBA_HI_PS",
1828 "name": "SPI_SHADER_TMA_LO_PS"
1833 "name": "SPI_SHADER_TMA_HI_PS",
1839 "name": "SPI_SHADER_PGM_RSRC3_PS",
1845 "name": "SPI_SHADER_PGM_LO_PS"
1850 "name": "SPI_SHADER_PGM_HI_PS",
1856 "name": "SPI_SHADER_PGM_RSRC1_PS",
1862 "name": "SPI_SHADER_PGM_RSRC2_PS",
1868 "name": "SPI_SHADER_USER_DATA_PS_0"
1873 "name": "SPI_SHADER_USER_DATA_PS_1"
1878 "name": "SPI_SHADER_USER_DATA_PS_2"
1883 "name": "SPI_SHADER_USER_DATA_PS_3"
1888 "name": "SPI_SHADER_USER_DATA_PS_4"
1893 "name": "SPI_SHADER_USER_DATA_PS_5"
1898 "name": "SPI_SHADER_USER_DATA_PS_6"
1903 "name": "SPI_SHADER_USER_DATA_PS_7"
1908 "name": "SPI_SHADER_USER_DATA_PS_8"
1913 "name": "SPI_SHADER_USER_DATA_PS_9"
1918 "name": "SPI_SHADER_USER_DATA_PS_10"
1923 "name": "SPI_SHADER_USER_DATA_PS_11"
1928 "name": "SPI_SHADER_USER_DATA_PS_12"
1933 "name": "SPI_SHADER_USER_DATA_PS_13"
1938 "name": "SPI_SHADER_USER_DATA_PS_14"
1943 "name": "SPI_SHADER_USER_DATA_PS_15"
1948 "name": "SPI_SHADER_TBA_LO_VS"
1953 "name": "SPI_SHADER_TBA_HI_VS",
1959 "name": "SPI_SHADER_TMA_LO_VS"
1964 "name": "SPI_SHADER_TMA_HI_VS",
1970 "name": "SPI_SHADER_PGM_RSRC3_VS",
1976 "name": "SPI_SHADER_LATE_ALLOC_VS",
1982 "name": "SPI_SHADER_PGM_LO_VS"
1987 "name": "SPI_SHADER_PGM_HI_VS",
1993 "name": "SPI_SHADER_PGM_RSRC1_VS",
1999 "name": "SPI_SHADER_PGM_RSRC2_VS",
2005 "name": "SPI_SHADER_USER_DATA_VS_0"
2010 "name": "SPI_SHADER_USER_DATA_VS_1"
2015 "name": "SPI_SHADER_USER_DATA_VS_2"
2020 "name": "SPI_SHADER_USER_DATA_VS_3"
2025 "name": "SPI_SHADER_USER_DATA_VS_4"
2030 "name": "SPI_SHADER_USER_DATA_VS_5"
2035 "name": "SPI_SHADER_USER_DATA_VS_6"
2040 "name": "SPI_SHADER_USER_DATA_VS_7"
2045 "name": "SPI_SHADER_USER_DATA_VS_8"
2050 "name": "SPI_SHADER_USER_DATA_VS_9"
2055 "name": "SPI_SHADER_USER_DATA_VS_10"
2060 "name": "SPI_SHADER_USER_DATA_VS_11"
2065 "name": "SPI_SHADER_USER_DATA_VS_12"
2070 "name": "SPI_SHADER_USER_DATA_VS_13"
2075 "name": "SPI_SHADER_USER_DATA_VS_14"
2080 "name": "SPI_SHADER_USER_DATA_VS_15"
2085 "name": "SPI_SHADER_PGM_RSRC2_ES_VS",
2091 "name": "SPI_SHADER_PGM_RSRC2_LS_VS",
2097 "name": "SPI_SHADER_TBA_LO_GS"
2102 "name": "SPI_SHADER_TBA_HI_GS",
2108 "name": "SPI_SHADER_TMA_LO_GS"
2113 "name": "SPI_SHADER_TMA_HI_GS",
2119 "name": "SPI_SHADER_PGM_RSRC3_GS",
2125 "name": "SPI_SHADER_PGM_LO_GS"
2130 "name": "SPI_SHADER_PGM_HI_GS",
2136 "name": "SPI_SHADER_PGM_RSRC1_GS",
2142 "name": "SPI_SHADER_PGM_RSRC2_GS",
2148 "name": "SPI_SHADER_USER_DATA_GS_0"
2153 "name": "SPI_SHADER_USER_DATA_GS_1"
2158 "name": "SPI_SHADER_USER_DATA_GS_2"
2163 "name": "SPI_SHADER_USER_DATA_GS_3"
2168 "name": "SPI_SHADER_USER_DATA_GS_4"
2173 "name": "SPI_SHADER_USER_DATA_GS_5"
2178 "name": "SPI_SHADER_USER_DATA_GS_6"
2183 "name": "SPI_SHADER_USER_DATA_GS_7"
2188 "name": "SPI_SHADER_USER_DATA_GS_8"
2193 "name": "SPI_SHADER_USER_DATA_GS_9"
2198 "name": "SPI_SHADER_USER_DATA_GS_10"
2203 "name": "SPI_SHADER_USER_DATA_GS_11"
2208 "name": "SPI_SHADER_USER_DATA_GS_12"
2213 "name": "SPI_SHADER_USER_DATA_GS_13"
2218 "name": "SPI_SHADER_USER_DATA_GS_14"
2223 "name": "SPI_SHADER_USER_DATA_GS_15"
2228 "name": "SPI_SHADER_PGM_RSRC2_ES_GS",
2234 "name": "SPI_SHADER_TBA_LO_ES"
2239 "name": "SPI_SHADER_TBA_HI_ES",
2245 "name": "SPI_SHADER_TMA_LO_ES"
2250 "name": "SPI_SHADER_TMA_HI_ES",
2256 "name": "SPI_SHADER_PGM_RSRC3_ES",
2262 "name": "SPI_SHADER_PGM_LO_ES"
2267 "name": "SPI_SHADER_PGM_HI_ES",
2273 "name": "SPI_SHADER_PGM_RSRC1_ES",
2279 "name": "SPI_SHADER_PGM_RSRC2_ES",
2285 "name": "SPI_SHADER_USER_DATA_ES_0"
2290 "name": "SPI_SHADER_USER_DATA_ES_1"
2295 "name": "SPI_SHADER_USER_DATA_ES_2"
2300 "name": "SPI_SHADER_USER_DATA_ES_3"
2305 "name": "SPI_SHADER_USER_DATA_ES_4"
2310 "name": "SPI_SHADER_USER_DATA_ES_5"
2315 "name": "SPI_SHADER_USER_DATA_ES_6"
2320 "name": "SPI_SHADER_USER_DATA_ES_7"
2325 "name": "SPI_SHADER_USER_DATA_ES_8"
2330 "name": "SPI_SHADER_USER_DATA_ES_9"
2335 "name": "SPI_SHADER_USER_DATA_ES_10"
2340 "name": "SPI_SHADER_USER_DATA_ES_11"
2345 "name": "SPI_SHADER_USER_DATA_ES_12"
2350 "name": "SPI_SHADER_USER_DATA_ES_13"
2355 "name": "SPI_SHADER_USER_DATA_ES_14"
2360 "name": "SPI_SHADER_USER_DATA_ES_15"
2365 "name": "SPI_SHADER_PGM_RSRC2_LS_ES",
2371 "name": "SPI_SHADER_TBA_LO_HS"
2376 "name": "SPI_SHADER_TBA_HI_HS",
2382 "name": "SPI_SHADER_TMA_LO_HS"
2387 "name": "SPI_SHADER_TMA_HI_HS",
2393 "name": "SPI_SHADER_PGM_RSRC3_HS",
2399 "name": "SPI_SHADER_PGM_LO_HS"
2404 "name": "SPI_SHADER_PGM_HI_HS",
2410 "name": "SPI_SHADER_PGM_RSRC1_HS",
2416 "name": "SPI_SHADER_PGM_RSRC2_HS",
2422 "name": "SPI_SHADER_USER_DATA_HS_0"
2427 "name": "SPI_SHADER_USER_DATA_HS_1"
2432 "name": "SPI_SHADER_USER_DATA_HS_2"
2437 "name": "SPI_SHADER_USER_DATA_HS_3"
2442 "name": "SPI_SHADER_USER_DATA_HS_4"
2447 "name": "SPI_SHADER_USER_DATA_HS_5"
2452 "name": "SPI_SHADER_USER_DATA_HS_6"
2457 "name": "SPI_SHADER_USER_DATA_HS_7"
2462 "name": "SPI_SHADER_USER_DATA_HS_8"
2467 "name": "SPI_SHADER_USER_DATA_HS_9"
2472 "name": "SPI_SHADER_USER_DATA_HS_10"
2477 "name": "SPI_SHADER_USER_DATA_HS_11"
2482 "name": "SPI_SHADER_USER_DATA_HS_12"
2487 "name": "SPI_SHADER_USER_DATA_HS_13"
2492 "name": "SPI_SHADER_USER_DATA_HS_14"
2497 "name": "SPI_SHADER_USER_DATA_HS_15"
2502 "name": "SPI_SHADER_PGM_RSRC2_LS_HS",
2508 "name": "SPI_SHADER_TBA_LO_LS"
2513 "name": "SPI_SHADER_TBA_HI_LS",
2519 "name": "SPI_SHADER_TMA_LO_LS"
2524 "name": "SPI_SHADER_TMA_HI_LS",
2530 "name": "SPI_SHADER_PGM_RSRC3_LS",
2536 "name": "SPI_SHADER_PGM_LO_LS"
2541 "name": "SPI_SHADER_PGM_HI_LS",
2547 "name": "SPI_SHADER_PGM_RSRC1_LS",
2553 "name": "SPI_SHADER_PGM_RSRC2_LS",
2559 "name": "SPI_SHADER_USER_DATA_LS_0"
2564 "name": "SPI_SHADER_USER_DATA_LS_1"
2569 "name": "SPI_SHADER_USER_DATA_LS_2"
2574 "name": "SPI_SHADER_USER_DATA_LS_3"
2579 "name": "SPI_SHADER_USER_DATA_LS_4"
2584 "name": "SPI_SHADER_USER_DATA_LS_5"
2589 "name": "SPI_SHADER_USER_DATA_LS_6"
2594 "name": "SPI_SHADER_USER_DATA_LS_7"
2599 "name": "SPI_SHADER_USER_DATA_LS_8"
2604 "name": "SPI_SHADER_USER_DATA_LS_9"
2609 "name": "SPI_SHADER_USER_DATA_LS_10"
2614 "name": "SPI_SHADER_USER_DATA_LS_11"
2619 "name": "SPI_SHADER_USER_DATA_LS_12"
2624 "name": "SPI_SHADER_USER_DATA_LS_13"
2629 "name": "SPI_SHADER_USER_DATA_LS_14"
2634 "name": "SPI_SHADER_USER_DATA_LS_15"
2639 "name": "COMPUTE_DISPATCH_INITIATOR",
2645 "name": "COMPUTE_DIM_X"
2650 "name": "COMPUTE_DIM_Y"
2655 "name": "COMPUTE_DIM_Z"
2660 "name": "COMPUTE_START_X"
2665 "name": "COMPUTE_START_Y"
2670 "name": "COMPUTE_START_Z"
2675 "name": "COMPUTE_NUM_THREAD_X",
2681 "name": "COMPUTE_NUM_THREAD_Y",
2687 "name": "COMPUTE_NUM_THREAD_Z",
2693 "name": "COMPUTE_PIPELINESTAT_ENABLE",
2699 "name": "COMPUTE_PERFCOUNT_ENABLE",
2705 "name": "COMPUTE_PGM_LO"
2710 "name": "COMPUTE_PGM_HI",
2716 "name": "COMPUTE_TBA_LO"
2721 "name": "COMPUTE_TBA_HI",
2727 "name": "COMPUTE_TMA_LO"
2732 "name": "COMPUTE_TMA_HI",
2738 "name": "COMPUTE_PGM_RSRC1",
2744 "name": "COMPUTE_PGM_RSRC2",
2750 "name": "COMPUTE_VMID",
2756 "name": "COMPUTE_RESOURCE_LIMITS",
2762 "name": "COMPUTE_STATIC_THREAD_MGMT_SE0",
2768 "name": "COMPUTE_STATIC_THREAD_MGMT_SE1",
2774 "name": "COMPUTE_TMPRING_SIZE",
2780 "name": "COMPUTE_STATIC_THREAD_MGMT_SE2",
2786 "name": "COMPUTE_STATIC_THREAD_MGMT_SE3",
2792 "name": "COMPUTE_RESTART_X"
2797 "name": "COMPUTE_RESTART_Y"
2802 "name": "COMPUTE_RESTART_Z"
2807 "name": "COMPUTE_THREAD_TRACE_ENABLE",
2813 "name": "COMPUTE_MISC_RESERVED",
2819 "name": "COMPUTE_DISPATCH_ID"
2824 "name": "COMPUTE_THREADGROUP_ID"
2829 "name": "COMPUTE_RELAUNCH",
2835 "name": "COMPUTE_WAVE_RESTORE_ADDR_LO"
2840 "name": "COMPUTE_WAVE_RESTORE_ADDR_HI",
2846 "name": "COMPUTE_WAVE_RESTORE_CONTROL",
2852 "name": "COMPUTE_USER_DATA_0"
2857 "name": "COMPUTE_USER_DATA_1"
2862 "name": "COMPUTE_USER_DATA_2"
2867 "name": "COMPUTE_USER_DATA_3"
2872 "name": "COMPUTE_USER_DATA_4"
2877 "name": "COMPUTE_USER_DATA_5"
2882 "name": "COMPUTE_USER_DATA_6"
2887 "name": "COMPUTE_USER_DATA_7"
2892 "name": "COMPUTE_USER_DATA_8"
2897 "name": "COMPUTE_USER_DATA_9"
2902 "name": "COMPUTE_USER_DATA_10"
2907 "name": "COMPUTE_USER_DATA_11"
2912 "name": "COMPUTE_USER_DATA_12"
2917 "name": "COMPUTE_USER_DATA_13"
2922 "name": "COMPUTE_USER_DATA_14"
2927 "name": "COMPUTE_USER_DATA_15"
2932 "name": "COMPUTE_NOWHERE"
2937 "name": "DB_RENDER_CONTROL",
2943 "name": "DB_COUNT_CONTROL",
2949 "name": "DB_DEPTH_VIEW",
2955 "name": "DB_RENDER_OVERRIDE",
2961 "name": "DB_RENDER_OVERRIDE2",
2967 "name": "DB_HTILE_DATA_BASE"
2972 "name": "DB_DEPTH_BOUNDS_MIN"
2977 "name": "DB_DEPTH_BOUNDS_MAX"
2982 "name": "DB_STENCIL_CLEAR",
2988 "name": "DB_DEPTH_CLEAR"
2993 "name": "PA_SC_SCREEN_SCISSOR_TL",
2999 "name": "PA_SC_SCREEN_SCISSOR_BR",
3005 "name": "DB_DEPTH_INFO",
3011 "name": "DB_Z_INFO",
3017 "name": "DB_STENCIL_INFO",
3023 "name": "DB_Z_READ_BASE"
3028 "name": "DB_STENCIL_READ_BASE"
3033 "name": "DB_Z_WRITE_BASE"
3038 "name": "DB_STENCIL_WRITE_BASE"
3043 "name": "DB_DEPTH_SIZE",
3049 "name": "DB_DEPTH_SLICE",
3055 "name": "TA_BC_BASE_ADDR"
3060 "name": "TA_BC_BASE_ADDR_HI",
3066 "name": "COHER_DEST_BASE_HI_0"
3071 "name": "COHER_DEST_BASE_HI_1"
3076 "name": "COHER_DEST_BASE_HI_2"
3081 "name": "COHER_DEST_BASE_HI_3"
3086 "name": "COHER_DEST_BASE_2"
3091 "name": "COHER_DEST_BASE_3"
3096 "name": "PA_SC_WINDOW_OFFSET",
3102 "name": "PA_SC_WINDOW_SCISSOR_TL",
3108 "name": "PA_SC_WINDOW_SCISSOR_BR",
3114 "name": "PA_SC_CLIPRECT_RULE",
3120 "name": "PA_SC_CLIPRECT_0_TL",
3126 "name": "PA_SC_CLIPRECT_0_BR",
3132 "name": "PA_SC_CLIPRECT_1_TL",
3138 "name": "PA_SC_CLIPRECT_1_BR",
3144 "name": "PA_SC_CLIPRECT_2_TL",
3150 "name": "PA_SC_CLIPRECT_2_BR",
3156 "name": "PA_SC_CLIPRECT_3_TL",
3162 "name": "PA_SC_CLIPRECT_3_BR",
3168 "name": "PA_SC_EDGERULE",
3174 "name": "PA_SU_HARDWARE_SCREEN_OFFSET",
3180 "name": "CB_TARGET_MASK",
3186 "name": "CB_SHADER_MASK",
3192 "name": "PA_SC_GENERIC_SCISSOR_TL",
3198 "name": "PA_SC_GENERIC_SCISSOR_BR",
3204 "name": "COHER_DEST_BASE_0"
3209 "name": "COHER_DEST_BASE_1"
3214 "name": "PA_SC_VPORT_SCISSOR_0_TL",
3220 "name": "PA_SC_VPORT_SCISSOR_0_BR",
3226 "name": "PA_SC_VPORT_SCISSOR_1_TL",
3232 "name": "PA_SC_VPORT_SCISSOR_1_BR",
3238 "name": "PA_SC_VPORT_SCISSOR_2_TL",
3244 "name": "PA_SC_VPORT_SCISSOR_2_BR",
3250 "name": "PA_SC_VPORT_SCISSOR_3_TL",
3256 "name": "PA_SC_VPORT_SCISSOR_3_BR",
3262 "name": "PA_SC_VPORT_SCISSOR_4_TL",
3268 "name": "PA_SC_VPORT_SCISSOR_4_BR",
3274 "name": "PA_SC_VPORT_SCISSOR_5_TL",
3280 "name": "PA_SC_VPORT_SCISSOR_5_BR",
3286 "name": "PA_SC_VPORT_SCISSOR_6_TL",
3292 "name": "PA_SC_VPORT_SCISSOR_6_BR",
3298 "name": "PA_SC_VPORT_SCISSOR_7_TL",
3304 "name": "PA_SC_VPORT_SCISSOR_7_BR",
3310 "name": "PA_SC_VPORT_SCISSOR_8_TL",
3316 "name": "PA_SC_VPORT_SCISSOR_8_BR",
3322 "name": "PA_SC_VPORT_SCISSOR_9_TL",
3328 "name": "PA_SC_VPORT_SCISSOR_9_BR",
3334 "name": "PA_SC_VPORT_SCISSOR_10_TL",
3340 "name": "PA_SC_VPORT_SCISSOR_10_BR",
3346 "name": "PA_SC_VPORT_SCISSOR_11_TL",
3352 "name": "PA_SC_VPORT_SCISSOR_11_BR",
3358 "name": "PA_SC_VPORT_SCISSOR_12_TL",
3364 "name": "PA_SC_VPORT_SCISSOR_12_BR",
3370 "name": "PA_SC_VPORT_SCISSOR_13_TL",
3376 "name": "PA_SC_VPORT_SCISSOR_13_BR",
3382 "name": "PA_SC_VPORT_SCISSOR_14_TL",
3388 "name": "PA_SC_VPORT_SCISSOR_14_BR",
3394 "name": "PA_SC_VPORT_SCISSOR_15_TL",
3400 "name": "PA_SC_VPORT_SCISSOR_15_BR",
3406 "name": "PA_SC_VPORT_ZMIN_0"
3411 "name": "PA_SC_VPORT_ZMAX_0"
3416 "name": "PA_SC_VPORT_ZMIN_1"
3421 "name": "PA_SC_VPORT_ZMAX_1"
3426 "name": "PA_SC_VPORT_ZMIN_2"
3431 "name": "PA_SC_VPORT_ZMAX_2"
3436 "name": "PA_SC_VPORT_ZMIN_3"
3441 "name": "PA_SC_VPORT_ZMAX_3"
3446 "name": "PA_SC_VPORT_ZMIN_4"
3451 "name": "PA_SC_VPORT_ZMAX_4"
3456 "name": "PA_SC_VPORT_ZMIN_5"
3461 "name": "PA_SC_VPORT_ZMAX_5"
3466 "name": "PA_SC_VPORT_ZMIN_6"
3471 "name": "PA_SC_VPORT_ZMAX_6"
3476 "name": "PA_SC_VPORT_ZMIN_7"
3481 "name": "PA_SC_VPORT_ZMAX_7"
3486 "name": "PA_SC_VPORT_ZMIN_8"
3491 "name": "PA_SC_VPORT_ZMAX_8"
3496 "name": "PA_SC_VPORT_ZMIN_9"
3501 "name": "PA_SC_VPORT_ZMAX_9"
3506 "name": "PA_SC_VPORT_ZMIN_10"
3511 "name": "PA_SC_VPORT_ZMAX_10"
3516 "name": "PA_SC_VPORT_ZMIN_11"
3521 "name": "PA_SC_VPORT_ZMAX_11"
3526 "name": "PA_SC_VPORT_ZMIN_12"
3531 "name": "PA_SC_VPORT_ZMAX_12"
3536 "name": "PA_SC_VPORT_ZMIN_13"
3541 "name": "PA_SC_VPORT_ZMAX_13"
3546 "name": "PA_SC_VPORT_ZMIN_14"
3551 "name": "PA_SC_VPORT_ZMAX_14"
3556 "name": "PA_SC_VPORT_ZMIN_15"
3561 "name": "PA_SC_VPORT_ZMAX_15"
3566 "name": "PA_SC_RASTER_CONFIG",
3572 "name": "PA_SC_RASTER_CONFIG_1",
3578 "name": "PA_SC_SCREEN_EXTENT_CONTROL",
3584 "name": "CP_PERFMON_CNTX_CNTL",
3590 "name": "CP_RINGID",
3596 "name": "CP_VMID",
3602 "name": "VGT_MAX_VTX_INDX"
3607 "name": "VGT_MIN_VTX_INDX"
3612 "name": "VGT_INDX_OFFSET"
3617 "name": "VGT_MULTI_PRIM_IB_RESET_INDX"
3622 "name": "CB_BLEND_RED"
3627 "name": "CB_BLEND_GREEN"
3632 "name": "CB_BLEND_BLUE"
3637 "name": "CB_BLEND_ALPHA"
3642 "name": "CB_DCC_CONTROL",
3648 "name": "DB_STENCIL_CONTROL",
3654 "name": "DB_STENCILREFMASK",
3660 "name": "DB_STENCILREFMASK_BF",
3666 "name": "PA_CL_VPORT_XSCALE"
3671 "name": "PA_CL_VPORT_XOFFSET"
3676 "name": "PA_CL_VPORT_YSCALE"
3681 "name": "PA_CL_VPORT_YOFFSET"
3686 "name": "PA_CL_VPORT_ZSCALE"
3691 "name": "PA_CL_VPORT_ZOFFSET"
3696 "name": "PA_CL_VPORT_XSCALE_1"
3701 "name": "PA_CL_VPORT_XOFFSET_1"
3706 "name": "PA_CL_VPORT_YSCALE_1"
3711 "name": "PA_CL_VPORT_YOFFSET_1"
3716 "name": "PA_CL_VPORT_ZSCALE_1"
3721 "name": "PA_CL_VPORT_ZOFFSET_1"
3726 "name": "PA_CL_VPORT_XSCALE_2"
3731 "name": "PA_CL_VPORT_XOFFSET_2"
3736 "name": "PA_CL_VPORT_YSCALE_2"
3741 "name": "PA_CL_VPORT_YOFFSET_2"
3746 "name": "PA_CL_VPORT_ZSCALE_2"
3751 "name": "PA_CL_VPORT_ZOFFSET_2"
3756 "name": "PA_CL_VPORT_XSCALE_3"
3761 "name": "PA_CL_VPORT_XOFFSET_3"
3766 "name": "PA_CL_VPORT_YSCALE_3"
3771 "name": "PA_CL_VPORT_YOFFSET_3"
3776 "name": "PA_CL_VPORT_ZSCALE_3"
3781 "name": "PA_CL_VPORT_ZOFFSET_3"
3786 "name": "PA_CL_VPORT_XSCALE_4"
3791 "name": "PA_CL_VPORT_XOFFSET_4"
3796 "name": "PA_CL_VPORT_YSCALE_4"
3801 "name": "PA_CL_VPORT_YOFFSET_4"
3806 "name": "PA_CL_VPORT_ZSCALE_4"
3811 "name": "PA_CL_VPORT_ZOFFSET_4"
3816 "name": "PA_CL_VPORT_XSCALE_5"
3821 "name": "PA_CL_VPORT_XOFFSET_5"
3826 "name": "PA_CL_VPORT_YSCALE_5"
3831 "name": "PA_CL_VPORT_YOFFSET_5"
3836 "name": "PA_CL_VPORT_ZSCALE_5"
3841 "name": "PA_CL_VPORT_ZOFFSET_5"
3846 "name": "PA_CL_VPORT_XSCALE_6"
3851 "name": "PA_CL_VPORT_XOFFSET_6"
3856 "name": "PA_CL_VPORT_YSCALE_6"
3861 "name": "PA_CL_VPORT_YOFFSET_6"
3866 "name": "PA_CL_VPORT_ZSCALE_6"
3871 "name": "PA_CL_VPORT_ZOFFSET_6"
3876 "name": "PA_CL_VPORT_XSCALE_7"
3881 "name": "PA_CL_VPORT_XOFFSET_7"
3886 "name": "PA_CL_VPORT_YSCALE_7"
3891 "name": "PA_CL_VPORT_YOFFSET_7"
3896 "name": "PA_CL_VPORT_ZSCALE_7"
3901 "name": "PA_CL_VPORT_ZOFFSET_7"
3906 "name": "PA_CL_VPORT_XSCALE_8"
3911 "name": "PA_CL_VPORT_XOFFSET_8"
3916 "name": "PA_CL_VPORT_YSCALE_8"
3921 "name": "PA_CL_VPORT_YOFFSET_8"
3926 "name": "PA_CL_VPORT_ZSCALE_8"
3931 "name": "PA_CL_VPORT_ZOFFSET_8"
3936 "name": "PA_CL_VPORT_XSCALE_9"
3941 "name": "PA_CL_VPORT_XOFFSET_9"
3946 "name": "PA_CL_VPORT_YSCALE_9"
3951 "name": "PA_CL_VPORT_YOFFSET_9"
3956 "name": "PA_CL_VPORT_ZSCALE_9"
3961 "name": "PA_CL_VPORT_ZOFFSET_9"
3966 "name": "PA_CL_VPORT_XSCALE_10"
3971 "name": "PA_CL_VPORT_XOFFSET_10"
3976 "name": "PA_CL_VPORT_YSCALE_10"
3981 "name": "PA_CL_VPORT_YOFFSET_10"
3986 "name": "PA_CL_VPORT_ZSCALE_10"
3991 "name": "PA_CL_VPORT_ZOFFSET_10"
3996 "name": "PA_CL_VPORT_XSCALE_11"
4001 "name": "PA_CL_VPORT_XOFFSET_11"
4006 "name": "PA_CL_VPORT_YSCALE_11"
4011 "name": "PA_CL_VPORT_YOFFSET_11"
4016 "name": "PA_CL_VPORT_ZSCALE_11"
4021 "name": "PA_CL_VPORT_ZOFFSET_11"
4026 "name": "PA_CL_VPORT_XSCALE_12"
4031 "name": "PA_CL_VPORT_XOFFSET_12"
4036 "name": "PA_CL_VPORT_YSCALE_12"
4041 "name": "PA_CL_VPORT_YOFFSET_12"
4046 "name": "PA_CL_VPORT_ZSCALE_12"
4051 "name": "PA_CL_VPORT_ZOFFSET_12"
4056 "name": "PA_CL_VPORT_XSCALE_13"
4061 "name": "PA_CL_VPORT_XOFFSET_13"
4066 "name": "PA_CL_VPORT_YSCALE_13"
4071 "name": "PA_CL_VPORT_YOFFSET_13"
4076 "name": "PA_CL_VPORT_ZSCALE_13"
4081 "name": "PA_CL_VPORT_ZOFFSET_13"
4086 "name": "PA_CL_VPORT_XSCALE_14"
4091 "name": "PA_CL_VPORT_XOFFSET_14"
4096 "name": "PA_CL_VPORT_YSCALE_14"
4101 "name": "PA_CL_VPORT_YOFFSET_14"
4106 "name": "PA_CL_VPORT_ZSCALE_14"
4111 "name": "PA_CL_VPORT_ZOFFSET_14"
4116 "name": "PA_CL_VPORT_XSCALE_15"
4121 "name": "PA_CL_VPORT_XOFFSET_15"
4126 "name": "PA_CL_VPORT_YSCALE_15"
4131 "name": "PA_CL_VPORT_YOFFSET_15"
4136 "name": "PA_CL_VPORT_ZSCALE_15"
4141 "name": "PA_CL_VPORT_ZOFFSET_15"
4146 "name": "PA_CL_UCP_0_X"
4151 "name": "PA_CL_UCP_0_Y"
4156 "name": "PA_CL_UCP_0_Z"
4161 "name": "PA_CL_UCP_0_W"
4166 "name": "PA_CL_UCP_1_X"
4171 "name": "PA_CL_UCP_1_Y"
4176 "name": "PA_CL_UCP_1_Z"
4181 "name": "PA_CL_UCP_1_W"
4186 "name": "PA_CL_UCP_2_X"
4191 "name": "PA_CL_UCP_2_Y"
4196 "name": "PA_CL_UCP_2_Z"
4201 "name": "PA_CL_UCP_2_W"
4206 "name": "PA_CL_UCP_3_X"
4211 "name": "PA_CL_UCP_3_Y"
4216 "name": "PA_CL_UCP_3_Z"
4221 "name": "PA_CL_UCP_3_W"
4226 "name": "PA_CL_UCP_4_X"
4231 "name": "PA_CL_UCP_4_Y"
4236 "name": "PA_CL_UCP_4_Z"
4241 "name": "PA_CL_UCP_4_W"
4246 "name": "PA_CL_UCP_5_X"
4251 "name": "PA_CL_UCP_5_Y"
4256 "name": "PA_CL_UCP_5_Z"
4261 "name": "PA_CL_UCP_5_W"
4266 "name": "SPI_PS_INPUT_CNTL_0",
4272 "name": "SPI_PS_INPUT_CNTL_1",
4278 "name": "SPI_PS_INPUT_CNTL_2",
4284 "name": "SPI_PS_INPUT_CNTL_3",
4290 "name": "SPI_PS_INPUT_CNTL_4",
4296 "name": "SPI_PS_INPUT_CNTL_5",
4302 "name": "SPI_PS_INPUT_CNTL_6",
4308 "name": "SPI_PS_INPUT_CNTL_7",
4314 "name": "SPI_PS_INPUT_CNTL_8",
4320 "name": "SPI_PS_INPUT_CNTL_9",
4326 "name": "SPI_PS_INPUT_CNTL_10",
4332 "name": "SPI_PS_INPUT_CNTL_11",
4338 "name": "SPI_PS_INPUT_CNTL_12",
4344 "name": "SPI_PS_INPUT_CNTL_13",
4350 "name": "SPI_PS_INPUT_CNTL_14",
4356 "name": "SPI_PS_INPUT_CNTL_15",
4362 "name": "SPI_PS_INPUT_CNTL_16",
4368 "name": "SPI_PS_INPUT_CNTL_17",
4374 "name": "SPI_PS_INPUT_CNTL_18",
4380 "name": "SPI_PS_INPUT_CNTL_19",
4386 "name": "SPI_PS_INPUT_CNTL_20",
4392 "name": "SPI_PS_INPUT_CNTL_21",
4398 "name": "SPI_PS_INPUT_CNTL_22",
4404 "name": "SPI_PS_INPUT_CNTL_23",
4410 "name": "SPI_PS_INPUT_CNTL_24",
4416 "name": "SPI_PS_INPUT_CNTL_25",
4422 "name": "SPI_PS_INPUT_CNTL_26",
4428 "name": "SPI_PS_INPUT_CNTL_27",
4434 "name": "SPI_PS_INPUT_CNTL_28",
4440 "name": "SPI_PS_INPUT_CNTL_29",
4446 "name": "SPI_PS_INPUT_CNTL_30",
4452 "name": "SPI_PS_INPUT_CNTL_31",
4458 "name": "SPI_VS_OUT_CONFIG",
4464 "name": "SPI_PS_INPUT_ENA",
4470 "name": "SPI_PS_INPUT_ADDR",
4476 "name": "SPI_INTERP_CONTROL_0",
4482 "name": "SPI_PS_IN_CONTROL",
4488 "name": "SPI_BARYC_CNTL",
4494 "name": "SPI_TMPRING_SIZE",
4500 "name": "SPI_SHADER_POS_FORMAT",
4506 "name": "SPI_SHADER_Z_FORMAT",
4512 "name": "SPI_SHADER_COL_FORMAT",
4518 "name": "SX_PS_DOWNCONVERT",
4524 "name": "SX_BLEND_OPT_EPSILON",
4530 "name": "SX_BLEND_OPT_CONTROL",
4536 "name": "SX_MRT0_BLEND_OPT",
4542 "name": "SX_MRT1_BLEND_OPT",
4548 "name": "SX_MRT2_BLEND_OPT",
4554 "name": "SX_MRT3_BLEND_OPT",
4560 "name": "SX_MRT4_BLEND_OPT",
4566 "name": "SX_MRT5_BLEND_OPT",
4572 "name": "SX_MRT6_BLEND_OPT",
4578 "name": "SX_MRT7_BLEND_OPT",
4584 "name": "CB_BLEND0_CONTROL",
4590 "name": "CB_BLEND1_CONTROL",
4596 "name": "CB_BLEND2_CONTROL",
4602 "name": "CB_BLEND3_CONTROL",
4608 "name": "CB_BLEND4_CONTROL",
4614 "name": "CB_BLEND5_CONTROL",
4620 "name": "CB_BLEND6_CONTROL",
4626 "name": "CB_BLEND7_CONTROL",
4632 "name": "CS_COPY_STATE",
4638 "name": "GFX_COPY_STATE",
4644 "name": "PA_CL_POINT_X_RAD"
4649 "name": "PA_CL_POINT_Y_RAD"
4654 "name": "PA_CL_POINT_SIZE"
4659 "name": "PA_CL_POINT_CULL_RAD"
4664 "name": "VGT_DMA_BASE_HI",
4670 "name": "VGT_DMA_BASE"
4675 "name": "VGT_DRAW_INITIATOR",
4681 "name": "VGT_IMMED_DATA"
4686 "name": "VGT_EVENT_ADDRESS_REG",
4692 "name": "DB_DEPTH_CONTROL",
4698 "name": "DB_EQAA",
4704 "name": "CB_COLOR_CONTROL",
4710 "name": "DB_SHADER_CONTROL",
4716 "name": "PA_CL_CLIP_CNTL",
4722 "name": "PA_SU_SC_MODE_CNTL",
4728 "name": "PA_CL_VTE_CNTL",
4734 "name": "PA_CL_VS_OUT_CNTL",
4740 "name": "PA_CL_NANINF_CNTL",
4746 "name": "PA_SU_LINE_STIPPLE_CNTL",
4752 "name": "PA_SU_LINE_STIPPLE_SCALE"
4757 "name": "PA_SU_PRIM_FILTER_CNTL",
4763 "name": "PA_SU_POINT_SIZE",
4769 "name": "PA_SU_POINT_MINMAX",
4775 "name": "PA_SU_LINE_CNTL",
4781 "name": "PA_SC_LINE_STIPPLE",
4787 "name": "VGT_OUTPUT_PATH_CNTL",
4793 "name": "VGT_HOS_CNTL",
4799 "name": "VGT_HOS_MAX_TESS_LEVEL"
4804 "name": "VGT_HOS_MIN_TESS_LEVEL"
4809 "name": "VGT_HOS_REUSE_DEPTH",
4815 "name": "VGT_GROUP_PRIM_TYPE",
4821 "name": "VGT_GROUP_FIRST_DECR",
4827 "name": "VGT_GROUP_DECR",
4833 "name": "VGT_GROUP_VECT_0_CNTL",
4839 "name": "VGT_GROUP_VECT_1_CNTL",
4845 "name": "VGT_GROUP_VECT_0_FMT_CNTL",
4851 "name": "VGT_GROUP_VECT_1_FMT_CNTL",
4857 "name": "VGT_GS_MODE",
4863 "name": "VGT_GS_ONCHIP_CNTL",
4869 "name": "PA_SC_MODE_CNTL_0",
4875 "name": "PA_SC_MODE_CNTL_1",
4881 "name": "VGT_ENHANCE"
4886 "name": "VGT_GS_PER_ES",
4892 "name": "VGT_ES_PER_GS",
4898 "name": "VGT_GS_PER_VS",
4904 "name": "VGT_GSVS_RING_OFFSET_1",
4910 "name": "VGT_GSVS_RING_OFFSET_2",
4916 "name": "VGT_GSVS_RING_OFFSET_3",
4922 "name": "VGT_GS_OUT_PRIM_TYPE",
4928 "name": "IA_ENHANCE"
4933 "name": "VGT_DMA_SIZE"
4938 "name": "VGT_DMA_MAX_SIZE"
4943 "name": "VGT_DMA_INDEX_TYPE",
4949 "name": "WD_ENHANCE"
4954 "name": "VGT_PRIMITIVEID_EN",
4960 "name": "VGT_DMA_NUM_INSTANCES"
4965 "name": "VGT_PRIMITIVEID_RESET"
4970 "name": "VGT_EVENT_INITIATOR",
4976 "name": "VGT_MULTI_PRIM_IB_RESET_EN",
4982 "name": "VGT_INSTANCE_STEP_RATE_0"
4987 "name": "VGT_INSTANCE_STEP_RATE_1"
4992 "name": "IA_MULTI_VGT_PARAM",
4998 "name": "VGT_ESGS_RING_ITEMSIZE",
5004 "name": "VGT_GSVS_RING_ITEMSIZE",
5010 "name": "VGT_REUSE_OFF",
5016 "name": "VGT_VTX_CNT_EN",
5022 "name": "DB_HTILE_SURFACE",
5028 "name": "DB_SRESULTS_COMPARE_STATE0",
5034 "name": "DB_SRESULTS_COMPARE_STATE1",
5040 "name": "DB_PRELOAD_CONTROL",
5046 "name": "VGT_STRMOUT_BUFFER_SIZE_0"
5051 "name": "VGT_STRMOUT_VTX_STRIDE_0",
5057 "name": "VGT_STRMOUT_BUFFER_OFFSET_0"
5062 "name": "VGT_STRMOUT_BUFFER_SIZE_1"
5067 "name": "VGT_STRMOUT_VTX_STRIDE_1",
5073 "name": "VGT_STRMOUT_BUFFER_OFFSET_1"
5078 "name": "VGT_STRMOUT_BUFFER_SIZE_2"
5083 "name": "VGT_STRMOUT_VTX_STRIDE_2",
5089 "name": "VGT_STRMOUT_BUFFER_OFFSET_2"
5094 "name": "VGT_STRMOUT_BUFFER_SIZE_3"
5099 "name": "VGT_STRMOUT_VTX_STRIDE_3",
5105 "name": "VGT_STRMOUT_BUFFER_OFFSET_3"
5110 "name": "VGT_STRMOUT_DRAW_OPAQUE_OFFSET"
5115 "name": "VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE"
5120 "name": "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE",
5126 "name": "VGT_GS_MAX_VERT_OUT",
5132 "name": "VGT_TESS_DISTRIBUTION",
5138 "name": "VGT_SHADER_STAGES_EN",
5144 "name": "VGT_LS_HS_CONFIG",
5150 "name": "VGT_GS_VERT_ITEMSIZE",
5156 "name": "VGT_GS_VERT_ITEMSIZE_1",
5162 "name": "VGT_GS_VERT_ITEMSIZE_2",
5168 "name": "VGT_GS_VERT_ITEMSIZE_3",
5174 "name": "VGT_TF_PARAM",
5180 "name": "DB_ALPHA_TO_MASK",
5186 "name": "VGT_DISPATCH_DRAW_INDEX"
5191 "name": "PA_SU_POLY_OFFSET_DB_FMT_CNTL",
5197 "name": "PA_SU_POLY_OFFSET_CLAMP"
5202 "name": "PA_SU_POLY_OFFSET_FRONT_SCALE"
5207 "name": "PA_SU_POLY_OFFSET_FRONT_OFFSET"
5212 "name": "PA_SU_POLY_OFFSET_BACK_SCALE"
5217 "name": "PA_SU_POLY_OFFSET_BACK_OFFSET"
5222 "name": "VGT_GS_INSTANCE_CNT",
5228 "name": "VGT_STRMOUT_CONFIG",
5234 "name": "VGT_STRMOUT_BUFFER_CONFIG",
5240 "name": "PA_SC_CENTROID_PRIORITY_0",
5246 "name": "PA_SC_CENTROID_PRIORITY_1",
5252 "name": "PA_SC_LINE_CNTL",
5258 "name": "PA_SC_AA_CONFIG",
5264 "name": "PA_SU_VTX_CNTL",
5270 "name": "PA_CL_GB_VERT_CLIP_ADJ"
5275 "name": "PA_CL_GB_VERT_DISC_ADJ"
5280 "name": "PA_CL_GB_HORZ_CLIP_ADJ"
5285 "name": "PA_CL_GB_HORZ_DISC_ADJ"
5290 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0",
5296 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1",
5302 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2",
5308 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3",
5314 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0",
5320 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1",
5326 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2",
5332 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3",
5338 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0",
5344 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1",
5350 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2",
5356 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3",
5362 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0",
5368 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1",
5374 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2",
5380 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3",
5386 "name": "PA_SC_AA_MASK_X0Y0_X1Y0",
5392 "name": "PA_SC_AA_MASK_X0Y1_X1Y1",
5398 "name": "PA_SC_SHADER_CONTROL",
5404 "name": "VGT_VERTEX_REUSE_BLOCK_CNTL",
5410 "name": "VGT_OUT_DEALLOC_CNTL",
5416 "name": "CB_COLOR0_BASE"
5421 "name": "CB_COLOR0_PITCH",
5427 "name": "CB_COLOR0_SLICE",
5433 "name": "CB_COLOR0_VIEW",
5439 "name": "CB_COLOR0_INFO",
5445 "name": "CB_COLOR0_ATTRIB",
5451 "name": "CB_COLOR0_DCC_CONTROL",
5457 "name": "CB_COLOR0_CMASK"
5462 "name": "CB_COLOR0_CMASK_SLICE",
5468 "name": "CB_COLOR0_FMASK"
5473 "name": "CB_COLOR0_FMASK_SLICE",
5479 "name": "CB_COLOR0_CLEAR_WORD0"
5484 "name": "CB_COLOR0_CLEAR_WORD1"
5489 "name": "CB_COLOR0_DCC_BASE"
5494 "name": "CB_COLOR1_BASE"
5499 "name": "CB_COLOR1_PITCH",
5505 "name": "CB_COLOR1_SLICE",
5511 "name": "CB_COLOR1_VIEW",
5517 "name": "CB_COLOR1_INFO",
5523 "name": "CB_COLOR1_ATTRIB",
5529 "name": "CB_COLOR1_DCC_CONTROL",
5535 "name": "CB_COLOR1_CMASK"
5540 "name": "CB_COLOR1_CMASK_SLICE",
5546 "name": "CB_COLOR1_FMASK"
5551 "name": "CB_COLOR1_FMASK_SLICE",
5557 "name": "CB_COLOR1_CLEAR_WORD0"
5562 "name": "CB_COLOR1_CLEAR_WORD1"
5567 "name": "CB_COLOR1_DCC_BASE"
5572 "name": "CB_COLOR2_BASE"
5577 "name": "CB_COLOR2_PITCH",
5583 "name": "CB_COLOR2_SLICE",
5589 "name": "CB_COLOR2_VIEW",
5595 "name": "CB_COLOR2_INFO",
5601 "name": "CB_COLOR2_ATTRIB",
5607 "name": "CB_COLOR2_DCC_CONTROL",
5613 "name": "CB_COLOR2_CMASK"
5618 "name": "CB_COLOR2_CMASK_SLICE",
5624 "name": "CB_COLOR2_FMASK"
5629 "name": "CB_COLOR2_FMASK_SLICE",
5635 "name": "CB_COLOR2_CLEAR_WORD0"
5640 "name": "CB_COLOR2_CLEAR_WORD1"
5645 "name": "CB_COLOR2_DCC_BASE"
5650 "name": "CB_COLOR3_BASE"
5655 "name": "CB_COLOR3_PITCH",
5661 "name": "CB_COLOR3_SLICE",
5667 "name": "CB_COLOR3_VIEW",
5673 "name": "CB_COLOR3_INFO",
5679 "name": "CB_COLOR3_ATTRIB",
5685 "name": "CB_COLOR3_DCC_CONTROL",
5691 "name": "CB_COLOR3_CMASK"
5696 "name": "CB_COLOR3_CMASK_SLICE",
5702 "name": "CB_COLOR3_FMASK"
5707 "name": "CB_COLOR3_FMASK_SLICE",
5713 "name": "CB_COLOR3_CLEAR_WORD0"
5718 "name": "CB_COLOR3_CLEAR_WORD1"
5723 "name": "CB_COLOR3_DCC_BASE"
5728 "name": "CB_COLOR4_BASE"
5733 "name": "CB_COLOR4_PITCH",
5739 "name": "CB_COLOR4_SLICE",
5745 "name": "CB_COLOR4_VIEW",
5751 "name": "CB_COLOR4_INFO",
5757 "name": "CB_COLOR4_ATTRIB",
5763 "name": "CB_COLOR4_DCC_CONTROL",
5769 "name": "CB_COLOR4_CMASK"
5774 "name": "CB_COLOR4_CMASK_SLICE",
5780 "name": "CB_COLOR4_FMASK"
5785 "name": "CB_COLOR4_FMASK_SLICE",
5791 "name": "CB_COLOR4_CLEAR_WORD0"
5796 "name": "CB_COLOR4_CLEAR_WORD1"
5801 "name": "CB_COLOR4_DCC_BASE"
5806 "name": "CB_COLOR5_BASE"
5811 "name": "CB_COLOR5_PITCH",
5817 "name": "CB_COLOR5_SLICE",
5823 "name": "CB_COLOR5_VIEW",
5829 "name": "CB_COLOR5_INFO",
5835 "name": "CB_COLOR5_ATTRIB",
5841 "name": "CB_COLOR5_DCC_CONTROL",
5847 "name": "CB_COLOR5_CMASK"
5852 "name": "CB_COLOR5_CMASK_SLICE",
5858 "name": "CB_COLOR5_FMASK"
5863 "name": "CB_COLOR5_FMASK_SLICE",
5869 "name": "CB_COLOR5_CLEAR_WORD0"
5874 "name": "CB_COLOR5_CLEAR_WORD1"
5879 "name": "CB_COLOR5_DCC_BASE"
5884 "name": "CB_COLOR6_BASE"
5889 "name": "CB_COLOR6_PITCH",
5895 "name": "CB_COLOR6_SLICE",
5901 "name": "CB_COLOR6_VIEW",
5907 "name": "CB_COLOR6_INFO",
5913 "name": "CB_COLOR6_ATTRIB",
5919 "name": "CB_COLOR6_DCC_CONTROL",
5925 "name": "CB_COLOR6_CMASK"
5930 "name": "CB_COLOR6_CMASK_SLICE",
5936 "name": "CB_COLOR6_FMASK"
5941 "name": "CB_COLOR6_FMASK_SLICE",
5947 "name": "CB_COLOR6_CLEAR_WORD0"
5952 "name": "CB_COLOR6_CLEAR_WORD1"
5957 "name": "CB_COLOR6_DCC_BASE"
5962 "name": "CB_COLOR7_BASE"
5967 "name": "CB_COLOR7_PITCH",
5973 "name": "CB_COLOR7_SLICE",
5979 "name": "CB_COLOR7_VIEW",
5985 "name": "CB_COLOR7_INFO",
5991 "name": "CB_COLOR7_ATTRIB",
5997 "name": "CB_COLOR7_DCC_CONTROL",
6003 "name": "CB_COLOR7_CMASK"
6008 "name": "CB_COLOR7_CMASK_SLICE",
6014 "name": "CB_COLOR7_FMASK"
6019 "name": "CB_COLOR7_FMASK_SLICE",
6025 "name": "CB_COLOR7_CLEAR_WORD0"
6030 "name": "CB_COLOR7_CLEAR_WORD1"
6035 "name": "CB_COLOR7_DCC_BASE"
6040 "name": "CP_EOP_DONE_ADDR_LO",
6046 "name": "CP_EOP_DONE_ADDR_HI",
6052 "name": "CP_EOP_DONE_DATA_LO"
6057 "name": "CP_EOP_DONE_DATA_HI"
6062 "name": "CP_EOP_LAST_FENCE_LO"
6067 "name": "CP_EOP_LAST_FENCE_HI"
6072 "name": "CP_STREAM_OUT_ADDR_LO",
6078 "name": "CP_STREAM_OUT_ADDR_HI",
6084 "name": "CP_NUM_PRIM_WRITTEN_COUNT0_LO"
6089 "name": "CP_NUM_PRIM_WRITTEN_COUNT0_HI"
6094 "name": "CP_NUM_PRIM_NEEDED_COUNT0_LO"
6099 "name": "CP_NUM_PRIM_NEEDED_COUNT0_HI"
6104 "name": "CP_NUM_PRIM_WRITTEN_COUNT1_LO"
6109 "name": "CP_NUM_PRIM_WRITTEN_COUNT1_HI"
6114 "name": "CP_NUM_PRIM_NEEDED_COUNT1_LO"
6119 "name": "CP_NUM_PRIM_NEEDED_COUNT1_HI"
6124 "name": "CP_NUM_PRIM_WRITTEN_COUNT2_LO"
6129 "name": "CP_NUM_PRIM_WRITTEN_COUNT2_HI"
6134 "name": "CP_NUM_PRIM_NEEDED_COUNT2_LO"
6139 "name": "CP_NUM_PRIM_NEEDED_COUNT2_HI"
6144 "name": "CP_NUM_PRIM_WRITTEN_COUNT3_LO"
6149 "name": "CP_NUM_PRIM_WRITTEN_COUNT3_HI"
6154 "name": "CP_NUM_PRIM_NEEDED_COUNT3_LO"
6159 "name": "CP_NUM_PRIM_NEEDED_COUNT3_HI"
6164 "name": "CP_PIPE_STATS_ADDR_LO",
6170 "name": "CP_PIPE_STATS_ADDR_HI",
6176 "name": "CP_VGT_IAVERT_COUNT_LO"
6181 "name": "CP_VGT_IAVERT_COUNT_HI"
6186 "name": "CP_VGT_IAPRIM_COUNT_LO"
6191 "name": "CP_VGT_IAPRIM_COUNT_HI"
6196 "name": "CP_VGT_GSPRIM_COUNT_LO"
6201 "name": "CP_VGT_GSPRIM_COUNT_HI"
6206 "name": "CP_VGT_VSINVOC_COUNT_LO"
6211 "name": "CP_VGT_VSINVOC_COUNT_HI"
6216 "name": "CP_VGT_GSINVOC_COUNT_LO"
6221 "name": "CP_VGT_GSINVOC_COUNT_HI"
6226 "name": "CP_VGT_HSINVOC_COUNT_LO"
6231 "name": "CP_VGT_HSINVOC_COUNT_HI"
6236 "name": "CP_VGT_DSINVOC_COUNT_LO"
6241 "name": "CP_VGT_DSINVOC_COUNT_HI"
6246 "name": "CP_PA_CINVOC_COUNT_LO"
6251 "name": "CP_PA_CINVOC_COUNT_HI"
6256 "name": "CP_PA_CPRIM_COUNT_LO"
6261 "name": "CP_PA_CPRIM_COUNT_HI"
6266 "name": "CP_SC_PSINVOC_COUNT0_LO"
6271 "name": "CP_SC_PSINVOC_COUNT0_HI"
6276 "name": "CP_SC_PSINVOC_COUNT1_LO"
6281 "name": "CP_SC_PSINVOC_COUNT1_HI"
6286 "name": "CP_VGT_CSINVOC_COUNT_LO"
6291 "name": "CP_VGT_CSINVOC_COUNT_HI"
6296 "name": "CP_PIPE_STATS_CONTROL",
6302 "name": "CP_STREAM_OUT_CONTROL",
6308 "name": "CP_STRMOUT_CNTL",
6314 "name": "SCRATCH_REG0"
6319 "name": "SCRATCH_REG1"
6324 "name": "SCRATCH_REG2"
6329 "name": "SCRATCH_REG3"
6334 "name": "SCRATCH_REG4"
6339 "name": "SCRATCH_REG5"
6344 "name": "SCRATCH_REG6"
6349 "name": "SCRATCH_REG7"
6354 "name": "SCRATCH_UMSK",
6360 "name": "SCRATCH_ADDR"
6365 "name": "CP_PFP_ATOMIC_PREOP_LO"
6370 "name": "CP_PFP_ATOMIC_PREOP_HI"
6375 "name": "CP_PFP_GDS_ATOMIC0_PREOP_LO"
6380 "name": "CP_PFP_GDS_ATOMIC0_PREOP_HI"
6385 "name": "CP_PFP_GDS_ATOMIC1_PREOP_LO"
6390 "name": "CP_PFP_GDS_ATOMIC1_PREOP_HI"
6395 "name": "CP_APPEND_ADDR_LO",
6401 "name": "CP_APPEND_ADDR_HI",
6407 "name": "CP_APPEND_DATA"
6412 "name": "CP_APPEND_LAST_CS_FENCE"
6417 "name": "CP_APPEND_LAST_PS_FENCE"
6422 "name": "CP_ATOMIC_PREOP_LO"
6427 "name": "CP_ATOMIC_PREOP_HI"
6432 "name": "CP_GDS_ATOMIC0_PREOP_LO"
6437 "name": "CP_GDS_ATOMIC0_PREOP_HI"
6442 "name": "CP_GDS_ATOMIC1_PREOP_LO"
6447 "name": "CP_GDS_ATOMIC1_PREOP_HI"
6452 "name": "CP_ME_MC_WADDR_LO",
6458 "name": "CP_ME_MC_WADDR_HI",
6464 "name": "CP_ME_MC_WDATA_LO"
6469 "name": "CP_ME_MC_WDATA_HI"
6474 "name": "CP_ME_MC_RADDR_LO",
6480 "name": "CP_ME_MC_RADDR_HI",
6486 "name": "CP_SEM_WAIT_TIMER"
6491 "name": "CP_SIG_SEM_ADDR_LO",
6497 "name": "CP_SIG_SEM_ADDR_HI",
6503 "name": "CP_WAIT_REG_MEM_TIMEOUT"
6508 "name": "CP_WAIT_SEM_ADDR_LO",
6514 "name": "CP_WAIT_SEM_ADDR_HI",
6520 "name": "CP_DMA_PFP_CONTROL",
6526 "name": "CP_DMA_ME_CONTROL",
6532 "name": "CP_COHER_BASE_HI",
6538 "name": "CP_COHER_START_DELAY",
6544 "name": "CP_COHER_CNTL",
6550 "name": "CP_COHER_SIZE"
6555 "name": "CP_COHER_BASE"
6560 "name": "CP_COHER_STATUS",
6566 "name": "CP_DMA_ME_SRC_ADDR"
6571 "name": "CP_DMA_ME_SRC_ADDR_HI",
6577 "name": "CP_DMA_ME_DST_ADDR"
6582 "name": "CP_DMA_ME_DST_ADDR_HI",
6588 "name": "CP_DMA_ME_COMMAND",
6594 "name": "CP_DMA_PFP_SRC_ADDR"
6599 "name": "CP_DMA_PFP_SRC_ADDR_HI",
6605 "name": "CP_DMA_PFP_DST_ADDR"
6610 "name": "CP_DMA_PFP_DST_ADDR_HI",
6616 "name": "CP_DMA_PFP_COMMAND",
6622 "name": "CP_DMA_CNTL",
6628 "name": "CP_DMA_READ_TAGS",
6634 "name": "CP_COHER_SIZE_HI",
6640 "name": "CP_PFP_IB_CONTROL",
6646 "name": "CP_PFP_LOAD_CONTROL",
6652 "name": "CP_SCRATCH_INDEX",
6658 "name": "CP_SCRATCH_DATA"
6663 "name": "CP_RB_OFFSET",
6669 "name": "CP_IB1_OFFSET",
6675 "name": "CP_IB2_OFFSET",
6681 "name": "CP_IB1_PREAMBLE_BEGIN",
6687 "name": "CP_IB1_PREAMBLE_END",
6693 "name": "CP_IB2_PREAMBLE_BEGIN",
6699 "name": "CP_IB2_PREAMBLE_END",
6705 "name": "CP_CE_IB1_OFFSET",
6711 "name": "CP_CE_IB2_OFFSET",
6717 "name": "CP_CE_COUNTER"
6722 "name": "CP_CE_RB_OFFSET",
6728 "name": "CP_CE_INIT_BASE_LO",
6734 "name": "CP_CE_INIT_BASE_HI",
6740 "name": "CP_CE_INIT_BUFSZ",
6746 "name": "CP_CE_IB1_BASE_LO",
6752 "name": "CP_CE_IB1_BASE_HI",
6758 "name": "CP_CE_IB1_BUFSZ",
6764 "name": "CP_CE_IB2_BASE_LO",
6770 "name": "CP_CE_IB2_BASE_HI",
6776 "name": "CP_CE_IB2_BUFSZ",
6782 "name": "CP_IB1_BASE_LO",
6788 "name": "CP_IB1_BASE_HI",
6794 "name": "CP_IB1_BUFSZ",
6800 "name": "CP_IB2_BASE_LO",
6806 "name": "CP_IB2_BASE_HI",
6812 "name": "CP_IB2_BUFSZ",
6818 "name": "CP_ST_BASE_LO",
6824 "name": "CP_ST_BASE_HI",
6830 "name": "CP_ST_BUFSZ",
6836 "name": "CP_EOP_DONE_EVENT_CNTL",
6842 "name": "CP_EOP_DONE_DATA_CNTL",
6848 "name": "CP_EOP_DONE_CNTX_ID",
6854 "name": "CP_PFP_COMPLETION_STATUS",
6860 "name": "CP_CE_COMPLETION_STATUS",
6866 "name": "CP_PRED_NOT_VISIBLE",
6872 "name": "CP_PFP_METADATA_BASE_ADDR"
6877 "name": "CP_PFP_METADATA_BASE_ADDR_HI",
6883 "name": "CP_CE_METADATA_BASE_ADDR"
6888 "name": "CP_CE_METADATA_BASE_ADDR_HI",
6894 "name": "CP_DRAW_INDX_INDR_ADDR"
6899 "name": "CP_DRAW_INDX_INDR_ADDR_HI",
6905 "name": "CP_DISPATCH_INDR_ADDR"
6910 "name": "CP_DISPATCH_INDR_ADDR_HI",
6916 "name": "CP_INDEX_BASE_ADDR"
6921 "name": "CP_INDEX_BASE_ADDR_HI",
6927 "name": "CP_INDEX_TYPE",
6933 "name": "CP_GDS_BKUP_ADDR"
6938 "name": "CP_GDS_BKUP_ADDR_HI",
6944 "name": "CP_SAMPLE_STATUS",
6950 "name": "GRBM_GFX_INDEX",
6956 "name": "VGT_ESGS_RING_SIZE"
6961 "name": "VGT_GSVS_RING_SIZE"
6966 "name": "VGT_PRIMITIVE_TYPE",
6972 "name": "VGT_INDEX_TYPE",
6978 "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_0"
6983 "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_1"
6988 "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_2"
6993 "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_3"
6998 "name": "VGT_NUM_INDICES"
7003 "name": "VGT_NUM_INSTANCES"
7008 "name": "VGT_TF_RING_SIZE",
7014 "name": "VGT_HS_OFFCHIP_PARAM",
7020 "name": "VGT_TF_MEMORY_BASE"
7025 "name": "PA_SU_LINE_STIPPLE_VALUE",
7031 "name": "PA_SC_LINE_STIPPLE_STATE",
7037 "name": "PA_SC_SCREEN_EXTENT_MIN_0",
7043 "name": "PA_SC_SCREEN_EXTENT_MAX_0",
7049 "name": "PA_SC_SCREEN_EXTENT_MIN_1",
7055 "name": "PA_SC_SCREEN_EXTENT_MAX_1",
7061 "name": "PA_SC_P3D_TRAP_SCREEN_HV_EN",
7067 "name": "PA_SC_P3D_TRAP_SCREEN_H",
7073 "name": "PA_SC_P3D_TRAP_SCREEN_V",
7079 "name": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE",
7085 "name": "PA_SC_P3D_TRAP_SCREEN_COUNT",
7091 "name": "PA_SC_HP3D_TRAP_SCREEN_HV_EN",
7097 "name": "PA_SC_HP3D_TRAP_SCREEN_H",
7103 "name": "PA_SC_HP3D_TRAP_SCREEN_V",
7109 "name": "PA_SC_HP3D_TRAP_SCREEN_OCCURRENCE",
7115 "name": "PA_SC_HP3D_TRAP_SCREEN_COUNT",
7121 "name": "PA_SC_TRAP_SCREEN_HV_EN",
7127 "name": "PA_SC_TRAP_SCREEN_H",
7133 "name": "PA_SC_TRAP_SCREEN_V",
7139 "name": "PA_SC_TRAP_SCREEN_OCCURRENCE",
7145 "name": "PA_SC_TRAP_SCREEN_COUNT",
7151 "name": "SQ_THREAD_TRACE_BASE"
7156 "name": "SQ_THREAD_TRACE_SIZE",
7162 "name": "SQ_THREAD_TRACE_MASK",
7168 "name": "SQ_THREAD_TRACE_TOKEN_MASK",
7174 "name": "SQ_THREAD_TRACE_PERF_MASK",
7180 "name": "SQ_THREAD_TRACE_CTRL",
7186 "name": "SQ_THREAD_TRACE_MODE",
7192 "name": "SQ_THREAD_TRACE_BASE2",
7198 "name": "SQ_THREAD_TRACE_TOKEN_MASK2"
7203 "name": "SQ_THREAD_TRACE_WPTR",
7209 "name": "SQ_THREAD_TRACE_STATUS",
7215 "name": "SQ_THREAD_TRACE_HIWATER",
7221 "name": "SQ_THREAD_TRACE_USERDATA_0"
7226 "name": "SQ_THREAD_TRACE_USERDATA_1"
7231 "name": "SQ_THREAD_TRACE_USERDATA_2"
7236 "name": "SQ_THREAD_TRACE_USERDATA_3"
7241 "name": "SQC_CACHES",
7247 "name": "SQC_WRITEBACK",
7253 "name": "TA_CS_BC_BASE_ADDR"
7258 "name": "TA_CS_BC_BASE_ADDR_HI",
7264 "name": "DB_OCCLUSION_COUNT0_LOW"
7269 "name": "DB_OCCLUSION_COUNT0_HI",
7275 "name": "DB_OCCLUSION_COUNT1_LOW"
7280 "name": "DB_OCCLUSION_COUNT1_HI",
7286 "name": "DB_OCCLUSION_COUNT2_LOW"
7291 "name": "DB_OCCLUSION_COUNT2_HI",
7297 "name": "DB_OCCLUSION_COUNT3_LOW"
7302 "name": "DB_OCCLUSION_COUNT3_HI",
7308 "name": "DB_ZPASS_COUNT_LOW"
7313 "name": "DB_ZPASS_COUNT_HI",
7319 "name": "GDS_RD_ADDR"
7324 "name": "GDS_RD_DATA"
7329 "name": "GDS_RD_BURST_ADDR"
7334 "name": "GDS_RD_BURST_COUNT"
7339 "name": "GDS_RD_BURST_DATA"
7344 "name": "GDS_WR_ADDR"
7349 "name": "GDS_WR_DATA"
7354 "name": "GDS_WR_BURST_ADDR"
7359 "name": "GDS_WR_BURST_DATA"
7364 "name": "GDS_WRITE_COMPLETE"
7369 "name": "GDS_ATOM_CNTL",
7375 "name": "GDS_ATOM_COMPLETE",
7381 "name": "GDS_ATOM_BASE",
7387 "name": "GDS_ATOM_SIZE",
7393 "name": "GDS_ATOM_OFFSET0",
7399 "name": "GDS_ATOM_OFFSET1",
7405 "name": "GDS_ATOM_DST"
7410 "name": "GDS_ATOM_OP",
7416 "name": "GDS_ATOM_SRC0"
7421 "name": "GDS_ATOM_SRC0_U"
7426 "name": "GDS_ATOM_SRC1"
7431 "name": "GDS_ATOM_SRC1_U"
7436 "name": "GDS_ATOM_READ0"
7441 "name": "GDS_ATOM_READ0_U"
7446 "name": "GDS_ATOM_READ1"
7451 "name": "GDS_ATOM_READ1_U"
7456 "name": "GDS_GWS_RESOURCE_CNTL",
7462 "name": "GDS_GWS_RESOURCE",
7468 "name": "GDS_GWS_RESOURCE_CNT",
7474 "name": "GDS_OA_CNTL",
7480 "name": "GDS_OA_COUNTER"
7485 "name": "GDS_OA_ADDRESS",
7491 "name": "GDS_OA_INCDEC",
7497 "name": "GDS_OA_RING_SIZE"
7502 "name": "CPG_PERFCOUNTER1_LO"
7507 "name": "CPG_PERFCOUNTER1_HI"
7512 "name": "CPG_PERFCOUNTER0_LO"
7517 "name": "CPG_PERFCOUNTER0_HI"
7522 "name": "CPC_PERFCOUNTER1_LO"
7527 "name": "CPC_PERFCOUNTER1_HI"
7532 "name": "CPC_PERFCOUNTER0_LO"
7537 "name": "CPC_PERFCOUNTER0_HI"
7542 "name": "CPF_PERFCOUNTER1_LO"
7547 "name": "CPF_PERFCOUNTER1_HI"
7552 "name": "CPF_PERFCOUNTER0_LO"
7557 "name": "CPF_PERFCOUNTER0_HI"
7562 "name": "GRBM_PERFCOUNTER0_LO"
7567 "name": "GRBM_PERFCOUNTER0_HI"
7572 "name": "GRBM_PERFCOUNTER1_LO"
7577 "name": "GRBM_PERFCOUNTER1_HI"
7582 "name": "GRBM_SE0_PERFCOUNTER_LO"
7587 "name": "GRBM_SE0_PERFCOUNTER_HI"
7592 "name": "GRBM_SE1_PERFCOUNTER_LO"
7597 "name": "GRBM_SE1_PERFCOUNTER_HI"
7602 "name": "GRBM_SE2_PERFCOUNTER_LO"
7607 "name": "GRBM_SE2_PERFCOUNTER_HI"
7612 "name": "GRBM_SE3_PERFCOUNTER_LO"
7617 "name": "GRBM_SE3_PERFCOUNTER_HI"
7622 "name": "WD_PERFCOUNTER0_LO"
7627 "name": "WD_PERFCOUNTER0_HI"
7632 "name": "WD_PERFCOUNTER1_LO"
7637 "name": "WD_PERFCOUNTER1_HI"
7642 "name": "WD_PERFCOUNTER2_LO"
7647 "name": "WD_PERFCOUNTER2_HI"
7652 "name": "WD_PERFCOUNTER3_LO"
7657 "name": "WD_PERFCOUNTER3_HI"
7662 "name": "IA_PERFCOUNTER0_LO"
7667 "name": "IA_PERFCOUNTER0_HI"
7672 "name": "IA_PERFCOUNTER1_LO"
7677 "name": "IA_PERFCOUNTER1_HI"
7682 "name": "IA_PERFCOUNTER2_LO"
7687 "name": "IA_PERFCOUNTER2_HI"
7692 "name": "IA_PERFCOUNTER3_LO"
7697 "name": "IA_PERFCOUNTER3_HI"
7702 "name": "VGT_PERFCOUNTER0_LO"
7707 "name": "VGT_PERFCOUNTER0_HI"
7712 "name": "VGT_PERFCOUNTER1_LO"
7717 "name": "VGT_PERFCOUNTER1_HI"
7722 "name": "VGT_PERFCOUNTER2_LO"
7727 "name": "VGT_PERFCOUNTER2_HI"
7732 "name": "VGT_PERFCOUNTER3_LO"
7737 "name": "VGT_PERFCOUNTER3_HI"
7742 "name": "PA_SU_PERFCOUNTER0_LO"
7747 "name": "PA_SU_PERFCOUNTER0_HI",
7753 "name": "PA_SU_PERFCOUNTER1_LO"
7758 "name": "PA_SU_PERFCOUNTER1_HI",
7764 "name": "PA_SU_PERFCOUNTER2_LO"
7769 "name": "PA_SU_PERFCOUNTER2_HI",
7775 "name": "PA_SU_PERFCOUNTER3_LO"
7780 "name": "PA_SU_PERFCOUNTER3_HI",
7786 "name": "PA_SC_PERFCOUNTER0_LO"
7791 "name": "PA_SC_PERFCOUNTER0_HI"
7796 "name": "PA_SC_PERFCOUNTER1_LO"
7801 "name": "PA_SC_PERFCOUNTER1_HI"
7806 "name": "PA_SC_PERFCOUNTER2_LO"
7811 "name": "PA_SC_PERFCOUNTER2_HI"
7816 "name": "PA_SC_PERFCOUNTER3_LO"
7821 "name": "PA_SC_PERFCOUNTER3_HI"
7826 "name": "PA_SC_PERFCOUNTER4_LO"
7831 "name": "PA_SC_PERFCOUNTER4_HI"
7836 "name": "PA_SC_PERFCOUNTER5_LO"
7841 "name": "PA_SC_PERFCOUNTER5_HI"
7846 "name": "PA_SC_PERFCOUNTER6_LO"
7851 "name": "PA_SC_PERFCOUNTER6_HI"
7856 "name": "PA_SC_PERFCOUNTER7_LO"
7861 "name": "PA_SC_PERFCOUNTER7_HI"
7866 "name": "SPI_PERFCOUNTER0_HI"
7871 "name": "SPI_PERFCOUNTER0_LO"
7876 "name": "SPI_PERFCOUNTER1_HI"
7881 "name": "SPI_PERFCOUNTER1_LO"
7886 "name": "SPI_PERFCOUNTER2_HI"
7891 "name": "SPI_PERFCOUNTER2_LO"
7896 "name": "SPI_PERFCOUNTER3_HI"
7901 "name": "SPI_PERFCOUNTER3_LO"
7906 "name": "SPI_PERFCOUNTER4_HI"
7911 "name": "SPI_PERFCOUNTER4_LO"
7916 "name": "SPI_PERFCOUNTER5_HI"
7921 "name": "SPI_PERFCOUNTER5_LO"
7926 "name": "SQ_PERFCOUNTER0_LO"
7931 "name": "SQ_PERFCOUNTER0_HI"
7936 "name": "SQ_PERFCOUNTER1_LO"
7941 "name": "SQ_PERFCOUNTER1_HI"
7946 "name": "SQ_PERFCOUNTER2_LO"
7951 "name": "SQ_PERFCOUNTER2_HI"
7956 "name": "SQ_PERFCOUNTER3_LO"
7961 "name": "SQ_PERFCOUNTER3_HI"
7966 "name": "SQ_PERFCOUNTER4_LO"
7971 "name": "SQ_PERFCOUNTER4_HI"
7976 "name": "SQ_PERFCOUNTER5_LO"
7981 "name": "SQ_PERFCOUNTER5_HI"
7986 "name": "SQ_PERFCOUNTER6_LO"
7991 "name": "SQ_PERFCOUNTER6_HI"
7996 "name": "SQ_PERFCOUNTER7_LO"
8001 "name": "SQ_PERFCOUNTER7_HI"
8006 "name": "SQ_PERFCOUNTER8_LO"
8011 "name": "SQ_PERFCOUNTER8_HI"
8016 "name": "SQ_PERFCOUNTER9_LO"
8021 "name": "SQ_PERFCOUNTER9_HI"
8026 "name": "SQ_PERFCOUNTER10_LO"
8031 "name": "SQ_PERFCOUNTER10_HI"
8036 "name": "SQ_PERFCOUNTER11_LO"
8041 "name": "SQ_PERFCOUNTER11_HI"
8046 "name": "SQ_PERFCOUNTER12_LO"
8051 "name": "SQ_PERFCOUNTER12_HI"
8056 "name": "SQ_PERFCOUNTER13_LO"
8061 "name": "SQ_PERFCOUNTER13_HI"
8066 "name": "SQ_PERFCOUNTER14_LO"
8071 "name": "SQ_PERFCOUNTER14_HI"
8076 "name": "SQ_PERFCOUNTER15_LO"
8081 "name": "SQ_PERFCOUNTER15_HI"
8086 "name": "SX_PERFCOUNTER0_LO"
8091 "name": "SX_PERFCOUNTER0_HI"
8096 "name": "SX_PERFCOUNTER1_LO"
8101 "name": "SX_PERFCOUNTER1_HI"
8106 "name": "SX_PERFCOUNTER2_LO"
8111 "name": "SX_PERFCOUNTER2_HI"
8116 "name": "SX_PERFCOUNTER3_LO"
8121 "name": "SX_PERFCOUNTER3_HI"
8126 "name": "GDS_PERFCOUNTER0_LO"
8131 "name": "GDS_PERFCOUNTER0_HI"
8136 "name": "GDS_PERFCOUNTER1_LO"
8141 "name": "GDS_PERFCOUNTER1_HI"
8146 "name": "GDS_PERFCOUNTER2_LO"
8151 "name": "GDS_PERFCOUNTER2_HI"
8156 "name": "GDS_PERFCOUNTER3_LO"
8161 "name": "GDS_PERFCOUNTER3_HI"
8166 "name": "TA_PERFCOUNTER0_LO"
8171 "name": "TA_PERFCOUNTER0_HI"
8176 "name": "TA_PERFCOUNTER1_LO"
8181 "name": "TA_PERFCOUNTER1_HI"
8186 "name": "TD_PERFCOUNTER0_LO"
8191 "name": "TD_PERFCOUNTER0_HI"
8196 "name": "TD_PERFCOUNTER1_LO"
8201 "name": "TD_PERFCOUNTER1_HI"
8206 "name": "TCP_PERFCOUNTER0_LO"
8211 "name": "TCP_PERFCOUNTER0_HI"
8216 "name": "TCP_PERFCOUNTER1_LO"
8221 "name": "TCP_PERFCOUNTER1_HI"
8226 "name": "TCP_PERFCOUNTER2_LO"
8231 "name": "TCP_PERFCOUNTER2_HI"
8236 "name": "TCP_PERFCOUNTER3_LO"
8241 "name": "TCP_PERFCOUNTER3_HI"
8246 "name": "TCC_PERFCOUNTER0_LO"
8251 "name": "TCC_PERFCOUNTER0_HI"
8256 "name": "TCC_PERFCOUNTER1_LO"
8261 "name": "TCC_PERFCOUNTER1_HI"
8266 "name": "TCC_PERFCOUNTER2_LO"
8271 "name": "TCC_PERFCOUNTER2_HI"
8276 "name": "TCC_PERFCOUNTER3_LO"
8281 "name": "TCC_PERFCOUNTER3_HI"
8286 "name": "TCA_PERFCOUNTER0_LO"
8291 "name": "TCA_PERFCOUNTER0_HI"
8296 "name": "TCA_PERFCOUNTER1_LO"
8301 "name": "TCA_PERFCOUNTER1_HI"
8306 "name": "TCA_PERFCOUNTER2_LO"
8311 "name": "TCA_PERFCOUNTER2_HI"
8316 "name": "TCA_PERFCOUNTER3_LO"
8321 "name": "TCA_PERFCOUNTER3_HI"
8326 "name": "CB_PERFCOUNTER0_LO"
8331 "name": "CB_PERFCOUNTER0_HI"
8336 "name": "CB_PERFCOUNTER1_LO"
8341 "name": "CB_PERFCOUNTER1_HI"
8346 "name": "CB_PERFCOUNTER2_LO"
8351 "name": "CB_PERFCOUNTER2_HI"
8356 "name": "CB_PERFCOUNTER3_LO"
8361 "name": "CB_PERFCOUNTER3_HI"
8366 "name": "DB_PERFCOUNTER0_LO"
8371 "name": "DB_PERFCOUNTER0_HI"
8376 "name": "DB_PERFCOUNTER1_LO"
8381 "name": "DB_PERFCOUNTER1_HI"
8386 "name": "DB_PERFCOUNTER2_LO"
8391 "name": "DB_PERFCOUNTER2_HI"
8396 "name": "DB_PERFCOUNTER3_LO"
8401 "name": "DB_PERFCOUNTER3_HI"
8406 "name": "RLC_PERFCOUNTER0_LO"
8411 "name": "RLC_PERFCOUNTER0_HI"
8416 "name": "RLC_PERFCOUNTER1_LO"
8421 "name": "RLC_PERFCOUNTER1_HI"
8426 "name": "CPG_PERFCOUNTER1_SELECT",
8432 "name": "CPG_PERFCOUNTER0_SELECT1",
8438 "name": "CPG_PERFCOUNTER0_SELECT",
8444 "name": "CPC_PERFCOUNTER1_SELECT",
8450 "name": "CPC_PERFCOUNTER0_SELECT1",
8456 "name": "CPF_PERFCOUNTER1_SELECT",
8462 "name": "CPF_PERFCOUNTER0_SELECT1",
8468 "name": "CPF_PERFCOUNTER0_SELECT",
8474 "name": "CP_PERFMON_CNTL",
8480 "name": "CPC_PERFCOUNTER0_SELECT",
8486 "name": "CP_DRAW_OBJECT"
8491 "name": "CP_DRAW_OBJECT_COUNTER",
8497 "name": "CP_DRAW_WINDOW_MASK_HI"
8502 "name": "CP_DRAW_WINDOW_HI"
8507 "name": "CP_DRAW_WINDOW_LO",
8513 "name": "CP_DRAW_WINDOW_CNTL",
8519 "name": "GRBM_PERFCOUNTER0_SELECT",
8525 "name": "GRBM_PERFCOUNTER1_SELECT",
8531 "name": "GRBM_SE0_PERFCOUNTER_SELECT",
8537 "name": "GRBM_SE1_PERFCOUNTER_SELECT",
8543 "name": "GRBM_SE2_PERFCOUNTER_SELECT",
8549 "name": "GRBM_SE3_PERFCOUNTER_SELECT",
8555 "name": "WD_PERFCOUNTER0_SELECT",
8561 "name": "WD_PERFCOUNTER1_SELECT",
8567 "name": "WD_PERFCOUNTER2_SELECT",
8573 "name": "WD_PERFCOUNTER3_SELECT",
8579 "name": "IA_PERFCOUNTER0_SELECT",
8585 "name": "IA_PERFCOUNTER1_SELECT",
8591 "name": "IA_PERFCOUNTER2_SELECT",
8597 "name": "IA_PERFCOUNTER3_SELECT",
8603 "name": "IA_PERFCOUNTER0_SELECT1",
8609 "name": "VGT_PERFCOUNTER0_SELECT",
8615 "name": "VGT_PERFCOUNTER1_SELECT",
8621 "name": "VGT_PERFCOUNTER2_SELECT",
8627 "name": "VGT_PERFCOUNTER3_SELECT",
8633 "name": "VGT_PERFCOUNTER0_SELECT1",
8639 "name": "VGT_PERFCOUNTER1_SELECT1",
8645 "name": "VGT_PERFCOUNTER_SEID_MASK",
8651 "name": "PA_SU_PERFCOUNTER0_SELECT",
8657 "name": "PA_SU_PERFCOUNTER0_SELECT1",
8663 "name": "PA_SU_PERFCOUNTER1_SELECT",
8669 "name": "PA_SU_PERFCOUNTER1_SELECT1",
8675 "name": "PA_SU_PERFCOUNTER2_SELECT",
8681 "name": "PA_SU_PERFCOUNTER3_SELECT",
8687 "name": "PA_SC_PERFCOUNTER0_SELECT",
8693 "name": "PA_SC_PERFCOUNTER0_SELECT1",
8699 "name": "PA_SC_PERFCOUNTER1_SELECT",
8705 "name": "PA_SC_PERFCOUNTER2_SELECT",
8711 "name": "PA_SC_PERFCOUNTER3_SELECT",
8717 "name": "PA_SC_PERFCOUNTER4_SELECT",
8723 "name": "PA_SC_PERFCOUNTER5_SELECT",
8729 "name": "PA_SC_PERFCOUNTER6_SELECT",
8735 "name": "PA_SC_PERFCOUNTER7_SELECT",
8741 "name": "SPI_PERFCOUNTER0_SELECT",
8747 "name": "SPI_PERFCOUNTER1_SELECT",
8753 "name": "SPI_PERFCOUNTER2_SELECT",
8759 "name": "SPI_PERFCOUNTER3_SELECT",
8765 "name": "SPI_PERFCOUNTER0_SELECT1",
8771 "name": "SPI_PERFCOUNTER1_SELECT1",
8777 "name": "SPI_PERFCOUNTER2_SELECT1",
8783 "name": "SPI_PERFCOUNTER3_SELECT1",
8789 "name": "SPI_PERFCOUNTER4_SELECT",
8795 "name": "SPI_PERFCOUNTER5_SELECT",
8801 "name": "SPI_PERFCOUNTER_BINS",
8807 "name": "SQ_PERFCOUNTER0_SELECT",
8813 "name": "SQ_PERFCOUNTER1_SELECT",
8819 "name": "SQ_PERFCOUNTER2_SELECT",
8825 "name": "SQ_PERFCOUNTER3_SELECT",
8831 "name": "SQ_PERFCOUNTER4_SELECT",
8837 "name": "SQ_PERFCOUNTER5_SELECT",
8843 "name": "SQ_PERFCOUNTER6_SELECT",
8849 "name": "SQ_PERFCOUNTER7_SELECT",
8855 "name": "SQ_PERFCOUNTER8_SELECT",
8861 "name": "SQ_PERFCOUNTER9_SELECT",
8867 "name": "SQ_PERFCOUNTER10_SELECT",
8873 "name": "SQ_PERFCOUNTER11_SELECT",
8879 "name": "SQ_PERFCOUNTER12_SELECT",
8885 "name": "SQ_PERFCOUNTER13_SELECT",
8891 "name": "SQ_PERFCOUNTER14_SELECT",
8897 "name": "SQ_PERFCOUNTER15_SELECT",
8903 "name": "SQ_PERFCOUNTER_CTRL",
8909 "name": "SQ_PERFCOUNTER_MASK",
8915 "name": "SQ_PERFCOUNTER_CTRL2",
8921 "name": "SX_PERFCOUNTER0_SELECT",
8927 "name": "SX_PERFCOUNTER1_SELECT",
8933 "name": "SX_PERFCOUNTER2_SELECT",
8939 "name": "SX_PERFCOUNTER3_SELECT",
8945 "name": "SX_PERFCOUNTER0_SELECT1",
8951 "name": "SX_PERFCOUNTER1_SELECT1",
8957 "name": "GDS_PERFCOUNTER0_SELECT",
8963 "name": "GDS_PERFCOUNTER1_SELECT",
8969 "name": "GDS_PERFCOUNTER2_SELECT",
8975 "name": "GDS_PERFCOUNTER3_SELECT",
8981 "name": "GDS_PERFCOUNTER0_SELECT1",
8987 "name": "TA_PERFCOUNTER0_SELECT",
8993 "name": "TA_PERFCOUNTER0_SELECT1",
8999 "name": "TA_PERFCOUNTER1_SELECT",
9005 "name": "TD_PERFCOUNTER0_SELECT",
9011 "name": "TD_PERFCOUNTER0_SELECT1",
9017 "name": "TD_PERFCOUNTER1_SELECT",
9023 "name": "TCP_PERFCOUNTER0_SELECT",
9029 "name": "TCP_PERFCOUNTER0_SELECT1",
9035 "name": "TCP_PERFCOUNTER1_SELECT",
9041 "name": "TCP_PERFCOUNTER1_SELECT1",
9047 "name": "TCP_PERFCOUNTER2_SELECT",
9053 "name": "TCP_PERFCOUNTER3_SELECT",
9059 "name": "TCC_PERFCOUNTER0_SELECT",
9065 "name": "TCC_PERFCOUNTER0_SELECT1",
9071 "name": "TCC_PERFCOUNTER1_SELECT",
9077 "name": "TCC_PERFCOUNTER1_SELECT1",
9083 "name": "TCC_PERFCOUNTER2_SELECT",
9089 "name": "TCC_PERFCOUNTER3_SELECT",
9095 "name": "TCA_PERFCOUNTER0_SELECT",
9101 "name": "TCA_PERFCOUNTER0_SELECT1",
9107 "name": "TCA_PERFCOUNTER1_SELECT",
9113 "name": "TCA_PERFCOUNTER1_SELECT1",
9119 "name": "TCA_PERFCOUNTER2_SELECT",
9125 "name": "TCA_PERFCOUNTER3_SELECT",
9131 "name": "CB_PERFCOUNTER_FILTER",
9137 "name": "CB_PERFCOUNTER0_SELECT",
9143 "name": "CB_PERFCOUNTER0_SELECT1",
9149 "name": "CB_PERFCOUNTER1_SELECT",
9155 "name": "CB_PERFCOUNTER2_SELECT",
9161 "name": "CB_PERFCOUNTER3_SELECT",
9167 "name": "DB_PERFCOUNTER0_SELECT",
9173 "name": "DB_PERFCOUNTER0_SELECT1",
9179 "name": "DB_PERFCOUNTER1_SELECT",
9185 "name": "DB_PERFCOUNTER1_SELECT1",
9191 "name": "DB_PERFCOUNTER2_SELECT",
9197 "name": "DB_PERFCOUNTER3_SELECT",
9203 "name": "RLC_SPM_PERFMON_CNTL",
9209 "name": "RLC_SPM_PERFMON_RING_BASE_LO"
9214 "name": "RLC_SPM_PERFMON_RING_BASE_HI",
9220 "name": "RLC_SPM_PERFMON_RING_SIZE"
9225 "name": "RLC_SPM_PERFMON_SEGMENT_SIZE",
9231 "name": "RLC_SPM_SE_MUXSEL_ADDR"
9236 "name": "RLC_SPM_SE_MUXSEL_DATA"
9241 "name": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY",
9247 "name": "RLC_SPM_CPC_PERFMON_SAMPLE_DELAY",
9253 "name": "RLC_SPM_CPF_PERFMON_SAMPLE_DELAY",
9259 "name": "RLC_SPM_CB_PERFMON_SAMPLE_DELAY",
9265 "name": "RLC_SPM_DB_PERFMON_SAMPLE_DELAY",
9271 "name": "RLC_SPM_PA_PERFMON_SAMPLE_DELAY",
9277 "name": "RLC_SPM_GDS_PERFMON_SAMPLE_DELAY",
9283 "name": "RLC_SPM_IA_PERFMON_SAMPLE_DELAY",
9289 "name": "RLC_SPM_SC_PERFMON_SAMPLE_DELAY",
9295 "name": "RLC_SPM_TCC_PERFMON_SAMPLE_DELAY",
9301 "name": "RLC_SPM_TCA_PERFMON_SAMPLE_DELAY",
9307 "name": "RLC_SPM_TCP_PERFMON_SAMPLE_DELAY",
9313 "name": "RLC_SPM_TA_PERFMON_SAMPLE_DELAY",
9319 "name": "RLC_SPM_TD_PERFMON_SAMPLE_DELAY",
9325 "name": "RLC_SPM_VGT_PERFMON_SAMPLE_DELAY",
9331 "name": "RLC_SPM_SPI_PERFMON_SAMPLE_DELAY",
9337 "name": "RLC_SPM_SQG_PERFMON_SAMPLE_DELAY",
9343 "name": "RLC_SPM_SX_PERFMON_SAMPLE_DELAY",
9349 "name": "RLC_SPM_GLOBAL_MUXSEL_ADDR"
9354 "name": "RLC_SPM_GLOBAL_MUXSEL_DATA"
9359 "name": "RLC_SPM_RING_RDPTR"
9364 "name": "RLC_SPM_SEGMENT_THRESHOLD"
9369 "name": "RLC_PERFMON_CLK_CNTL",
9375 "name": "RLC_PERFMON_CNTL",
9381 "name": "RLC_PERFCOUNTER0_SELECT",
9387 "name": "RLC_PERFCOUNTER1_SELECT",
9394 {"bits": [0, 4], "enum_ref": "BlendOp", "name": "COLOR_SRCBLEND"},
9395 {"bits": [5, 7], "enum_ref": "CombFunc", "name": "COLOR_COMB_FCN"},
9396 {"bits": [8, 12], "enum_ref": "BlendOp", "name": "COLOR_DESTBLEND"},
9397 {"bits": [16, 20], "enum_ref": "BlendOp", "name": "ALPHA_SRCBLEND"},
9398 {"bits": [21, 23], "enum_ref": "CombFunc", "name": "ALPHA_COMB_FCN"},
9399 {"bits": [24, 28], "enum_ref": "BlendOp", "name": "ALPHA_DESTBLEND"},
9400 {"bits": [29, 29], "name": "SEPARATE_ALPHA_BLEND"},
9401 {"bits": [30, 30], "name": "ENABLE"},
9402 {"bits": [31, 31], "name": "DISABLE_ROP3"}
9407 {"bits": [0, 4], "name": "TILE_MODE_INDEX"},
9408 {"bits": [5, 9], "name": "FMASK_TILE_MODE_INDEX"},
9409 {"bits": [10, 11], "name": "FMASK_BANK_HEIGHT"},
9410 {"bits": [12, 14], "name": "NUM_SAMPLES"},
9411 {"bits": [15, 16], "name": "NUM_FRAGMENTS"},
9412 {"bits": [17, 17], "name": "FORCE_DST_ALPHA_1"}
9417 {"bits": [0, 13], "name": "TILE_MAX"}
9422 {"bits": [0, 0], "name": "OVERWRITE_COMBINER_DISABLE"},
9423 {"bits": [1, 1], "name": "KEY_CLEAR_ENABLE"},
9424 {"bits": [2, 3], "enum_ref": "CB_COLOR_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE", "name": "MAX_UNCOMPRESSED_BLOCK_SIZE"},
9425 {"bits": [4, 4], "enum_ref": "CB_COLOR_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE", "name": "MIN_COMPRESSED_BLOCK_SIZE"},
9426 {"bits": [5, 6], "name": "MAX_COMPRESSED_BLOCK_SIZE"},
9427 {"bits": [7, 8], "name": "COLOR_TRANSFORM"},
9428 {"bits": [9, 9], "name": "INDEPENDENT_64B_BLOCKS"},
9429 {"bits": [10, 13], "name": "LOSSY_RGB_PRECISION"},
9430 {"bits": [14, 17], "name": "LOSSY_ALPHA_PRECISION"}
9435 {"bits": [0, 1], "enum_ref": "SurfaceEndian", "name": "ENDIAN"},
9436 {"bits": [2, 6], "enum_ref": "ColorFormat", "name": "FORMAT"},
9437 {"bits": [7, 7], "name": "LINEAR_GENERAL"},
9438 {"bits": [8, 10], "enum_ref": "SurfaceNumber", "name": "NUMBER_TYPE"},
9439 {"bits": [11, 12], "enum_ref": "SurfaceSwap", "name": "COMP_SWAP"},
9440 {"bits": [13, 13], "name": "FAST_CLEAR"},
9441 {"bits": [14, 14], "name": "COMPRESSION"},
9442 {"bits": [15, 15], "name": "BLEND_CLAMP"},
9443 {"bits": [16, 16], "name": "BLEND_BYPASS"},
9444 {"bits": [17, 17], "name": "SIMPLE_FLOAT"},
9445 {"bits": [18, 18], "name": "ROUND_MODE"},
9446 {"bits": [19, 19], "name": "CMASK_IS_LINEAR"},
9447 {"bits": [20, 22], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DONT_RD_DST"},
9448 {"bits": [23, 25], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DISCARD_PIXEL"},
9449 {"bits": [26, 26], "name": "FMASK_COMPRESSION_DISABLE"},
9450 {"bits": [27, 27], "name": "FMASK_COMPRESS_1FRAG_ONLY"},
9451 {"bits": [28, 28], "name": "DCC_ENABLE"},
9452 {"bits": [29, 30], "enum_ref": "CmaskAddr", "name": "CMASK_ADDR_TYPE"}
9457 {"bits": [0, 10], "name": "TILE_MAX"},
9458 {"bits": [20, 30], "name": "FMASK_TILE_MAX"}
9463 {"bits": [0, 21], "name": "TILE_MAX"}
9468 {"bits": [0, 10], "name": "SLICE_START"},
9469 {"bits": [13, 23], "name": "SLICE_MAX"}
9474 {"bits": [0, 0], "name": "DISABLE_DUAL_QUAD"},
9475 {"bits": [3, 3], "name": "DEGAMMA_ENABLE"},
9476 {"bits": [4, 6], "enum_ref": "CBMode", "name": "MODE"},
9477 {"bits": [16, 23], "enum_ref": "ROP3", "name": "ROP3"}
9482 {"bits": [0, 0], "name": "OVERWRITE_COMBINER_DISABLE"},
9483 {"bits": [1, 1], "name": "OVERWRITE_COMBINER_MRT_SHARING_DISABLE"},
9484 {"bits": [2, 6], "name": "OVERWRITE_COMBINER_WATERMARK"}
9489 {"bits": [0, 8], "name": "PERF_SEL"},
9490 {"bits": [10, 18], "name": "PERF_SEL1"},
9491 {"bits": [20, 23], "name": "CNTR_MODE"},
9492 {"bits": [24, 27], "name": "PERF_MODE1"},
9493 {"bits": [28, 31], "name": "PERF_MODE"}
9498 {"bits": [0, 8], "name": "PERF_SEL2"},
9499 {"bits": [10, 18], "name": "PERF_SEL3"},
9500 {"bits": [24, 27], "name": "PERF_MODE3"},
9501 {"bits": [28, 31], "name": "PERF_MODE2"}
9506 {"bits": [0, 8], "name": "PERF_SEL"},
9507 {"bits": [28, 31], "name": "PERF_MODE"}
9512 {"bits": [0, 0], "name": "OP_FILTER_ENABLE"},
9513 {"bits": [1, 3], "enum_ref": "CBPerfOpFilterSel", "name": "OP_FILTER_SEL"},
9514 {"bits": [4, 4], "name": "FORMAT_FILTER_ENABLE"},
9515 {"bits": [5, 9], "name": "FORMAT_FILTER_SEL"},
9516 {"bits": [10, 10], "name": "CLEAR_FILTER_ENABLE"},
9517 {"bits": [11, 11], "enum_ref": "CBPerfClearFilterSel", "name": "CLEAR_FILTER_SEL"},
9518 {"bits": [12, 12], "name": "MRT_FILTER_ENABLE"},
9519 {"bits": [13, 15], "name": "MRT_FILTER_SEL"},
9520 {"bits": [17, 17], "name": "NUM_SAMPLES_FILTER_ENABLE"},
9521 {"bits": [18, 20], "name": "NUM_SAMPLES_FILTER_SEL"},
9522 {"bits": [21, 21], "name": "NUM_FRAGMENTS_FILTER_ENABLE"},
9523 {"bits": [22, 23], "name": "NUM_FRAGMENTS_FILTER_SEL"}
9528 {"bits": [0, 3], "name": "OUTPUT0_ENABLE"},
9529 {"bits": [4, 7], "name": "OUTPUT1_ENABLE"},
9530 {"bits": [8, 11], "name": "OUTPUT2_ENABLE"},
9531 {"bits": [12, 15], "name": "OUTPUT3_ENABLE"},
9532 {"bits": [16, 19], "name": "OUTPUT4_ENABLE"},
9533 {"bits": [20, 23], "name": "OUTPUT5_ENABLE"},
9534 {"bits": [24, 27], "name": "OUTPUT6_ENABLE"},
9535 {"bits": [28, 31], "name": "OUTPUT7_ENABLE"}
9540 {"bits": [0, 3], "name": "TARGET0_ENABLE"},
9541 {"bits": [4, 7], "name": "TARGET1_ENABLE"},
9542 {"bits": [8, 11], "name": "TARGET2_ENABLE"},
9543 {"bits": [12, 15], "name": "TARGET3_ENABLE"},
9544 {"bits": [16, 19], "name": "TARGET4_ENABLE"},
9545 {"bits": [20, 23], "name": "TARGET5_ENABLE"},
9546 {"bits": [24, 27], "name": "TARGET6_ENABLE"},
9547 {"bits": [28, 31], "name": "TARGET7_ENABLE"}
9552 {"bits": [0, 0], "name": "COMPUTE_SHADER_EN"},
9553 {"bits": [1, 1], "name": "PARTIAL_TG_EN"},
9554 {"bits": [2, 2], "name": "FORCE_START_AT_000"},
9555 {"bits": [3, 3], "name": "ORDERED_APPEND_ENBL"},
9556 {"bits": [4, 4], "name": "ORDERED_APPEND_MODE"},
9557 {"bits": [5, 5], "name": "USE_THREAD_DIMENSIONS"},
9558 {"bits": [6, 6], "name": "ORDER_MODE"},
9559 {"bits": [7, 9], "name": "DISPATCH_CACHE_CNTL"},
9560 {"bits": [10, 10], "name": "SCALAR_L1_INV_VOL"},
9561 {"bits": [11, 11], "name": "VECTOR_L1_INV_VOL"},
9562 {"bits": [12, 12], "name": "DATA_ATC"},
9563 {"bits": [14, 14], "name": "RESTORE"}
9568 {"bits": [0, 1], "name": "SEND_SEID"},
9569 {"bits": [2, 2], "name": "RESERVED2"},
9570 {"bits": [3, 3], "name": "RESERVED3"},
9571 {"bits": [4, 4], "name": "RESERVED4"},
9572 {"bits": [5, 16], "name": "WAVE_ID_BASE"}
9577 {"bits": [0, 15], "name": "NUM_THREAD_FULL"},
9578 {"bits": [16, 31], "name": "NUM_THREAD_PARTIAL"}
9583 {"bits": [0, 0], "name": "PERFCOUNT_ENABLE"}
9588 {"bits": [0, 7], "name": "DATA"},
9589 {"bits": [8, 8], "name": "INST_ATC"}
9594 {"bits": [0, 5], "name": "VGPRS"},
9595 {"bits": [6, 9], "name": "SGPRS"},
9596 {"bits": [10, 11], "name": "PRIORITY"},
9597 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
9598 {"bits": [20, 20], "name": "PRIV"},
9599 {"bits": [21, 21], "name": "DX10_CLAMP"},
9600 {"bits": [22, 22], "name": "DEBUG_MODE"},
9601 {"bits": [23, 23], "name": "IEEE_MODE"},
9602 {"bits": [24, 24], "name": "BULKY"},
9603 {"bits": [25, 25], "name": "CDBG_USER"}
9608 {"bits": [0, 0], "name": "SCRATCH_EN"},
9609 {"bits": [1, 5], "name": "USER_SGPR"},
9610 {"bits": [6, 6], "name": "TRAP_PRESENT"},
9611 {"bits": [7, 7], "name": "TGID_X_EN"},
9612 {"bits": [8, 8], "name": "TGID_Y_EN"},
9613 {"bits": [9, 9], "name": "TGID_Z_EN"},
9614 {"bits": [10, 10], "name": "TG_SIZE_EN"},
9615 {"bits": [11, 12], "name": "TIDIG_COMP_CNT"},
9616 {"bits": [13, 14], "name": "EXCP_EN_MSB"},
9617 {"bits": [15, 23], "name": "LDS_SIZE"},
9618 {"bits": [24, 30], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
9623 {"bits": [0, 0], "name": "PIPELINESTAT_ENABLE"}
9628 {"bits": [0, 29], "name": "PAYLOAD"},
9629 {"bits": [30, 30], "name": "IS_EVENT"},
9630 {"bits": [31, 31], "name": "IS_STATE"}
9635 {"bits": [0, 9], "name": "WAVES_PER_SH"},
9636 {"bits": [12, 15], "name": "TG_PER_CU"},
9637 {"bits": [16, 21], "name": "LOCK_THRESHOLD"},
9638 {"bits": [22, 22], "name": "SIMD_DEST_CNTL"},
9639 {"bits": [23, 23], "name": "FORCE_SIMD_DIST"},
9640 {"bits": [24, 26], "name": "CU_GROUP_COUNT"}
9645 {"bits": [0, 15], "name": "SH0_CU_EN"},
9646 {"bits": [16, 31], "name": "SH1_CU_EN"}
9651 {"bits": [0, 7], "name": "DATA"}
9656 {"bits": [0, 0], "name": "THREAD_TRACE_ENABLE"}
9661 {"bits": [0, 11], "name": "WAVES"},
9662 {"bits": [12, 24], "name": "WAVESIZE"}
9667 {"bits": [0, 3], "name": "DATA"}
9672 {"bits": [0, 15], "name": "ADDR"}
9677 {"bits": [0, 0], "name": "ATC"},
9678 {"bits": [1, 2], "name": "MTYPE"}
9683 {"bits": [0, 5], "name": "PERF_SEL"},
9684 {"bits": [10, 15], "name": "PERF_SEL1"},
9685 {"bits": [20, 23], "name": "CNTR_MODE"}
9690 {"bits": [0, 5], "name": "PERF_SEL2"},
9691 {"bits": [10, 15], "name": "PERF_SEL3"}
9696 {"bits": [0, 5], "name": "PERF_SEL"}
9701 {"bits": [0, 15], "name": "MEM_ADDR_HI"},
9702 {"bits": [16, 16], "name": "CS_PS_SEL"},
9703 {"bits": [25, 25], "name": "CACHE_POLICY"},
9704 {"bits": [27, 28], "name": "MTYPE"},
9705 {"bits": [29, 31], "name": "COMMAND"}
9710 {"bits": [2, 31], "name": "MEM_ADDR_LO"}
9715 {"bits": [0, 15], "name": "IB1_BASE_HI"}
9720 {"bits": [2, 31], "name": "IB1_BASE_LO"}
9725 {"bits": [0, 19], "name": "IB1_BUFSZ"}
9730 {"bits": [0, 15], "name": "IB2_BASE_HI"}
9735 {"bits": [2, 31], "name": "IB2_BASE_LO"}
9740 {"bits": [0, 19], "name": "IB2_BUFSZ"}
9745 {"bits": [0, 15], "name": "INIT_BASE_HI"}
9750 {"bits": [5, 31], "name": "INIT_BASE_LO"}
9755 {"bits": [0, 11], "name": "INIT_BUFSZ"}
9760 {"bits": [0, 7], "name": "COHER_BASE_HI_256B"}
9765 {"bits": [0, 0], "name": "DEST_BASE_0_ENA"},
9766 {"bits": [1, 1], "name": "DEST_BASE_1_ENA"},
9767 {"bits": [2, 2], "name": "TC_SD_ACTION_ENA"},
9768 {"bits": [3, 3], "name": "TC_NC_ACTION_ENA"},
9769 {"bits": [6, 6], "name": "CB0_DEST_BASE_ENA"},
9770 {"bits": [7, 7], "name": "CB1_DEST_BASE_ENA"},
9771 {"bits": [8, 8], "name": "CB2_DEST_BASE_ENA"},
9772 {"bits": [9, 9], "name": "CB3_DEST_BASE_ENA"},
9773 {"bits": [10, 10], "name": "CB4_DEST_BASE_ENA"},
9774 {"bits": [11, 11], "name": "CB5_DEST_BASE_ENA"},
9775 {"bits": [12, 12], "name": "CB6_DEST_BASE_ENA"},
9776 {"bits": [13, 13], "name": "CB7_DEST_BASE_ENA"},
9777 {"bits": [14, 14], "name": "DB_DEST_BASE_ENA"},
9778 {"bits": [15, 15], "name": "TCL1_VOL_ACTION_ENA"},
9779 {"bits": [18, 18], "name": "TC_WB_ACTION_ENA"},
9780 {"bits": [19, 19], "name": "DEST_BASE_2_ENA"},
9781 {"bits": [21, 21], "name": "DEST_BASE_3_ENA"},
9782 {"bits": [22, 22], "name": "TCL1_ACTION_ENA"},
9783 {"bits": [23, 23], "name": "TC_ACTION_ENA"},
9784 {"bits": [25, 25], "name": "CB_ACTION_ENA"},
9785 {"bits": [26, 26], "name": "DB_ACTION_ENA"},
9786 {"bits": [27, 27], "name": "SH_KCACHE_ACTION_ENA"},
9787 {"bits": [28, 28], "name": "SH_KCACHE_VOL_ACTION_ENA"},
9788 {"bits": [29, 29], "name": "SH_ICACHE_ACTION_ENA"},
9789 {"bits": [30, 30], "name": "SH_KCACHE_WB_ACTION_ENA"},
9790 {"bits": [31, 31], "name": "SH_SD_ACTION_ENA"}
9795 {"bits": [0, 7], "name": "COHER_SIZE_HI_256B"}
9800 {"bits": [0, 5], "name": "START_DELAY_COUNT"}
9805 {"bits": [0, 7], "name": "MATCHING_GFX_CNTX"},
9806 {"bits": [24, 25], "name": "MEID"},
9807 {"bits": [30, 30], "name": "PHASE1_STATUS"},
9808 {"bits": [31, 31], "name": "STATUS"}
9813 {"bits": [0, 0], "name": "MEC1_LOAD_BUSY"},
9814 {"bits": [1, 1], "name": "MEC1_SEMAPOHRE_BUSY"},
9815 {"bits": [2, 2], "name": "MEC1_MUTEX_BUSY"},
9816 {"bits": [3, 3], "name": "MEC1_MESSAGE_BUSY"},
9817 {"bits": [4, 4], "name": "MEC1_EOP_QUEUE_BUSY"},
9818 {"bits": [5, 5], "name": "MEC1_IQ_QUEUE_BUSY"},
9819 {"bits": [6, 6], "name": "MEC1_IB_QUEUE_BUSY"},
9820 {"bits": [7, 7], "name": "MEC1_TC_BUSY"},
9821 {"bits": [8, 8], "name": "MEC1_DMA_BUSY"},
9822 {"bits": [9, 9], "name": "MEC1_PARTIAL_FLUSH_BUSY"},
9823 {"bits": [10, 10], "name": "MEC1_PIPE0_BUSY"},
9824 {"bits": [11, 11], "name": "MEC1_PIPE1_BUSY"},
9825 {"bits": [12, 12], "name": "MEC1_PIPE2_BUSY"},
9826 {"bits": [13, 13], "name": "MEC1_PIPE3_BUSY"},
9827 {"bits": [16, 16], "name": "MEC2_LOAD_BUSY"},
9828 {"bits": [17, 17], "name": "MEC2_SEMAPOHRE_BUSY"},
9829 {"bits": [18, 18], "name": "MEC2_MUTEX_BUSY"},
9830 {"bits": [19, 19], "name": "MEC2_MESSAGE_BUSY"},
9831 {"bits": [20, 20], "name": "MEC2_EOP_QUEUE_BUSY"},
9832 {"bits": [21, 21], "name": "MEC2_IQ_QUEUE_BUSY"},
9833 {"bits": [22, 22], "name": "MEC2_IB_QUEUE_BUSY"},
9834 {"bits": [23, 23], "name": "MEC2_TC_BUSY"},
9835 {"bits": [24, 24], "name": "MEC2_DMA_BUSY"},
9836 {"bits": [25, 25], "name": "MEC2_PARTIAL_FLUSH_BUSY"},
9837 {"bits": [26, 26], "name": "MEC2_PIPE0_BUSY"},
9838 {"bits": [27, 27], "name": "MEC2_PIPE1_BUSY"},
9839 {"bits": [28, 28], "name": "MEC2_PIPE2_BUSY"},
9840 {"bits": [29, 29], "name": "MEC2_PIPE3_BUSY"}
9845 {"bits": [0, 5], "name": "FREE_COUNT"}
9850 {"bits": [0, 3], "name": "COUNT"}
9855 {"bits": [0, 8], "name": "SCRATCH_INDEX"}
9860 {"bits": [3, 3], "name": "RCIU_TX_FREE_STALL"},
9861 {"bits": [4, 4], "name": "RCIU_PRIV_VIOLATION"},
9862 {"bits": [6, 6], "name": "TCIU_TX_FREE_STALL"},
9863 {"bits": [8, 8], "name": "MEC1_DECODING_PACKET"},
9864 {"bits": [9, 9], "name": "MEC1_WAIT_ON_RCIU"},
9865 {"bits": [10, 10], "name": "MEC1_WAIT_ON_RCIU_READ"},
9866 {"bits": [13, 13], "name": "MEC1_WAIT_ON_ROQ_DATA"},
9867 {"bits": [16, 16], "name": "MEC2_DECODING_PACKET"},
9868 {"bits": [17, 17], "name": "MEC2_WAIT_ON_RCIU"},
9869 {"bits": [18, 18], "name": "MEC2_WAIT_ON_RCIU_READ"},
9870 {"bits": [21, 21], "name": "MEC2_WAIT_ON_ROQ_DATA"},
9871 {"bits": [22, 22], "name": "ATCL2IU_WAITING_ON_FREE"},
9872 {"bits": [23, 23], "name": "ATCL2IU_WAITING_ON_TAGS"},
9873 {"bits": [24, 24], "name": "ATCL1_WAITING_ON_TRANS"}
9878 {"bits": [0, 0], "name": "MEC1_BUSY"},
9879 {"bits": [1, 1], "name": "MEC2_BUSY"},
9880 {"bits": [2, 2], "name": "DC0_BUSY"},
9881 {"bits": [3, 3], "name": "DC1_BUSY"},
9882 {"bits": [4, 4], "name": "RCIU1_BUSY"},
9883 {"bits": [5, 5], "name": "RCIU2_BUSY"},
9884 {"bits": [6, 6], "name": "ROQ1_BUSY"},
9885 {"bits": [7, 7], "name": "ROQ2_BUSY"},
9886 {"bits": [10, 10], "name": "TCIU_BUSY"},
9887 {"bits": [11, 11], "name": "SCRATCH_RAM_BUSY"},
9888 {"bits": [12, 12], "name": "QU_BUSY"},
9889 {"bits": [13, 13], "name": "ATCL2IU_BUSY"},
9890 {"bits": [29, 29], "name": "CPG_CPC_BUSY"},
9891 {"bits": [30, 30], "name": "CPF_CPC_BUSY"},
9892 {"bits": [31, 31], "name": "CPC_BUSY"}
9897 {"bits": [0, 0], "name": "REG_BUS_FIFO_BUSY"},
9898 {"bits": [1, 1], "name": "CSF_RING_BUSY"},
9899 {"bits": [2, 2], "name": "CSF_INDIRECT1_BUSY"},
9900 {"bits": [3, 3], "name": "CSF_INDIRECT2_BUSY"},
9901 {"bits": [4, 4], "name": "CSF_STATE_BUSY"},
9902 {"bits": [5, 5], "name": "CSF_CE_INDR1_BUSY"},
9903 {"bits": [6, 6], "name": "CSF_CE_INDR2_BUSY"},
9904 {"bits": [7, 7], "name": "CSF_ARBITER_BUSY"},
9905 {"bits": [8, 8], "name": "CSF_INPUT_BUSY"},
9906 {"bits": [9, 9], "name": "OUTSTANDING_READ_TAGS"},
9907 {"bits": [11, 11], "name": "HPD_PROCESSING_EOP_BUSY"},
9908 {"bits": [12, 12], "name": "HQD_DISPATCH_BUSY"},
9909 {"bits": [13, 13], "name": "HQD_IQ_TIMER_BUSY"},
9910 {"bits": [14, 14], "name": "HQD_DMA_OFFLOAD_BUSY"},
9911 {"bits": [15, 15], "name": "HQD_WAIT_SEMAPHORE_BUSY"},
9912 {"bits": [16, 16], "name": "HQD_SIGNAL_SEMAPHORE_BUSY"},
9913 {"bits": [17, 17], "name": "HQD_MESSAGE_BUSY"},
9914 {"bits": [18, 18], "name": "HQD_PQ_FETCHER_BUSY"},
9915 {"bits": [19, 19], "name": "HQD_IB_FETCHER_BUSY"},
9916 {"bits": [20, 20], "name": "HQD_IQ_FETCHER_BUSY"},
9917 {"bits": [21, 21], "name": "HQD_EOP_FETCHER_BUSY"},
9918 {"bits": [22, 22], "name": "HQD_CONSUMED_RPTR_BUSY"},
9919 {"bits": [23, 23], "name": "HQD_FETCHER_ARB_BUSY"},
9920 {"bits": [24, 24], "name": "HQD_ROQ_ALIGN_BUSY"},
9921 {"bits": [25, 25], "name": "HQD_ROQ_EOP_BUSY"},
9922 {"bits": [26, 26], "name": "HQD_ROQ_IQ_BUSY"},
9923 {"bits": [27, 27], "name": "HQD_ROQ_PQ_BUSY"},
9924 {"bits": [28, 28], "name": "HQD_ROQ_IB_BUSY"},
9925 {"bits": [29, 29], "name": "HQD_WPTR_POLL_BUSY"},
9926 {"bits": [30, 30], "name": "HQD_PQ_BUSY"},
9927 {"bits": [31, 31], "name": "HQD_IB_BUSY"}
9932 {"bits": [0, 0], "name": "RING_FETCHING_DATA"},
9933 {"bits": [1, 1], "name": "INDR1_FETCHING_DATA"},
9934 {"bits": [2, 2], "name": "INDR2_FETCHING_DATA"},
9935 {"bits": [3, 3], "name": "STATE_FETCHING_DATA"},
9936 {"bits": [5, 5], "name": "TCIU_WAITING_ON_FREE"},
9937 {"bits": [6, 6], "name": "TCIU_WAITING_ON_TAGS"},
9938 {"bits": [7, 7], "name": "ATCL2IU_WAITING_ON_FREE"},
9939 {"bits": [8, 8], "name": "ATCL2IU_WAITING_ON_TAGS"},
9940 {"bits": [9, 9], "name": "ATCL1_WAITING_ON_TRANS"}
9945 {"bits": [0, 0], "name": "POST_WPTR_GFX_BUSY"},
9946 {"bits": [1, 1], "name": "CSF_BUSY"},
9947 {"bits": [4, 4], "name": "ROQ_ALIGN_BUSY"},
9948 {"bits": [5, 5], "name": "ROQ_RING_BUSY"},
9949 {"bits": [6, 6], "name": "ROQ_INDIRECT1_BUSY"},
9950 {"bits": [7, 7], "name": "ROQ_INDIRECT2_BUSY"},
9951 {"bits": [8, 8], "name": "ROQ_STATE_BUSY"},
9952 {"bits": [9, 9], "name": "ROQ_CE_RING_BUSY"},
9953 {"bits": [10, 10], "name": "ROQ_CE_INDIRECT1_BUSY"},
9954 {"bits": [11, 11], "name": "ROQ_CE_INDIRECT2_BUSY"},
9955 {"bits": [12, 12], "name": "SEMAPHORE_BUSY"},
9956 {"bits": [13, 13], "name": "INTERRUPT_BUSY"},
9957 {"bits": [14, 14], "name": "TCIU_BUSY"},
9958 {"bits": [15, 15], "name": "HQD_BUSY"},
9959 {"bits": [16, 16], "name": "PRT_BUSY"},
9960 {"bits": [17, 17], "name": "ATCL2IU_BUSY"},
9961 {"bits": [26, 26], "name": "CPF_GFX_BUSY"},
9962 {"bits": [27, 27], "name": "CPF_CMP_BUSY"},
9963 {"bits": [28, 29], "name": "GRBM_CPF_STAT_BUSY"},
9964 {"bits": [30, 30], "name": "CPC_CPF_BUSY"},
9965 {"bits": [31, 31], "name": "CPF_BUSY"}
9970 {"bits": [4, 5], "name": "MIN_AVAILSZ"},
9971 {"bits": [16, 19], "name": "BUFFER_DEPTH"},
9972 {"bits": [28, 28], "name": "PIO_FIFO_EMPTY"},
9973 {"bits": [29, 29], "name": "PIO_FIFO_FULL"},
9974 {"bits": [30, 31], "name": "PIO_COUNT"}
9979 {"bits": [0, 20], "name": "BYTE_COUNT"},
9980 {"bits": [21, 21], "name": "DIS_WC"},
9981 {"bits": [22, 23], "name": "SRC_SWAP"},
9982 {"bits": [24, 25], "name": "DST_SWAP"},
9983 {"bits": [26, 26], "name": "SAS"},
9984 {"bits": [27, 27], "name": "DAS"},
9985 {"bits": [28, 28], "name": "SAIC"},
9986 {"bits": [29, 29], "name": "DAIC"},
9987 {"bits": [30, 30], "name": "RAW_WAIT"}
9992 {"bits": [10, 11], "name": "SRC_MTYPE"},
9993 {"bits": [12, 12], "name": "SRC_ATC"},
9994 {"bits": [13, 13], "name": "SRC_CACHE_POLICY"},
9995 {"bits": [20, 21], "name": "DST_SELECT"},
9996 {"bits": [22, 23], "name": "DST_MTYPE"},
9997 {"bits": [24, 24], "name": "DST_ATC"},
9998 {"bits": [25, 25], "name": "DST_CACHE_POLICY"},
9999 {"bits": [29, 30], "name": "SRC_SELECT"}
10004 {"bits": [0, 15], "name": "DST_ADDR_HI"}
10009 {"bits": [0, 15], "name": "SRC_ADDR_HI"}
10014 {"bits": [0, 25], "name": "DMA_READ_TAG"},
10015 {"bits": [28, 28], "name": "DMA_READ_TAG_VALID"}
10020 {"bits": [0, 15], "name": "COUNT"}
10025 {"bits": [0, 0], "name": "DISABLE_DRAW_WINDOW_LO_MAX"},
10026 {"bits": [1, 1], "name": "DISABLE_DRAW_WINDOW_LO_MIN"},
10027 {"bits": [2, 2], "name": "DISABLE_DRAW_WINDOW_HI"},
10028 {"bits": [8, 8], "name": "MODE"}
10033 {"bits": [0, 15], "name": "MIN"},
10034 {"bits": [16, 31], "name": "MAX"}
10039 {"bits": [0, 15], "name": "ADDR_HI"}
10044 {"bits": [2, 31], "name": "ADDR_LO"}
10049 {"bits": [0, 27], "name": "CNTX_ID"}
10054 {"bits": [0, 15], "name": "CNTX_ID"},
10055 {"bits": [16, 17], "name": "DST_SEL"},
10056 {"bits": [24, 26], "name": "INT_SEL"},
10057 {"bits": [29, 31], "name": "DATA_SEL"}
10062 {"bits": [0, 6], "name": "WBINV_TC_OP"},
10063 {"bits": [12, 17], "name": "WBINV_ACTION_ENA"},
10064 {"bits": [25, 25], "name": "CACHE_CONTROL"},
10065 {"bits": [27, 28], "name": "MTYPE"}
10070 {"bits": [0, 19], "name": "IB1_OFFSET"}
10075 {"bits": [0, 19], "name": "IB1_PREAMBLE_BEGIN"}
10080 {"bits": [0, 19], "name": "IB1_PREAMBLE_END"}
10085 {"bits": [0, 19], "name": "IB2_OFFSET"}
10090 {"bits": [0, 19], "name": "IB2_PREAMBLE_BEGIN"}
10095 {"bits": [0, 19], "name": "IB2_PREAMBLE_END"}
10100 {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"}
10105 {"bits": [0, 15], "name": "ME_MC_RADDR_HI"},
10106 {"bits": [20, 21], "name": "MTYPE"},
10107 {"bits": [22, 22], "name": "CACHE_POLICY"}
10112 {"bits": [0, 1], "name": "ME_MC_RADDR_SWAP"},
10113 {"bits": [2, 31], "name": "ME_MC_RADDR_LO"}
10118 {"bits": [0, 15], "name": "ME_MC_WADDR_HI"},
10119 {"bits": [20, 21], "name": "MTYPE"},
10120 {"bits": [22, 22], "name": "CACHE_POLICY"}
10125 {"bits": [0, 1], "name": "ME_MC_WADDR_SWAP"},
10126 {"bits": [2, 31], "name": "ME_MC_WADDR_LO"}
10131 {"bits": [0, 3], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"},
10132 {"bits": [4, 7], "enum_ref": "SPM_PERFMON_STATE", "name": "SPM_PERFMON_STATE"},
10133 {"bits": [8, 9], "enum_ref": "CP_PERFMON_ENABLE_MODE", "name": "PERFMON_ENABLE_MODE"},
10134 {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"}
10139 {"bits": [31, 31], "name": "PERFMON_ENABLE"}
10144 {"bits": [0, 1], "name": "STATUS"}
10149 {"bits": [0, 7], "name": "IB_EN"}
10154 {"bits": [0, 0], "name": "CONFIG_REG_EN"},
10155 {"bits": [1, 1], "name": "CNTX_REG_EN"},
10156 {"bits": [16, 16], "name": "SH_GFX_REG_EN"},
10157 {"bits": [24, 24], "name": "SH_CS_REG_EN"}
10162 {"bits": [0, 15], "name": "PIPE_STATS_ADDR_HI"}
10167 {"bits": [2, 31], "name": "PIPE_STATS_ADDR_LO"}
10172 {"bits": [25, 25], "name": "CACHE_CONTROL"},
10173 {"bits": [27, 28], "name": "MTYPE"}
10178 {"bits": [0, 0], "name": "NOT_VISIBLE"}
10183 {"bits": [0, 19], "name": "RB_OFFSET"}
10188 {"bits": [0, 1], "name": "RINGID"}
10193 {"bits": [0, 0], "name": "Z_PASS_ACITVE"},
10194 {"bits": [1, 1], "name": "STREAMOUT_ACTIVE"},
10195 {"bits": [2, 2], "name": "PIPELINE_ACTIVE"},
10196 {"bits": [3, 3], "name": "STIPPLE_ACTIVE"},
10197 {"bits": [4, 4], "name": "VGT_BUFFERS_ACTIVE"},
10198 {"bits": [5, 5], "name": "SCREEN_EXT_ACTIVE"},
10199 {"bits": [6, 6], "name": "DRAW_INDIRECT_ACTIVE"},
10200 {"bits": [7, 7], "name": "DISP_INDIRECT_ACTIVE"}
10205 {"bits": [0, 7], "name": "SCRATCH_INDEX"}
10210 {"bits": [0, 15], "name": "SEM_ADDR_HI"},
10211 {"bits": [16, 16], "name": "SEM_USE_MAILBOX"},
10212 {"bits": [20, 20], "name": "SEM_SIGNAL_TYPE"},
10213 {"bits": [24, 25], "name": "SEM_CLIENT_CODE"},
10214 {"bits": [29, 31], "name": "SEM_SELECT"}
10219 {"bits": [0, 1], "name": "SEM_ADDR_SWAP"},
10220 {"bits": [3, 31], "name": "SEM_ADDR_LO"}
10225 {"bits": [0, 15], "name": "STREAM_OUT_ADDR_HI"}
10230 {"bits": [2, 31], "name": "STREAM_OUT_ADDR_LO"}
10235 {"bits": [0, 0], "name": "OFFSET_UPDATE_DONE"}
10240 {"bits": [0, 15], "name": "ST_BASE_HI"}
10245 {"bits": [2, 31], "name": "ST_BASE_LO"}
10250 {"bits": [0, 19], "name": "ST_BUFSZ"}
10255 {"bits": [0, 3], "name": "VMID"}
10260 {"bits": [0, 2], "name": "SRC_STATE_ID"}
10265 {"bits": [0, 0], "name": "ALPHA_TO_MASK_ENABLE"},
10266 {"bits": [8, 9], "name": "ALPHA_TO_MASK_OFFSET0"},
10267 {"bits": [10, 11], "name": "ALPHA_TO_MASK_OFFSET1"},
10268 {"bits": [12, 13], "name": "ALPHA_TO_MASK_OFFSET2"},
10269 {"bits": [14, 15], "name": "ALPHA_TO_MASK_OFFSET3"},
10270 {"bits": [16, 16], "name": "OFFSET_ROUND"}
10275 {"bits": [0, 0], "name": "ZPASS_INCREMENT_DISABLE"},
10276 {"bits": [1, 1], "name": "PERFECT_ZPASS_COUNTS"},
10277 {"bits": [4, 6], "name": "SAMPLE_RATE"},
10278 {"bits": [8, 11], "name": "ZPASS_ENABLE"},
10279 {"bits": [12, 15], "name": "ZFAIL_ENABLE"},
10280 {"bits": [16, 19], "name": "SFAIL_ENABLE"},
10281 {"bits": [20, 23], "name": "DBFAIL_ENABLE"},
10282 {"bits": [24, 27], "name": "SLICE_EVEN_ENABLE"},
10283 {"bits": [28, 31], "name": "SLICE_ODD_ENABLE"}
10288 {"bits": [0, 0], "name": "STENCIL_ENABLE"},
10289 {"bits": [1, 1], "name": "Z_ENABLE"},
10290 {"bits": [2, 2], "name": "Z_WRITE_ENABLE"},
10291 {"bits": [3, 3], "name": "DEPTH_BOUNDS_ENABLE"},
10292 {"bits": [4, 6], "enum_ref": "CompareFrag", "name": "ZFUNC"},
10293 {"bits": [7, 7], "name": "BACKFACE_ENABLE"},
10294 {"bits": [8, 10], "enum_ref": "CompareFrag", "name": "STENCILFUNC"},
10295 {"bits": [20, 22], "enum_ref": "CompareFrag", "name": "STENCILFUNC_BF"},
10296 {"bits": [30, 30], "name": "ENABLE_COLOR_WRITES_ON_DEPTH_FAIL"},
10297 {"bits": [31, 31], "name": "DISABLE_COLOR_WRITES_ON_DEPTH_PASS"}
10302 {"bits": [0, 3], "name": "ADDR5_SWIZZLE_MASK"},
10303 {"bits": [4, 7], "enum_ref": "ArrayMode", "name": "ARRAY_MODE"},
10304 {"bits": [8, 12], "enum_ref": "PipeConfig", "name": "PIPE_CONFIG"},
10305 {"bits": [13, 14], "enum_ref": "BankWidth", "name": "BANK_WIDTH"},
10306 {"bits": [15, 16], "enum_ref": "BankHeight", "name": "BANK_HEIGHT"},
10307 {"bits": [17, 18], "enum_ref": "MacroTileAspect", "name": "MACRO_TILE_ASPECT"},
10308 {"bits": [19, 20], "enum_ref": "NumBanks", "name": "NUM_BANKS"}
10313 {"bits": [0, 10], "name": "PITCH_TILE_MAX"},
10314 {"bits": [11, 21], "name": "HEIGHT_TILE_MAX"}
10319 {"bits": [0, 21], "name": "SLICE_TILE_MAX"}
10324 {"bits": [0, 10], "name": "SLICE_START"},
10325 {"bits": [13, 23], "name": "SLICE_MAX"},
10326 {"bits": [24, 24], "name": "Z_READ_ONLY"},
10327 {"bits": [25, 25], "name": "STENCIL_READ_ONLY"}
10332 {"bits": [0, 2], "name": "MAX_ANCHOR_SAMPLES"},
10333 {"bits": [4, 6], "name": "PS_ITER_SAMPLES"},
10334 {"bits": [8, 10], "name": "MASK_EXPORT_NUM_SAMPLES"},
10335 {"bits": [12, 14], "name": "ALPHA_TO_MASK_NUM_SAMPLES"},
10336 {"bits": [16, 16], "name": "HIGH_QUALITY_INTERSECTIONS"},
10337 {"bits": [17, 17], "name": "INCOHERENT_EQAA_READS"},
10338 {"bits": [18, 18], "name": "INTERPOLATE_COMP_Z"},
10339 {"bits": [19, 19], "name": "INTERPOLATE_SRC_Z"},
10340 {"bits": [20, 20], "name": "STATIC_ANCHOR_ASSOCIATIONS"},
10341 {"bits": [21, 21], "name": "ALPHA_TO_MASK_EQAA_DISABLE"},
10342 {"bits": [24, 26], "name": "OVERRASTERIZATION_AMOUNT"},
10343 {"bits": [27, 27], "name": "ENABLE_POSTZ_OVERRASTERIZATION"}
10348 {"bits": [0, 0], "name": "LINEAR"},
10349 {"bits": [1, 1], "name": "FULL_CACHE"},
10350 {"bits": [2, 2], "name": "HTILE_USES_PRELOAD_WIN"},
10351 {"bits": [3, 3], "name": "PRELOAD"},
10352 {"bits": [4, 9], "name": "PREFETCH_WIDTH"},
10353 {"bits": [10, 15], "name": "PREFETCH_HEIGHT"},
10354 {"bits": [16, 16], "name": "DST_OUTSIDE_ZERO_TO_ONE"},
10355 {"bits": [17, 17], "name": "TC_COMPATIBLE"}
10360 {"bits": [0, 9], "name": "PERF_SEL"},
10361 {"bits": [10, 19], "name": "PERF_SEL1"},
10362 {"bits": [20, 23], "name": "CNTR_MODE"},
10363 {"bits": [24, 27], "name": "PERF_MODE1"},
10364 {"bits": [28, 31], "name": "PERF_MODE"}
10369 {"bits": [0, 9], "name": "PERF_SEL2"},
10370 {"bits": [10, 19], "name": "PERF_SEL3"},
10371 {"bits": [24, 27], "name": "PERF_MODE3"},
10372 {"bits": [28, 31], "name": "PERF_MODE2"}
10377 {"bits": [0, 7], "name": "START_X"},
10378 {"bits": [8, 15], "name": "START_Y"},
10379 {"bits": [16, 23], "name": "MAX_X"},
10380 {"bits": [24, 31], "name": "MAX_Y"}
10385 {"bits": [0, 0], "name": "DEPTH_CLEAR_ENABLE"},
10386 {"bits": [1, 1], "name": "STENCIL_CLEAR_ENABLE"},
10387 {"bits": [2, 2], "name": "DEPTH_COPY"},
10388 {"bits": [3, 3], "name": "STENCIL_COPY"},
10389 {"bits": [4, 4], "name": "RESUMMARIZE_ENABLE"},
10390 {"bits": [5, 5], "name": "STENCIL_COMPRESS_DISABLE"},
10391 {"bits": [6, 6], "name": "DEPTH_COMPRESS_DISABLE"},
10392 {"bits": [7, 7], "name": "COPY_CENTROID"},
10393 {"bits": [8, 11], "name": "COPY_SAMPLE"},
10394 {"bits": [12, 12], "name": "DECOMPRESS_ENABLE"}
10399 {"bits": [0, 1], "enum_ref": "ForceControl", "name": "FORCE_HIZ_ENABLE"},
10400 {"bits": [2, 3], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE0"},
10401 {"bits": [4, 5], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE1"},
10402 {"bits": [6, 6], "name": "FORCE_SHADER_Z_ORDER"},
10403 {"bits": [7, 7], "name": "FAST_Z_DISABLE"},
10404 {"bits": [8, 8], "name": "FAST_STENCIL_DISABLE"},
10405 {"bits": [9, 9], "name": "NOOP_CULL_DISABLE"},
10406 {"bits": [10, 10], "name": "FORCE_COLOR_KILL"},
10407 {"bits": [11, 11], "name": "FORCE_Z_READ"},
10408 {"bits": [12, 12], "name": "FORCE_STENCIL_READ"},
10409 {"bits": [13, 14], "enum_ref": "ForceControl", "name": "FORCE_FULL_Z_RANGE"},
10410 {"bits": [15, 15], "name": "FORCE_QC_SMASK_CONFLICT"},
10411 {"bits": [16, 16], "name": "DISABLE_VIEWPORT_CLAMP"},
10412 {"bits": [17, 17], "name": "IGNORE_SC_ZRANGE"},
10413 {"bits": [18, 18], "name": "DISABLE_FULLY_COVERED"},
10414 {"bits": [19, 20], "enum_ref": "ZLimitSumm", "name": "FORCE_Z_LIMIT_SUMM"},
10415 {"bits": [21, 25], "name": "MAX_TILES_IN_DTT"},
10416 {"bits": [26, 26], "name": "DISABLE_TILE_RATE_TILES"},
10417 {"bits": [27, 27], "name": "FORCE_Z_DIRTY"},
10418 {"bits": [28, 28], "name": "FORCE_STENCIL_DIRTY"},
10419 {"bits": [29, 29], "name": "FORCE_Z_VALID"},
10420 {"bits": [30, 30], "name": "FORCE_STENCIL_VALID"},
10421 {"bits": [31, 31], "name": "PRESERVE_COMPRESSION"}
10426 {"bits": [0, 1], "enum_ref": "DbPSLControl", "name": "PARTIAL_SQUAD_LAUNCH_CONTROL"},
10427 {"bits": [2, 4], "name": "PARTIAL_SQUAD_LAUNCH_COUNTDOWN"},
10428 {"bits": [5, 5], "name": "DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION"},
10429 {"bits": [6, 6], "name": "DISABLE_SMEM_EXPCLEAR_OPTIMIZATION"},
10430 {"bits": [7, 7], "name": "DISABLE_COLOR_ON_VALIDATION"},
10431 {"bits": [8, 8], "name": "DECOMPRESS_Z_ON_FLUSH"},
10432 {"bits": [9, 9], "name": "DISABLE_REG_SNOOP"},
10433 {"bits": [10, 10], "name": "DEPTH_BOUNDS_HIER_DEPTH_DISABLE"},
10434 {"bits": [11, 11], "name": "SEPARATE_HIZS_FUNC_ENABLE"},
10435 {"bits": [12, 14], "enum_ref": "CompareFrag", "name": "HIZ_ZFUNC"},
10436 {"bits": [15, 17], "name": "HIS_SFUNC_FF"},
10437 {"bits": [18, 20], "name": "HIS_SFUNC_BF"},
10438 {"bits": [21, 21], "name": "PRESERVE_ZRANGE"},
10439 {"bits": [22, 22], "name": "PRESERVE_SRESULTS"},
10440 {"bits": [23, 23], "name": "DISABLE_FAST_PASS"}
10445 {"bits": [0, 0], "name": "Z_EXPORT_ENABLE"},
10446 {"bits": [1, 1], "name": "STENCIL_TEST_VAL_EXPORT_ENABLE"},
10447 {"bits": [2, 2], "name": "STENCIL_OP_VAL_EXPORT_ENABLE"},
10448 {"bits": [4, 5], "enum_ref": "ZOrder", "name": "Z_ORDER"},
10449 {"bits": [6, 6], "name": "KILL_ENABLE"},
10450 {"bits": [7, 7], "name": "COVERAGE_TO_MASK_ENABLE"},
10451 {"bits": [8, 8], "name": "MASK_EXPORT_ENABLE"},
10452 {"bits": [9, 9], "name": "EXEC_ON_HIER_FAIL"},
10453 {"bits": [10, 10], "name": "EXEC_ON_NOOP"},
10454 {"bits": [11, 11], "name": "ALPHA_TO_MASK_DISABLE"},
10455 {"bits": [12, 12], "name": "DEPTH_BEFORE_SHADER"},
10456 {"bits": [13, 14], "enum_ref": "ConservativeZExport", "name": "CONSERVATIVE_Z_EXPORT"},
10457 {"bits": [15, 15], "name": "DUAL_QUAD_DISABLE"}
10462 {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC0"},
10463 {"bits": [4, 11], "name": "COMPAREVALUE0"},
10464 {"bits": [12, 19], "name": "COMPAREMASK0"},
10465 {"bits": [24, 24], "name": "ENABLE0"}
10470 {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC1"},
10471 {"bits": [4, 11], "name": "COMPAREVALUE1"},
10472 {"bits": [12, 19], "name": "COMPAREMASK1"},
10473 {"bits": [24, 24], "name": "ENABLE1"}
10478 {"bits": [0, 7], "name": "STENCILTESTVAL"},
10479 {"bits": [8, 15], "name": "STENCILMASK"},
10480 {"bits": [16, 23], "name": "STENCILWRITEMASK"},
10481 {"bits": [24, 31], "name": "STENCILOPVAL"}
10486 {"bits": [0, 7], "name": "STENCILTESTVAL_BF"},
10487 {"bits": [8, 15], "name": "STENCILMASK_BF"},
10488 {"bits": [16, 23], "name": "STENCILWRITEMASK_BF"},
10489 {"bits": [24, 31], "name": "STENCILOPVAL_BF"}
10494 {"bits": [0, 7], "name": "CLEAR"}
10499 {"bits": [0, 3], "enum_ref": "StencilOp", "name": "STENCILFAIL"},
10500 {"bits": [4, 7], "enum_ref": "StencilOp", "name": "STENCILZPASS"},
10501 {"bits": [8, 11], "enum_ref": "StencilOp", "name": "STENCILZFAIL"},
10502 {"bits": [12, 15], "enum_ref": "StencilOp", "name": "STENCILFAIL_BF"},
10503 {"bits": [16, 19], "enum_ref": "StencilOp", "name": "STENCILZPASS_BF"},
10504 {"bits": [20, 23], "enum_ref": "StencilOp", "name": "STENCILZFAIL_BF"}
10509 {"bits": [0, 0], "enum_ref": "StencilFormat", "name": "FORMAT"},
10510 {"bits": [13, 15], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},
10511 {"bits": [20, 22], "name": "TILE_MODE_INDEX"},
10512 {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"},
10513 {"bits": [29, 29], "name": "TILE_STENCIL_DISABLE"},
10514 {"bits": [30, 30], "name": "CLEAR_DISALLOWED"}
10519 {"bits": [0, 30], "name": "COUNT_HI"}
10524 {"bits": [0, 1], "enum_ref": "ZFormat", "name": "FORMAT"},
10525 {"bits": [2, 3], "name": "NUM_SAMPLES"},
10526 {"bits": [13, 15], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},
10527 {"bits": [20, 22], "name": "TILE_MODE_INDEX"},
10528 {"bits": [23, 26], "name": "DECOMPRESS_ON_N_ZPLANES"},
10529 {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"},
10530 {"bits": [28, 28], "name": "READ_SIZE"},
10531 {"bits": [29, 29], "name": "TILE_SURFACE_ENABLE"},
10532 {"bits": [30, 30], "name": "CLEAR_DISALLOWED"},
10533 {"bits": [31, 31], "name": "ZRANGE_PRECISION"}
10538 {"bits": [0, 2], "name": "NUM_PIPES"},
10539 {"bits": [4, 6], "name": "PIPE_INTERLEAVE_SIZE"},
10540 {"bits": [8, 10], "name": "BANK_INTERLEAVE_SIZE"},
10541 {"bits": [12, 13], "name": "NUM_SHADER_ENGINES"},
10542 {"bits": [16, 18], "name": "SHADER_ENGINE_TILE_SIZE"},
10543 {"bits": [20, 22], "name": "NUM_GPUS"},
10544 {"bits": [24, 25], "name": "MULTI_GPU_TILE_SIZE"},
10545 {"bits": [28, 29], "name": "ROW_SIZE"},
10546 {"bits": [30, 30], "name": "NUM_LOWER_PIPES"}
10551 {"bits": [0, 1], "enum_ref": "BankWidth", "name": "BANK_WIDTH"},
10552 {"bits": [2, 3], "enum_ref": "BankHeight", "name": "BANK_HEIGHT"},
10553 {"bits": [4, 5], "enum_ref": "MacroTileAspect", "name": "MACRO_TILE_ASPECT"},
10554 {"bits": [6, 7], "enum_ref": "NumBanks", "name": "NUM_BANKS"}
10559 {"bits": [2, 5], "enum_ref": "ArrayMode", "name": "ARRAY_MODE"},
10560 {"bits": [6, 10], "enum_ref": "PipeConfig", "name": "PIPE_CONFIG"},
10561 {"bits": [11, 13], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},
10562 {"bits": [22, 24], "enum_ref": "MicroTileMode", "name": "MICRO_TILE_MODE_NEW"},
10563 {"bits": [25, 26], "name": "SAMPLE_SPLIT"}
10568 {"bits": [0, 15], "name": "BASE"},
10569 {"bits": [16, 31], "name": "UNUSED"}
10574 {"bits": [0, 5], "name": "AINC"},
10575 {"bits": [6, 7], "name": "UNUSED1"},
10576 {"bits": [8, 9], "name": "DMODE"},
10577 {"bits": [10, 31], "name": "UNUSED2"}
10582 {"bits": [0, 0], "name": "COMPLETE"},
10583 {"bits": [1, 31], "name": "UNUSED"}
10588 {"bits": [0, 7], "name": "OFFSET0"},
10589 {"bits": [8, 31], "name": "UNUSED"}
10594 {"bits": [0, 7], "name": "OFFSET1"},
10595 {"bits": [8, 31], "name": "UNUSED"}
10600 {"bits": [0, 7], "name": "OP"},
10601 {"bits": [8, 31], "name": "UNUSED"}
10606 {"bits": [0, 15], "name": "SIZE"},
10607 {"bits": [16, 31], "name": "UNUSED"}
10612 {"bits": [0, 0], "name": "FLAG"},
10613 {"bits": [1, 12], "name": "COUNTER"},
10614 {"bits": [13, 13], "name": "TYPE"},
10615 {"bits": [14, 14], "name": "DED"},
10616 {"bits": [15, 15], "name": "RELEASE_ALL"},
10617 {"bits": [16, 27], "name": "HEAD_QUEUE"},
10618 {"bits": [28, 28], "name": "HEAD_VALID"},
10619 {"bits": [29, 29], "name": "HEAD_FLAG"},
10620 {"bits": [30, 31], "name": "UNUSED1"}
10625 {"bits": [0, 15], "name": "RESOURCE_CNT"},
10626 {"bits": [16, 31], "name": "UNUSED"}
10631 {"bits": [0, 5], "name": "INDEX"},
10632 {"bits": [6, 31], "name": "UNUSED"}
10637 {"bits": [0, 15], "name": "DS_ADDRESS"},
10638 {"bits": [16, 19], "name": "CRAWLER"},
10639 {"bits": [20, 21], "name": "CRAWLER_TYPE"},
10640 {"bits": [22, 29], "name": "UNUSED"},
10641 {"bits": [30, 30], "name": "NO_ALLOC"},
10642 {"bits": [31, 31], "name": "ENABLE"}
10647 {"bits": [0, 3], "name": "INDEX"},
10648 {"bits": [4, 31], "name": "UNUSED"}
10653 {"bits": [0, 30], "name": "VALUE"},
10654 {"bits": [31, 31], "name": "INCDEC"}
10659 {"bits": [0, 7], "name": "INSTANCE_INDEX"},
10660 {"bits": [8, 15], "name": "SH_INDEX"},
10661 {"bits": [16, 23], "name": "SE_INDEX"},
10662 {"bits": [29, 29], "name": "SH_BROADCAST_WRITES"},
10663 {"bits": [30, 30], "name": "INSTANCE_BROADCAST_WRITES"},
10664 {"bits": [31, 31], "name": "SE_BROADCAST_WRITES"}
10669 {"bits": [0, 5], "name": "PERF_SEL"},
10670 {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"},
10671 {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"},
10672 {"bits": [12, 12], "name": "VGT_BUSY_USER_DEFINED_MASK"},
10673 {"bits": [13, 13], "name": "TA_BUSY_USER_DEFINED_MASK"},
10674 {"bits": [14, 14], "name": "SX_BUSY_USER_DEFINED_MASK"},
10675 {"bits": [16, 16], "name": "SPI_BUSY_USER_DEFINED_MASK"},
10676 {"bits": [17, 17], "name": "SC_BUSY_USER_DEFINED_MASK"},
10677 {"bits": [18, 18], "name": "PA_BUSY_USER_DEFINED_MASK"},
10678 {"bits": [19, 19], "name": "GRBM_BUSY_USER_DEFINED_MASK"},
10679 {"bits": [20, 20], "name": "DB_BUSY_USER_DEFINED_MASK"},
10680 {"bits": [21, 21], "name": "CB_BUSY_USER_DEFINED_MASK"},
10681 {"bits": [22, 22], "name": "CP_BUSY_USER_DEFINED_MASK"},
10682 {"bits": [23, 23], "name": "IA_BUSY_USER_DEFINED_MASK"},
10683 {"bits": [24, 24], "name": "GDS_BUSY_USER_DEFINED_MASK"},
10684 {"bits": [25, 25], "name": "BCI_BUSY_USER_DEFINED_MASK"},
10685 {"bits": [26, 26], "name": "RLC_BUSY_USER_DEFINED_MASK"},
10686 {"bits": [27, 27], "name": "TC_BUSY_USER_DEFINED_MASK"},
10687 {"bits": [28, 28], "name": "WD_BUSY_USER_DEFINED_MASK"}
10692 {"bits": [0, 5], "name": "PERF_SEL"},
10693 {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"},
10694 {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"},
10695 {"bits": [12, 12], "name": "TA_BUSY_USER_DEFINED_MASK"},
10696 {"bits": [13, 13], "name": "SX_BUSY_USER_DEFINED_MASK"},
10697 {"bits": [15, 15], "name": "SPI_BUSY_USER_DEFINED_MASK"},
10698 {"bits": [16, 16], "name": "SC_BUSY_USER_DEFINED_MASK"},
10699 {"bits": [17, 17], "name": "DB_BUSY_USER_DEFINED_MASK"},
10700 {"bits": [18, 18], "name": "CB_BUSY_USER_DEFINED_MASK"},
10701 {"bits": [19, 19], "name": "VGT_BUSY_USER_DEFINED_MASK"},
10702 {"bits": [20, 20], "name": "PA_BUSY_USER_DEFINED_MASK"},
10703 {"bits": [21, 21], "name": "BCI_BUSY_USER_DEFINED_MASK"}
10708 {"bits": [0, 3], "name": "ME0PIPE0_CMDFIFO_AVAIL"},
10709 {"bits": [5, 5], "name": "SRBM_RQ_PENDING"},
10710 {"bits": [7, 7], "name": "ME0PIPE0_CF_RQ_PENDING"},
10711 {"bits": [8, 8], "name": "ME0PIPE0_PF_RQ_PENDING"},
10712 {"bits": [9, 9], "name": "GDS_DMA_RQ_PENDING"},
10713 {"bits": [12, 12], "name": "DB_CLEAN"},
10714 {"bits": [13, 13], "name": "CB_CLEAN"},
10715 {"bits": [14, 14], "name": "TA_BUSY"},
10716 {"bits": [15, 15], "name": "GDS_BUSY"},
10717 {"bits": [16, 16], "name": "WD_BUSY_NO_DMA"},
10718 {"bits": [17, 17], "name": "VGT_BUSY"},
10719 {"bits": [18, 18], "name": "IA_BUSY_NO_DMA"},
10720 {"bits": [19, 19], "name": "IA_BUSY"},
10721 {"bits": [20, 20], "name": "SX_BUSY"},
10722 {"bits": [21, 21], "name": "WD_BUSY"},
10723 {"bits": [22, 22], "name": "SPI_BUSY"},
10724 {"bits": [23, 23], "name": "BCI_BUSY"},
10725 {"bits": [24, 24], "name": "SC_BUSY"},
10726 {"bits": [25, 25], "name": "PA_BUSY"},
10727 {"bits": [26, 26], "name": "DB_BUSY"},
10728 {"bits": [28, 28], "name": "CP_COHERENCY_BUSY"},
10729 {"bits": [29, 29], "name": "CP_BUSY"},
10730 {"bits": [30, 30], "name": "CB_BUSY"},
10731 {"bits": [31, 31], "name": "GUI_ACTIVE"}
10736 {"bits": [0, 3], "name": "ME0PIPE1_CMDFIFO_AVAIL"},
10737 {"bits": [4, 4], "name": "ME0PIPE1_CF_RQ_PENDING"},
10738 {"bits": [5, 5], "name": "ME0PIPE1_PF_RQ_PENDING"},
10739 {"bits": [6, 6], "name": "ME1PIPE0_RQ_PENDING"},
10740 {"bits": [7, 7], "name": "ME1PIPE1_RQ_PENDING"},
10741 {"bits": [8, 8], "name": "ME1PIPE2_RQ_PENDING"},
10742 {"bits": [9, 9], "name": "ME1PIPE3_RQ_PENDING"},
10743 {"bits": [10, 10], "name": "ME2PIPE0_RQ_PENDING"},
10744 {"bits": [11, 11], "name": "ME2PIPE1_RQ_PENDING"},
10745 {"bits": [12, 12], "name": "ME2PIPE2_RQ_PENDING"},
10746 {"bits": [13, 13], "name": "ME2PIPE3_RQ_PENDING"},
10747 {"bits": [14, 14], "name": "RLC_RQ_PENDING"},
10748 {"bits": [24, 24], "name": "RLC_BUSY"},
10749 {"bits": [25, 25], "name": "TC_BUSY"},
10750 {"bits": [26, 26], "name": "TCC_CC_RESIDENT"},
10751 {"bits": [28, 28], "name": "CPF_BUSY"},
10752 {"bits": [29, 29], "name": "CPC_BUSY"},
10753 {"bits": [30, 30], "name": "CPG_BUSY"}
10758 {"bits": [1, 1], "name": "DB_CLEAN"},
10759 {"bits": [2, 2], "name": "CB_CLEAN"},
10760 {"bits": [22, 22], "name": "BCI_BUSY"},
10761 {"bits": [23, 23], "name": "VGT_BUSY"},
10762 {"bits": [24, 24], "name": "PA_BUSY"},
10763 {"bits": [25, 25], "name": "TA_BUSY"},
10764 {"bits": [26, 26], "name": "SX_BUSY"},
10765 {"bits": [27, 27], "name": "SPI_BUSY"},
10766 {"bits": [29, 29], "name": "SC_BUSY"},
10767 {"bits": [30, 30], "name": "DB_BUSY"},
10768 {"bits": [31, 31], "name": "CB_BUSY"}
10773 {"bits": [0, 15], "name": "PRIMGROUP_SIZE"},
10774 {"bits": [16, 16], "name": "PARTIAL_VS_WAVE_ON"},
10775 {"bits": [17, 17], "name": "SWITCH_ON_EOP"},
10776 {"bits": [18, 18], "name": "PARTIAL_ES_WAVE_ON"},
10777 {"bits": [19, 19], "name": "SWITCH_ON_EOI"},
10778 {"bits": [20, 20], "name": "WD_SWITCH_ON_EOP"},
10779 {"bits": [28, 31], "name": "MAX_PRIMGRP_IN_WAVE"}
10784 {"bits": [0, 0], "name": "UCP_ENA_0"},
10785 {"bits": [1, 1], "name": "UCP_ENA_1"},
10786 {"bits": [2, 2], "name": "UCP_ENA_2"},
10787 {"bits": [3, 3], "name": "UCP_ENA_3"},
10788 {"bits": [4, 4], "name": "UCP_ENA_4"},
10789 {"bits": [5, 5], "name": "UCP_ENA_5"},
10790 {"bits": [13, 13], "name": "PS_UCP_Y_SCALE_NEG"},
10791 {"bits": [14, 15], "name": "PS_UCP_MODE"},
10792 {"bits": [16, 16], "name": "CLIP_DISABLE"},
10793 {"bits": [17, 17], "name": "UCP_CULL_ONLY_ENA"},
10794 {"bits": [18, 18], "name": "BOUNDARY_EDGE_FLAG_ENA"},
10795 {"bits": [19, 19], "name": "DX_CLIP_SPACE_DEF"},
10796 {"bits": [20, 20], "name": "DIS_CLIP_ERR_DETECT"},
10797 {"bits": [21, 21], "name": "VTX_KILL_OR"},
10798 {"bits": [22, 22], "name": "DX_RASTERIZATION_KILL"},
10799 {"bits": [24, 24], "name": "DX_LINEAR_ATTR_CLIP_ENA"},
10800 {"bits": [25, 25], "name": "VTE_VPORT_PROVOKE_DISABLE"},
10801 {"bits": [26, 26], "name": "ZCLIP_NEAR_DISABLE"},
10802 {"bits": [27, 27], "name": "ZCLIP_FAR_DISABLE"}
10807 {"bits": [0, 0], "name": "VTE_XY_INF_DISCARD"},
10808 {"bits": [1, 1], "name": "VTE_Z_INF_DISCARD"},
10809 {"bits": [2, 2], "name": "VTE_W_INF_DISCARD"},
10810 {"bits": [3, 3], "name": "VTE_0XNANINF_IS_0"},
10811 {"bits": [4, 4], "name": "VTE_XY_NAN_RETAIN"},
10812 {"bits": [5, 5], "name": "VTE_Z_NAN_RETAIN"},
10813 {"bits": [6, 6], "name": "VTE_W_NAN_RETAIN"},
10814 {"bits": [7, 7], "name": "VTE_W_RECIP_NAN_IS_0"},
10815 {"bits": [8, 8], "name": "VS_XY_NAN_TO_INF"},
10816 {"bits": [9, 9], "name": "VS_XY_INF_RETAIN"},
10817 {"bits": [10, 10], "name": "VS_Z_NAN_TO_INF"},
10818 {"bits": [11, 11], "name": "VS_Z_INF_RETAIN"},
10819 {"bits": [12, 12], "name": "VS_W_NAN_TO_INF"},
10820 {"bits": [13, 13], "name": "VS_W_INF_RETAIN"},
10821 {"bits": [14, 14], "name": "VS_CLIP_DIST_INF_DISCARD"},
10822 {"bits": [20, 20], "name": "VTE_NO_OUTPUT_NEG_0"}
10827 {"bits": [0, 0], "name": "CLIP_DIST_ENA_0"},
10828 {"bits": [1, 1], "name": "CLIP_DIST_ENA_1"},
10829 {"bits": [2, 2], "name": "CLIP_DIST_ENA_2"},
10830 {"bits": [3, 3], "name": "CLIP_DIST_ENA_3"},
10831 {"bits": [4, 4], "name": "CLIP_DIST_ENA_4"},
10832 {"bits": [5, 5], "name": "CLIP_DIST_ENA_5"},
10833 {"bits": [6, 6], "name": "CLIP_DIST_ENA_6"},
10834 {"bits": [7, 7], "name": "CLIP_DIST_ENA_7"},
10835 {"bits": [8, 8], "name": "CULL_DIST_ENA_0"},
10836 {"bits": [9, 9], "name": "CULL_DIST_ENA_1"},
10837 {"bits": [10, 10], "name": "CULL_DIST_ENA_2"},
10838 {"bits": [11, 11], "name": "CULL_DIST_ENA_3"},
10839 {"bits": [12, 12], "name": "CULL_DIST_ENA_4"},
10840 {"bits": [13, 13], "name": "CULL_DIST_ENA_5"},
10841 {"bits": [14, 14], "name": "CULL_DIST_ENA_6"},
10842 {"bits": [15, 15], "name": "CULL_DIST_ENA_7"},
10843 {"bits": [16, 16], "name": "USE_VTX_POINT_SIZE"},
10844 {"bits": [17, 17], "name": "USE_VTX_EDGE_FLAG"},
10845 {"bits": [18, 18], "name": "USE_VTX_RENDER_TARGET_INDX"},
10846 {"bits": [19, 19], "name": "USE_VTX_VIEWPORT_INDX"},
10847 {"bits": [20, 20], "name": "USE_VTX_KILL_FLAG"},
10848 {"bits": [21, 21], "name": "VS_OUT_MISC_VEC_ENA"},
10849 {"bits": [22, 22], "name": "VS_OUT_CCDIST0_VEC_ENA"},
10850 {"bits": [23, 23], "name": "VS_OUT_CCDIST1_VEC_ENA"},
10851 {"bits": [24, 24], "name": "VS_OUT_MISC_SIDE_BUS_ENA"},
10852 {"bits": [25, 25], "name": "USE_VTX_GS_CUT_FLAG"},
10853 {"bits": [26, 26], "name": "USE_VTX_LINE_WIDTH"}
10858 {"bits": [0, 0], "name": "VPORT_X_SCALE_ENA"},
10859 {"bits": [1, 1], "name": "VPORT_X_OFFSET_ENA"},
10860 {"bits": [2, 2], "name": "VPORT_Y_SCALE_ENA"},
10861 {"bits": [3, 3], "name": "VPORT_Y_OFFSET_ENA"},
10862 {"bits": [4, 4], "name": "VPORT_Z_SCALE_ENA"},
10863 {"bits": [5, 5], "name": "VPORT_Z_OFFSET_ENA"},
10864 {"bits": [8, 8], "name": "VTX_XY_FMT"},
10865 {"bits": [9, 9], "name": "VTX_Z_FMT"},
10866 {"bits": [10, 10], "name": "VTX_W0_FMT"},
10867 {"bits": [11, 11], "name": "PERFCOUNTER_REF"}
10872 {"bits": [0, 2], "name": "MSAA_NUM_SAMPLES"},
10873 {"bits": [4, 4], "name": "AA_MASK_CENTROID_DTMN"},
10874 {"bits": [13, 16], "name": "MAX_SAMPLE_DIST"},
10875 {"bits": [20, 22], "name": "MSAA_EXPOSED_SAMPLES"},
10876 {"bits": [24, 25], "name": "DETAIL_TO_EXPOSED_MODE"}
10881 {"bits": [0, 15], "name": "AA_MASK_X0Y0"},
10882 {"bits": [16, 31], "name": "AA_MASK_X1Y0"}
10887 {"bits": [0, 15], "name": "AA_MASK_X0Y1"},
10888 {"bits": [16, 31], "name": "AA_MASK_X1Y1"}
10893 {"bits": [0, 3], "name": "S0_X"},
10894 {"bits": [4, 7], "name": "S0_Y"},
10895 {"bits": [8, 11], "name": "S1_X"},
10896 {"bits": [12, 15], "name": "S1_Y"},
10897 {"bits": [16, 19], "name": "S2_X"},
10898 {"bits": [20, 23], "name": "S2_Y"},
10899 {"bits": [24, 27], "name": "S3_X"},
10900 {"bits": [28, 31], "name": "S3_Y"}
10905 {"bits": [0, 3], "name": "S4_X"},
10906 {"bits": [4, 7], "name": "S4_Y"},
10907 {"bits": [8, 11], "name": "S5_X"},
10908 {"bits": [12, 15], "name": "S5_Y"},
10909 {"bits": [16, 19], "name": "S6_X"},
10910 {"bits": [20, 23], "name": "S6_Y"},
10911 {"bits": [24, 27], "name": "S7_X"},
10912 {"bits": [28, 31], "name": "S7_Y"}
10917 {"bits": [0, 3], "name": "S8_X"},
10918 {"bits": [4, 7], "name": "S8_Y"},
10919 {"bits": [8, 11], "name": "S9_X"},
10920 {"bits": [12, 15], "name": "S9_Y"},
10921 {"bits": [16, 19], "name": "S10_X"},
10922 {"bits": [20, 23], "name": "S10_Y"},
10923 {"bits": [24, 27], "name": "S11_X"},
10924 {"bits": [28, 31], "name": "S11_Y"}
10929 {"bits": [0, 3], "name": "S12_X"},
10930 {"bits": [4, 7], "name": "S12_Y"},
10931 {"bits": [8, 11], "name": "S13_X"},
10932 {"bits": [12, 15], "name": "S13_Y"},
10933 {"bits": [16, 19], "name": "S14_X"},
10934 {"bits": [20, 23], "name": "S14_Y"},
10935 {"bits": [24, 27], "name": "S15_X"},
10936 {"bits": [28, 31], "name": "S15_Y"}
10941 {"bits": [0, 3], "name": "DISTANCE_0"},
10942 {"bits": [4, 7], "name": "DISTANCE_1"},
10943 {"bits": [8, 11], "name": "DISTANCE_2"},
10944 {"bits": [12, 15], "name": "DISTANCE_3"},
10945 {"bits": [16, 19], "name": "DISTANCE_4"},
10946 {"bits": [20, 23], "name": "DISTANCE_5"},
10947 {"bits": [24, 27], "name": "DISTANCE_6"},
10948 {"bits": [28, 31], "name": "DISTANCE_7"}
10953 {"bits": [0, 3], "name": "DISTANCE_8"},
10954 {"bits": [4, 7], "name": "DISTANCE_9"},
10955 {"bits": [8, 11], "name": "DISTANCE_10"},
10956 {"bits": [12, 15], "name": "DISTANCE_11"},
10957 {"bits": [16, 19], "name": "DISTANCE_12"},
10958 {"bits": [20, 23], "name": "DISTANCE_13"},
10959 {"bits": [24, 27], "name": "DISTANCE_14"},
10960 {"bits": [28, 31], "name": "DISTANCE_15"}
10965 {"bits": [0, 14], "name": "BR_X"},
10966 {"bits": [16, 30], "name": "BR_Y"}
10971 {"bits": [0, 14], "name": "TL_X"},
10972 {"bits": [16, 30], "name": "TL_Y"}
10977 {"bits": [0, 15], "enum_ref": "CLIP_RULE", "name": "CLIP_RULE"}
10982 {"bits": [0, 3], "name": "ER_TRI"},
10983 {"bits": [4, 7], "name": "ER_POINT"},
10984 {"bits": [8, 11], "name": "ER_RECT"},
10985 {"bits": [12, 17], "name": "ER_LINE_LR"},
10986 {"bits": [18, 23], "name": "ER_LINE_RL"},
10987 {"bits": [24, 27], "name": "ER_LINE_TB"},
10988 {"bits": [28, 31], "name": "ER_LINE_BT"}
10993 {"bits": [0, 14], "name": "TL_X"},
10994 {"bits": [16, 30], "name": "TL_Y"},
10995 {"bits": [31, 31], "name": "WINDOW_OFFSET_DISABLE"}
11000 {"bits": [9, 9], "name": "EXPAND_LINE_WIDTH"},
11001 {"bits": [10, 10], "name": "LAST_PIXEL"},
11002 {"bits": [11, 11], "name": "PERPENDICULAR_ENDCAP_ENA"},
11003 {"bits": [12, 12], "name": "DX10_DIAMOND_TEST_ENA"}
11008 {"bits": [0, 15], "name": "LINE_PATTERN"},
11009 {"bits": [16, 23], "name": "REPEAT_COUNT"},
11010 {"bits": [28, 28], "name": "PATTERN_BIT_ORDER"},
11011 {"bits": [29, 30], "name": "AUTO_RESET_CNTL"}
11016 {"bits": [0, 3], "name": "CURRENT_PTR"},
11017 {"bits": [8, 15], "name": "CURRENT_COUNT"}
11022 {"bits": [0, 0], "name": "MSAA_ENABLE"},
11023 {"bits": [1, 1], "name": "VPORT_SCISSOR_ENABLE"},
11024 {"bits": [2, 2], "name": "LINE_STIPPLE_ENABLE"},
11025 {"bits": [3, 3], "name": "SEND_UNLIT_STILES_TO_PKR"}
11030 {"bits": [0, 0], "name": "WALK_SIZE"},
11031 {"bits": [1, 1], "name": "WALK_ALIGNMENT"},
11032 {"bits": [2, 2], "name": "WALK_ALIGN8_PRIM_FITS_ST"},
11033 {"bits": [3, 3], "name": "WALK_FENCE_ENABLE"},
11034 {"bits": [4, 6], "name": "WALK_FENCE_SIZE"},
11035 {"bits": [7, 7], "name": "SUPERTILE_WALK_ORDER_ENABLE"},
11036 {"bits": [8, 8], "name": "TILE_WALK_ORDER_ENABLE"},
11037 {"bits": [9, 9], "name": "TILE_COVER_DISABLE"},
11038 {"bits": [10, 10], "name": "TILE_COVER_NO_SCISSOR"},
11039 {"bits": [11, 11], "name": "ZMM_LINE_EXTENT"},
11040 {"bits": [12, 12], "name": "ZMM_LINE_OFFSET"},
11041 {"bits": [13, 13], "name": "ZMM_RECT_EXTENT"},
11042 {"bits": [14, 14], "name": "KILL_PIX_POST_HI_Z"},
11043 {"bits": [15, 15], "name": "KILL_PIX_POST_DETAIL_MASK"},
11044 {"bits": [16, 16], "name": "PS_ITER_SAMPLE"},
11045 {"bits": [17, 17], "name": "MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE"},
11046 {"bits": [18, 18], "name": "MULTI_GPU_SUPERTILE_ENABLE"},
11047 {"bits": [19, 19], "name": "GPU_ID_OVERRIDE_ENABLE"},
11048 {"bits": [20, 23], "name": "GPU_ID_OVERRIDE"},
11049 {"bits": [24, 24], "name": "MULTI_GPU_PRIM_DISCARD_ENABLE"},
11050 {"bits": [25, 25], "name": "FORCE_EOV_CNTDWN_ENABLE"},
11051 {"bits": [26, 26], "name": "FORCE_EOV_REZ_ENABLE"},
11052 {"bits": [27, 27], "name": "OUT_OF_ORDER_PRIMITIVE_ENABLE"},
11053 {"bits": [28, 30], "name": "OUT_OF_ORDER_WATER_MARK"}
11058 {"bits": [0, 13], "name": "X_COORD"}
11063 {"bits": [0, 0], "name": "ENABLE_HV_PRE_SHADER"},
11064 {"bits": [1, 1], "name": "FORCE_PRE_SHADER_ALL_PIXELS"}
11069 {"bits": [0, 13], "name": "Y_COORD"}
11074 {"bits": [0, 9], "name": "PERF_SEL"}
11079 {"bits": [0, 1], "enum_ref": "RbMap", "name": "RB_MAP_PKR0"},
11080 {"bits": [2, 3], "enum_ref": "RbMap", "name": "RB_MAP_PKR1"},
11081 {"bits": [4, 5], "enum_ref": "RbXsel2", "name": "RB_XSEL2"},
11082 {"bits": [6, 6], "enum_ref": "RbXsel", "name": "RB_XSEL"},
11083 {"bits": [7, 7], "enum_ref": "RbYsel", "name": "RB_YSEL"},
11084 {"bits": [8, 9], "enum_ref": "PkrMap", "name": "PKR_MAP"},
11085 {"bits": [10, 11], "enum_ref": "PkrXsel", "name": "PKR_XSEL"},
11086 {"bits": [12, 13], "enum_ref": "PkrYsel", "name": "PKR_YSEL"},
11087 {"bits": [14, 15], "enum_ref": "PkrXsel2", "name": "PKR_XSEL2"},
11088 {"bits": [16, 17], "enum_ref": "ScMap", "name": "SC_MAP"},
11089 {"bits": [18, 19], "enum_ref": "ScXsel", "name": "SC_XSEL"},
11090 {"bits": [20, 21], "enum_ref": "ScYsel", "name": "SC_YSEL"},
11091 {"bits": [24, 25], "enum_ref": "SeMap", "name": "SE_MAP"},
11092 {"bits": [26, 27], "enum_ref": "SeXsel", "name": "SE_XSEL"},
11093 {"bits": [28, 29], "enum_ref": "SeYsel", "name": "SE_YSEL"}
11098 {"bits": [0, 1], "enum_ref": "SePairMap", "name": "SE_PAIR_MAP"},
11099 {"bits": [2, 3], "enum_ref": "SePairXsel", "name": "SE_PAIR_XSEL"},
11100 {"bits": [4, 5], "enum_ref": "SePairYsel", "name": "SE_PAIR_YSEL"}
11105 {"bits": [0, 1], "name": "SLICE_EVEN_ENABLE"},
11106 {"bits": [2, 3], "name": "SLICE_ODD_ENABLE"}
11111 {"bits": [0, 15], "name": "X"},
11112 {"bits": [16, 31], "name": "Y"}
11117 {"bits": [0, 15], "name": "BR_X"},
11118 {"bits": [16, 31], "name": "BR_Y"}
11123 {"bits": [0, 15], "name": "TL_X"},
11124 {"bits": [16, 31], "name": "TL_Y"}
11129 {"bits": [0, 1], "name": "REALIGN_DQUADS_AFTER_N_WAVES"}
11134 {"bits": [0, 15], "name": "WINDOW_X_OFFSET"},
11135 {"bits": [16, 31], "name": "WINDOW_Y_OFFSET"}
11140 {"bits": [0, 8], "name": "HW_SCREEN_OFFSET_X"},
11141 {"bits": [16, 24], "name": "HW_SCREEN_OFFSET_Y"}
11146 {"bits": [0, 15], "name": "WIDTH"}
11151 {"bits": [0, 1], "name": "LINE_STIPPLE_RESET"},
11152 {"bits": [2, 2], "name": "EXPAND_FULL_LENGTH"},
11153 {"bits": [3, 3], "name": "FRACTIONAL_ACCUM"},
11154 {"bits": [4, 4], "name": "DIAMOND_ADJUST"}
11159 {"bits": [0, 23], "name": "LINE_STIPPLE_VALUE"}
11164 {"bits": [0, 15], "name": "PERFCOUNTER_HI"}
11169 {"bits": [0, 9], "name": "PERF_SEL"},
11170 {"bits": [10, 19], "name": "PERF_SEL1"},
11171 {"bits": [20, 23], "name": "CNTR_MODE"}
11176 {"bits": [0, 9], "name": "PERF_SEL2"},
11177 {"bits": [10, 19], "name": "PERF_SEL3"}
11182 {"bits": [0, 9], "name": "PERF_SEL"},
11183 {"bits": [20, 23], "name": "CNTR_MODE"}
11188 {"bits": [0, 15], "name": "MIN_SIZE"},
11189 {"bits": [16, 31], "name": "MAX_SIZE"}
11194 {"bits": [0, 15], "name": "HEIGHT"},
11195 {"bits": [16, 31], "name": "WIDTH"}
11200 {"bits": [0, 7], "name": "POLY_OFFSET_NEG_NUM_DB_BITS"},
11201 {"bits": [8, 8], "name": "POLY_OFFSET_DB_IS_FLOAT_FMT"}
11206 {"bits": [0, 0], "name": "TRIANGLE_FILTER_DISABLE"},
11207 {"bits": [1, 1], "name": "LINE_FILTER_DISABLE"},
11208 {"bits": [2, 2], "name": "POINT_FILTER_DISABLE"},
11209 {"bits": [3, 3], "name": "RECTANGLE_FILTER_DISABLE"},
11210 {"bits": [4, 4], "name": "TRIANGLE_EXPAND_ENA"},
11211 {"bits": [5, 5], "name": "LINE_EXPAND_ENA"},
11212 {"bits": [6, 6], "name": "POINT_EXPAND_ENA"},
11213 {"bits": [7, 7], "name": "RECTANGLE_EXPAND_ENA"},
11214 {"bits": [8, 15], "name": "PRIM_EXPAND_CONSTANT"},
11215 {"bits": [30, 30], "name": "XMAX_RIGHT_EXCLUSION"},
11216 {"bits": [31, 31], "name": "YMAX_BOTTOM_EXCLUSION"}
11221 {"bits": [0, 0], "name": "CULL_FRONT"},
11222 {"bits": [1, 1], "name": "CULL_BACK"},
11223 {"bits": [2, 2], "name": "FACE"},
11224 {"bits": [3, 4], "enum_ref": "PA_SU_SC_MODE_CNTL__POLY_MODE", "name": "POLY_MODE"},
11225 {"bits": [5, 7], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_FRONT_PTYPE"},
11226 {"bits": [8, 10], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_BACK_PTYPE"},
11227 {"bits": [11, 11], "name": "POLY_OFFSET_FRONT_ENABLE"},
11228 {"bits": [12, 12], "name": "POLY_OFFSET_BACK_ENABLE"},
11229 {"bits": [13, 13], "name": "POLY_OFFSET_PARA_ENABLE"},
11230 {"bits": [16, 16], "name": "VTX_WINDOW_OFFSET_ENABLE"},
11231 {"bits": [19, 19], "name": "PROVOKING_VTX_LAST"},
11232 {"bits": [20, 20], "name": "PERSP_CORR_DIS"},
11233 {"bits": [21, 21], "name": "MULTI_PRIM_IB_ENA"}
11238 {"bits": [0, 0], "name": "PIX_CENTER"},
11239 {"bits": [1, 2], "enum_ref": "PA_SU_VTX_CNTL__ROUND_MODE", "name": "ROUND_MODE"},
11240 {"bits": [3, 5], "enum_ref": "QUANT_MODE", "name": "QUANT_MODE"}
11245 {"bits": [0, 7], "name": "PERFCOUNTER_SELECT"}
11250 {"bits": [0, 0], "name": "PERFMON_CLOCK_STATE"}
11255 {"bits": [0, 2], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"},
11256 {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"}
11261 {"bits": [0, 7], "name": "PERFMON_SAMPLE_DELAY"},
11262 {"bits": [8, 31], "name": "RESERVED"}
11267 {"bits": [0, 11], "name": "RESERVED1"},
11268 {"bits": [12, 13], "name": "PERFMON_RING_MODE"},
11269 {"bits": [14, 15], "name": "RESERVED"},
11270 {"bits": [16, 31], "name": "PERFMON_SAMPLE_INTERVAL"}
11275 {"bits": [0, 15], "name": "RING_BASE_HI"},
11276 {"bits": [16, 31], "name": "RESERVED"}
11281 {"bits": [0, 7], "name": "PERFMON_SEGMENT_SIZE"},
11282 {"bits": [8, 10], "name": "RESERVED1"},
11283 {"bits": [11, 15], "name": "GLOBAL_NUM_LINE"},
11284 {"bits": [16, 20], "name": "SE0_NUM_LINE"},
11285 {"bits": [21, 25], "name": "SE1_NUM_LINE"},
11286 {"bits": [26, 30], "name": "SE2_NUM_LINE"},
11287 {"bits": [31, 31], "name": "RESERVED"}
11292 {"bits": [0, 7], "name": "OBSOLETE_UMSK"},
11293 {"bits": [16, 17], "name": "OBSOLETE_SWAP"}
11298 {"bits": [0, 0], "name": "PERSP_CENTER_CNTL"},
11299 {"bits": [4, 4], "name": "PERSP_CENTROID_CNTL"},
11300 {"bits": [8, 8], "name": "LINEAR_CENTER_CNTL"},
11301 {"bits": [12, 12], "name": "LINEAR_CENTROID_CNTL"},
11302 {"bits": [16, 17], "name": "POS_FLOAT_LOCATION"},
11303 {"bits": [20, 20], "name": "POS_FLOAT_ULC"},
11304 {"bits": [24, 24], "name": "FRONT_FACE_ALL_BITS"}
11309 {"bits": [0, 20], "name": "GPR_WRITE_PRIORITY"},
11310 {"bits": [21, 23], "name": "EXP_PRIORITY_ORDER"},
11311 {"bits": [24, 24], "name": "ENABLE_SQG_TOP_EVENTS"},
11312 {"bits": [25, 25], "name": "ENABLE_SQG_BOP_EVENTS"},
11313 {"bits": [26, 26], "name": "RSRC_MGMT_RESET"},
11314 {"bits": [27, 27], "name": "TTRACE_STALL_ALL"}
11319 {"bits": [0, 0], "name": "FLAT_SHADE_ENA"},
11320 {"bits": [1, 1], "name": "PNT_SPRITE_ENA"},
11321 {"bits": [2, 4], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_X"},
11322 {"bits": [5, 7], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Y"},
11323 {"bits": [8, 10], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Z"},
11324 {"bits": [11, 13], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_W"},
11325 {"bits": [14, 14], "name": "PNT_SPRITE_TOP_1"}
11330 {"bits": [0, 7], "name": "PERF_SEL"}
11335 {"bits": [0, 3], "name": "BIN0_MIN"},
11336 {"bits": [4, 7], "name": "BIN0_MAX"},
11337 {"bits": [8, 11], "name": "BIN1_MIN"},
11338 {"bits": [12, 15], "name": "BIN1_MAX"},
11339 {"bits": [16, 19], "name": "BIN2_MIN"},
11340 {"bits": [20, 23], "name": "BIN2_MAX"},
11341 {"bits": [24, 27], "name": "BIN3_MIN"},
11342 {"bits": [28, 31], "name": "BIN3_MAX"}
11347 {"bits": [0, 5], "name": "OFFSET"},
11348 {"bits": [8, 9], "name": "DEFAULT_VAL"},
11349 {"bits": [10, 10], "name": "FLAT_SHADE"},
11350 {"bits": [13, 16], "name": "CYL_WRAP"},
11351 {"bits": [17, 17], "name": "PT_SPRITE_TEX"},
11352 {"bits": [18, 18], "name": "DUP"},
11353 {"bits": [19, 19], "name": "FP16_INTERP_MODE"},
11354 {"bits": [20, 20], "name": "USE_DEFAULT_ATTR1"},
11355 {"bits": [21, 22], "name": "DEFAULT_VAL_ATTR1"},
11356 {"bits": [23, 23], "name": "PT_SPRITE_TEX_ATTR1"},
11357 {"bits": [24, 24], "name": "ATTR0_VALID"},
11358 {"bits": [25, 25], "name": "ATTR1_VALID"}
11363 {"bits": [0, 5], "name": "OFFSET"},
11364 {"bits": [8, 9], "name": "DEFAULT_VAL"},
11365 {"bits": [10, 10], "name": "FLAT_SHADE"},
11366 {"bits": [18, 18], "name": "DUP"},
11367 {"bits": [19, 19], "name": "FP16_INTERP_MODE"},
11368 {"bits": [20, 20], "name": "USE_DEFAULT_ATTR1"},
11369 {"bits": [21, 22], "name": "DEFAULT_VAL_ATTR1"},
11370 {"bits": [24, 24], "name": "ATTR0_VALID"},
11371 {"bits": [25, 25], "name": "ATTR1_VALID"}
11376 {"bits": [0, 0], "name": "PERSP_SAMPLE_ENA"},
11377 {"bits": [1, 1], "name": "PERSP_CENTER_ENA"},
11378 {"bits": [2, 2], "name": "PERSP_CENTROID_ENA"},
11379 {"bits": [3, 3], "name": "PERSP_PULL_MODEL_ENA"},
11380 {"bits": [4, 4], "name": "LINEAR_SAMPLE_ENA"},
11381 {"bits": [5, 5], "name": "LINEAR_CENTER_ENA"},
11382 {"bits": [6, 6], "name": "LINEAR_CENTROID_ENA"},
11383 {"bits": [7, 7], "name": "LINE_STIPPLE_TEX_ENA"},
11384 {"bits": [8, 8], "name": "POS_X_FLOAT_ENA"},
11385 {"bits": [9, 9], "name": "POS_Y_FLOAT_ENA"},
11386 {"bits": [10, 10], "name": "POS_Z_FLOAT_ENA"},
11387 {"bits": [11, 11], "name": "POS_W_FLOAT_ENA"},
11388 {"bits": [12, 12], "name": "FRONT_FACE_ENA"},
11389 {"bits": [13, 13], "name": "ANCILLARY_ENA"},
11390 {"bits": [14, 14], "name": "SAMPLE_COVERAGE_ENA"},
11391 {"bits": [15, 15], "name": "POS_FIXED_PT_ENA"}
11396 {"bits": [0, 5], "name": "NUM_INTERP"},
11397 {"bits": [6, 6], "name": "PARAM_GEN"},
11398 {"bits": [14, 14], "name": "BC_OPTIMIZE_DISABLE"}
11403 {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL0_EXPORT_FORMAT"},
11404 {"bits": [4, 7], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL1_EXPORT_FORMAT"},
11405 {"bits": [8, 11], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL2_EXPORT_FORMAT"},
11406 {"bits": [12, 15], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL3_EXPORT_FORMAT"},
11407 {"bits": [16, 19], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL4_EXPORT_FORMAT"},
11408 {"bits": [20, 23], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL5_EXPORT_FORMAT"},
11409 {"bits": [24, 27], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL6_EXPORT_FORMAT"},
11410 {"bits": [28, 31], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL7_EXPORT_FORMAT"}
11415 {"bits": [0, 5], "name": "LIMIT"}
11420 {"bits": [0, 5], "name": "VGPRS"},
11421 {"bits": [6, 9], "name": "SGPRS"},
11422 {"bits": [10, 11], "name": "PRIORITY"},
11423 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
11424 {"bits": [20, 20], "name": "PRIV"},
11425 {"bits": [21, 21], "name": "DX10_CLAMP"},
11426 {"bits": [22, 22], "name": "DEBUG_MODE"},
11427 {"bits": [23, 23], "name": "IEEE_MODE"},
11428 {"bits": [24, 24], "name": "CU_GROUP_ENABLE"},
11429 {"bits": [25, 27], "name": "CACHE_CTL"},
11430 {"bits": [28, 28], "name": "CDBG_USER"}
11435 {"bits": [0, 5], "name": "VGPRS"},
11436 {"bits": [6, 9], "name": "SGPRS"},
11437 {"bits": [10, 11], "name": "PRIORITY"},
11438 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
11439 {"bits": [20, 20], "name": "PRIV"},
11440 {"bits": [21, 21], "name": "DX10_CLAMP"},
11441 {"bits": [22, 22], "name": "DEBUG_MODE"},
11442 {"bits": [23, 23], "name": "IEEE_MODE"},
11443 {"bits": [24, 26], "name": "CACHE_CTL"},
11444 {"bits": [27, 27], "name": "CDBG_USER"}
11449 {"bits": [0, 5], "name": "VGPRS"},
11450 {"bits": [6, 9], "name": "SGPRS"},
11451 {"bits": [10, 11], "name": "PRIORITY"},
11452 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
11453 {"bits": [20, 20], "name": "PRIV"},
11454 {"bits": [21, 21], "name": "DX10_CLAMP"},
11455 {"bits": [22, 22], "name": "DEBUG_MODE"},
11456 {"bits": [23, 23], "name": "IEEE_MODE"},
11457 {"bits": [24, 25], "name": "VGPR_COMP_CNT"},
11458 {"bits": [26, 28], "name": "CACHE_CTL"},
11459 {"bits": [29, 29], "name": "CDBG_USER"}
11464 {"bits": [0, 5], "name": "VGPRS"},
11465 {"bits": [6, 9], "name": "SGPRS"},
11466 {"bits": [10, 11], "name": "PRIORITY"},
11467 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
11468 {"bits": [20, 20], "name": "PRIV"},
11469 {"bits": [21, 21], "name": "DX10_CLAMP"},
11470 {"bits": [22, 22], "name": "DEBUG_MODE"},
11471 {"bits": [23, 23], "name": "IEEE_MODE"},
11472 {"bits": [24, 24], "name": "CU_GROUP_DISABLE"},
11473 {"bits": [25, 27], "name": "CACHE_CTL"},
11474 {"bits": [28, 28], "name": "CDBG_USER"}
11479 {"bits": [0, 5], "name": "VGPRS"},
11480 {"bits": [6, 9], "name": "SGPRS"},
11481 {"bits": [10, 11], "name": "PRIORITY"},
11482 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
11483 {"bits": [20, 20], "name": "PRIV"},
11484 {"bits": [21, 21], "name": "DX10_CLAMP"},
11485 {"bits": [22, 22], "name": "DEBUG_MODE"},
11486 {"bits": [23, 23], "name": "IEEE_MODE"},
11487 {"bits": [24, 25], "name": "VGPR_COMP_CNT"},
11488 {"bits": [26, 26], "name": "CU_GROUP_ENABLE"},
11489 {"bits": [27, 29], "name": "CACHE_CTL"},
11490 {"bits": [30, 30], "name": "CDBG_USER"}
11495 {"bits": [0, 0], "name": "SCRATCH_EN"},
11496 {"bits": [1, 5], "name": "USER_SGPR"},
11497 {"bits": [6, 6], "name": "TRAP_PRESENT"},
11498 {"bits": [7, 7], "name": "OC_LDS_EN"},
11499 {"bits": [8, 16], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
11500 {"bits": [20, 28], "name": "LDS_SIZE"}
11505 {"bits": [0, 0], "name": "SCRATCH_EN"},
11506 {"bits": [1, 5], "name": "USER_SGPR"},
11507 {"bits": [6, 6], "name": "TRAP_PRESENT"},
11508 {"bits": [7, 15], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
11513 {"bits": [0, 0], "name": "SCRATCH_EN"},
11514 {"bits": [1, 5], "name": "USER_SGPR"},
11515 {"bits": [6, 6], "name": "TRAP_PRESENT"},
11516 {"bits": [7, 7], "name": "OC_LDS_EN"},
11517 {"bits": [8, 8], "name": "TG_SIZE_EN"},
11518 {"bits": [9, 17], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
11523 {"bits": [0, 0], "name": "SCRATCH_EN"},
11524 {"bits": [1, 5], "name": "USER_SGPR"},
11525 {"bits": [6, 6], "name": "TRAP_PRESENT"},
11526 {"bits": [7, 15], "name": "LDS_SIZE"},
11527 {"bits": [16, 24], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
11532 {"bits": [0, 0], "name": "SCRATCH_EN"},
11533 {"bits": [1, 5], "name": "USER_SGPR"},
11534 {"bits": [6, 6], "name": "TRAP_PRESENT"},
11535 {"bits": [7, 7], "name": "WAVE_CNT_EN"},
11536 {"bits": [8, 15], "name": "EXTRA_LDS_SIZE"},
11537 {"bits": [16, 24], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
11542 {"bits": [0, 0], "name": "SCRATCH_EN"},
11543 {"bits": [1, 5], "name": "USER_SGPR"},
11544 {"bits": [6, 6], "name": "TRAP_PRESENT"},
11545 {"bits": [7, 7], "name": "OC_LDS_EN"},
11546 {"bits": [8, 8], "name": "SO_BASE0_EN"},
11547 {"bits": [9, 9], "name": "SO_BASE1_EN"},
11548 {"bits": [10, 10], "name": "SO_BASE2_EN"},
11549 {"bits": [11, 11], "name": "SO_BASE3_EN"},
11550 {"bits": [12, 12], "name": "SO_EN"},
11551 {"bits": [13, 21], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
11552 {"bits": [24, 24], "name": "DISPATCH_DRAW_EN"}
11557 {"bits": [0, 15], "name": "CU_EN"},
11558 {"bits": [16, 21], "name": "WAVE_LIMIT"},
11559 {"bits": [22, 25], "name": "LOCK_LOW_THRESHOLD"},
11560 {"bits": [26, 31], "name": "GROUP_FIFO_DEPTH"}
11565 {"bits": [0, 5], "name": "WAVE_LIMIT"},
11566 {"bits": [6, 9], "name": "LOCK_LOW_THRESHOLD"},
11567 {"bits": [10, 15], "name": "GROUP_FIFO_DEPTH"}
11572 {"bits": [0, 15], "name": "CU_EN"},
11573 {"bits": [16, 21], "name": "WAVE_LIMIT"},
11574 {"bits": [22, 25], "name": "LOCK_LOW_THRESHOLD"}
11579 {"bits": [0, 3], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS0_EXPORT_FORMAT"},
11580 {"bits": [4, 7], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS1_EXPORT_FORMAT"},
11581 {"bits": [8, 11], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS2_EXPORT_FORMAT"},
11582 {"bits": [12, 15], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS3_EXPORT_FORMAT"}
11587 {"bits": [0, 7], "name": "MEM_BASE"}
11592 {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "Z_EXPORT_FORMAT"}
11597 {"bits": [1, 5], "name": "VS_EXPORT_COUNT"},
11598 {"bits": [6, 6], "name": "VS_HALF_PACK"}
11603 {"bits": [0, 0], "name": "TARGET_INST"},
11604 {"bits": [1, 1], "name": "TARGET_DATA"},
11605 {"bits": [2, 2], "name": "INVALIDATE"},
11606 {"bits": [3, 3], "name": "WRITEBACK"},
11607 {"bits": [4, 4], "name": "VOL"},
11608 {"bits": [16, 16], "name": "COMPLETE"}
11613 {"bits": [0, 0], "name": "DWB"},
11614 {"bits": [1, 1], "name": "DIRTY"}
11619 {"bits": [0, 15], "name": "BASE_ADDRESS_HI"},
11620 {"bits": [16, 29], "name": "STRIDE"},
11621 {"bits": [30, 30], "name": "CACHE_SWIZZLE"},
11622 {"bits": [31, 31], "name": "SWIZZLE_ENABLE"}
11627 {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"},
11628 {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"},
11629 {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"},
11630 {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"},
11631 {"bits": [12, 14], "enum_ref": "BUF_NUM_FORMAT", "name": "NUM_FORMAT"},
11632 {"bits": [15, 18], "enum_ref": "BUF_DATA_FORMAT", "name": "DATA_FORMAT"},
11633 {"bits": [19, 20], "name": "ELEMENT_SIZE"},
11634 {"bits": [21, 22], "name": "INDEX_STRIDE"},
11635 {"bits": [23, 23], "name": "ADD_TID_ENABLE"},
11636 {"bits": [24, 24], "name": "ATC"},
11637 {"bits": [25, 25], "name": "HASH_ENABLE"},
11638 {"bits": [26, 26], "name": "HEAP"},
11639 {"bits": [27, 29], "name": "MTYPE"},
11640 {"bits": [30, 31], "enum_ref": "SQ_RSRC_BUF_TYPE", "name": "TYPE"}
11645 {"bits": [0, 7], "name": "BASE_ADDRESS_HI"},
11646 {"bits": [8, 19], "name": "MIN_LOD"},
11647 {"bits": [20, 25], "enum_ref": "IMG_DATA_FORMAT", "name": "DATA_FORMAT"},
11648 {"bits": [26, 29], "enum_ref": "IMG_NUM_FORMAT", "name": "NUM_FORMAT"},
11649 {"bits": [30, 31], "name": "MTYPE"}
11654 {"bits": [0, 13], "name": "WIDTH"},
11655 {"bits": [14, 27], "name": "HEIGHT"},
11656 {"bits": [28, 30], "name": "PERF_MOD"},
11657 {"bits": [31, 31], "name": "INTERLACED"}
11662 {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"},
11663 {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"},
11664 {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"},
11665 {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"},
11666 {"bits": [12, 15], "name": "BASE_LEVEL"},
11667 {"bits": [16, 19], "name": "LAST_LEVEL"},
11668 {"bits": [20, 24], "name": "TILING_INDEX"},
11669 {"bits": [25, 25], "name": "POW2_PAD"},
11670 {"bits": [26, 26], "name": "MTYPE"},
11671 {"bits": [27, 27], "name": "ATC"},
11672 {"bits": [28, 31], "enum_ref": "SQ_RSRC_IMG_TYPE", "name": "TYPE"}
11677 {"bits": [0, 12], "name": "DEPTH"},
11678 {"bits": [13, 26], "name": "PITCH"}
11683 {"bits": [0, 12], "name": "BASE_ARRAY"},
11684 {"bits": [13, 25], "name": "LAST_ARRAY"}
11689 {"bits": [0, 11], "name": "MIN_LOD_WARN"},
11690 {"bits": [12, 19], "name": "COUNTER_BANK_ID"},
11691 {"bits": [20, 20], "name": "LOD_HDW_CNT_EN"},
11692 {"bits": [21, 21], "name": "COMPRESSION_EN"},
11693 {"bits": [22, 22], "name": "ALPHA_IS_ON_MSB"},
11694 {"bits": [23, 23], "name": "COLOR_TRANSFORM"},
11695 {"bits": [24, 27], "name": "LOST_ALPHA_BITS"},
11696 {"bits": [28, 31], "name": "LOST_COLOR_BITS"}
11701 {"bits": [0, 2], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_X"},
11702 {"bits": [3, 5], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Y"},
11703 {"bits": [6, 8], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Z"},
11704 {"bits": [9, 11], "name": "MAX_ANISO_RATIO"},
11705 {"bits": [12, 14], "enum_ref": "SQ_TEX_DEPTH_COMPARE", "name": "DEPTH_COMPARE_FUNC"},
11706 {"bits": [15, 15], "name": "FORCE_UNNORMALIZED"},
11707 {"bits": [16, 18], "name": "ANISO_THRESHOLD"},
11708 {"bits": [19, 19], "name": "MC_COORD_TRUNC"},
11709 {"bits": [20, 20], "name": "FORCE_DEGAMMA"},
11710 {"bits": [21, 26], "name": "ANISO_BIAS"},
11711 {"bits": [27, 27], "name": "TRUNC_COORD"},
11712 {"bits": [28, 28], "name": "DISABLE_CUBE_WRAP"},
11713 {"bits": [29, 30], "enum_ref": "SQ_IMG_FILTER_TYPE", "name": "FILTER_MODE"},
11714 {"bits": [31, 31], "name": "COMPAT_MODE"}
11719 {"bits": [0, 11], "name": "MIN_LOD"},
11720 {"bits": [12, 23], "name": "MAX_LOD"},
11721 {"bits": [24, 27], "name": "PERF_MIP"},
11722 {"bits": [28, 31], "name": "PERF_Z"}
11727 {"bits": [0, 13], "name": "LOD_BIAS"},
11728 {"bits": [14, 19], "name": "LOD_BIAS_SEC"},
11729 {"bits": [20, 21], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MAG_FILTER"},
11730 {"bits": [22, 23], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MIN_FILTER"},
11731 {"bits": [24, 25], "enum_ref": "SQ_TEX_Z_FILTER", "name": "Z_FILTER"},
11732 {"bits": [26, 27], "enum_ref": "SQ_TEX_MIP_FILTER", "name": "MIP_FILTER"},
11733 {"bits": [28, 28], "name": "MIP_POINT_PRECLAMP"},
11734 {"bits": [29, 29], "name": "DISABLE_LSB_CEIL"},
11735 {"bits": [30, 30], "name": "FILTER_PREC_FIX"},
11736 {"bits": [31, 31], "name": "ANISO_OVERRIDE"}
11741 {"bits": [0, 11], "name": "BORDER_COLOR_PTR"},
11742 {"bits": [29, 29], "name": "UPGRADED_DEPTH"},
11743 {"bits": [30, 31], "enum_ref": "SQ_TEX_BORDER_COLOR", "name": "BORDER_COLOR_TYPE"}
11748 {"bits": [0, 8], "name": "PERF_SEL"},
11749 {"bits": [12, 15], "name": "SQC_BANK_MASK"},
11750 {"bits": [16, 19], "name": "SQC_CLIENT_MASK"},
11751 {"bits": [20, 23], "name": "SPM_MODE"},
11752 {"bits": [24, 27], "name": "SIMD_MASK"},
11753 {"bits": [28, 31], "name": "PERF_MODE"}
11758 {"bits": [0, 0], "name": "PS_EN"},
11759 {"bits": [1, 1], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"},
11760 {"bits": [2, 2], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"},
11761 {"bits": [3, 3], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"},
11762 {"bits": [4, 4], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"},
11763 {"bits": [5, 5], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"},
11764 {"bits": [6, 6], "name": "CS_EN"},
11765 {"bits": [8, 12], "name": "CNTR_RATE"},
11766 {"bits": [13, 13], "name": "DISABLE_FLUSH"}
11771 {"bits": [0, 0], "name": "FORCE_EN"}
11776 {"bits": [0, 15], "name": "SH0_MASK"},
11777 {"bits": [16, 31], "name": "SH1_MASK"}
11782 {"bits": [0, 3], "name": "ADDR_HI"}
11787 {"bits": [31, 31], "name": "RESET_BUFFER"}
11792 {"bits": [0, 2], "name": "HIWATER"}
11797 {"bits": [0, 4], "name": "CU_SEL"},
11798 {"bits": [5, 5], "name": "SH_SEL"},
11799 {"bits": [7, 7], "name": "REG_STALL_EN"},
11800 {"bits": [8, 11], "name": "SIMD_EN"},
11801 {"bits": [12, 13], "name": "VM_ID_MASK"},
11802 {"bits": [14, 14], "name": "SPI_STALL_EN"},
11803 {"bits": [15, 15], "name": "SQ_STALL_EN"},
11804 {"bits": [16, 31], "name": "RANDOM_SEED"}
11809 {"bits": [0, 2], "name": "MASK_PS"},
11810 {"bits": [3, 5], "name": "MASK_VS"},
11811 {"bits": [6, 8], "name": "MASK_GS"},
11812 {"bits": [9, 11], "name": "MASK_ES"},
11813 {"bits": [12, 14], "name": "MASK_HS"},
11814 {"bits": [15, 17], "name": "MASK_LS"},
11815 {"bits": [18, 20], "name": "MASK_CS"},
11816 {"bits": [21, 22], "name": "MODE"},
11817 {"bits": [23, 24], "name": "CAPTURE_MODE"},
11818 {"bits": [25, 25], "name": "AUTOFLUSH_EN"},
11819 {"bits": [26, 26], "name": "PRIV"},
11820 {"bits": [27, 28], "name": "ISSUE_MASK"},
11821 {"bits": [29, 29], "name": "TEST_MODE"},
11822 {"bits": [30, 30], "name": "INTERRUPT_EN"},
11823 {"bits": [31, 31], "name": "WRAP"}
11828 {"bits": [0, 21], "name": "SIZE"}
11833 {"bits": [0, 9], "name": "FINISH_PENDING"},
11834 {"bits": [16, 25], "name": "FINISH_DONE"},
11835 {"bits": [29, 29], "name": "NEW_BUF"},
11836 {"bits": [30, 30], "name": "BUSY"},
11837 {"bits": [31, 31], "name": "FULL"}
11842 {"bits": [0, 15], "name": "TOKEN_MASK"},
11843 {"bits": [16, 23], "name": "REG_MASK"},
11844 {"bits": [24, 24], "name": "REG_DROP_ON_STALL"}
11849 {"bits": [0, 29], "name": "WPTR"},
11850 {"bits": [30, 31], "name": "READ_OFFSET"}
11855 {"bits": [0, 5], "name": "VGPR_BASE"},
11856 {"bits": [8, 13], "name": "VGPR_SIZE"},
11857 {"bits": [16, 21], "name": "SGPR_BASE"},
11858 {"bits": [24, 27], "name": "SGPR_SIZE"}
11863 {"bits": [0, 3], "name": "WAVE_ID"},
11864 {"bits": [4, 5], "name": "SIMD_ID"},
11865 {"bits": [6, 7], "name": "PIPE_ID"},
11866 {"bits": [8, 11], "name": "CU_ID"},
11867 {"bits": [12, 12], "name": "SH_ID"},
11868 {"bits": [13, 14], "name": "SE_ID"},
11869 {"bits": [16, 19], "name": "TG_ID"},
11870 {"bits": [20, 23], "name": "VM_ID"},
11871 {"bits": [24, 26], "name": "QUEUE_ID"},
11872 {"bits": [27, 29], "name": "STATE_ID"},
11873 {"bits": [30, 31], "name": "ME_ID"}
11878 {"bits": [0, 2], "name": "IBUF_ST"},
11879 {"bits": [3, 3], "name": "PC_INVALID"},
11880 {"bits": [4, 4], "name": "NEED_NEXT_DW"},
11881 {"bits": [5, 7], "name": "NO_PREFETCH_CNT"},
11882 {"bits": [8, 9], "name": "IBUF_RPTR"},
11883 {"bits": [10, 11], "name": "IBUF_WPTR"},
11884 {"bits": [16, 19], "name": "INST_STR_ST"},
11885 {"bits": [20, 23], "name": "MISC_CNT"},
11886 {"bits": [24, 25], "name": "ECC_ST"},
11887 {"bits": [26, 26], "name": "IS_HYB"},
11888 {"bits": [27, 28], "name": "HYB_CNT"},
11889 {"bits": [29, 29], "name": "KILL"},
11890 {"bits": [30, 30], "name": "NEED_KILL_IFETCH"}
11895 {"bits": [0, 0], "name": "IXNACK"},
11896 {"bits": [1, 1], "name": "XNACK"},
11897 {"bits": [2, 2], "name": "TA_NEED_RESET"},
11898 {"bits": [4, 7], "name": "XCNT"},
11899 {"bits": [8, 11], "name": "QCNT"}
11904 {"bits": [0, 3], "name": "VM_CNT"},
11905 {"bits": [4, 6], "name": "EXP_CNT"},
11906 {"bits": [8, 11], "name": "LGKM_CNT"},
11907 {"bits": [12, 14], "name": "VALU_CNT"},
11908 {"bits": [15, 15], "name": "FIRST_REPLAY"},
11909 {"bits": [16, 19], "name": "RCNT"}
11914 {"bits": [0, 7], "name": "LDS_BASE"},
11915 {"bits": [12, 20], "name": "LDS_SIZE"}
11920 {"bits": [0, 3], "name": "FP_ROUND"},
11921 {"bits": [4, 7], "name": "FP_DENORM"},
11922 {"bits": [8, 8], "name": "DX10_CLAMP"},
11923 {"bits": [9, 9], "name": "IEEE"},
11924 {"bits": [10, 10], "name": "LOD_CLAMPED"},
11925 {"bits": [11, 11], "name": "DEBUG_EN"},
11926 {"bits": [12, 20], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
11927 {"bits": [27, 27], "name": "GPR_IDX_EN"},
11928 {"bits": [28, 28], "name": "VSKIP"},
11929 {"bits": [29, 31], "name": "CSP"}
11934 {"bits": [0, 15], "name": "PC_HI"}
11939 {"bits": [0, 0], "name": "SCC"},
11940 {"bits": [1, 2], "name": "SPI_PRIO"},
11941 {"bits": [3, 4], "name": "USER_PRIO"},
11942 {"bits": [5, 5], "name": "PRIV"},
11943 {"bits": [6, 6], "name": "TRAP_EN"},
11944 {"bits": [7, 7], "name": "TTRACE_EN"},
11945 {"bits": [8, 8], "name": "EXPORT_RDY"},
11946 {"bits": [9, 9], "name": "EXECZ"},
11947 {"bits": [10, 10], "name": "VCCZ"},
11948 {"bits": [11, 11], "name": "IN_TG"},
11949 {"bits": [12, 12], "name": "IN_BARRIER"},
11950 {"bits": [13, 13], "name": "HALT"},
11951 {"bits": [14, 14], "name": "TRAP"},
11952 {"bits": [15, 15], "name": "TTRACE_CU_EN"},
11953 {"bits": [16, 16], "name": "VALID"},
11954 {"bits": [17, 17], "name": "ECC_ERR"},
11955 {"bits": [18, 18], "name": "SKIP_EXPORT"},
11956 {"bits": [19, 19], "name": "PERF_EN"},
11957 {"bits": [20, 20], "name": "COND_DBG_USER"},
11958 {"bits": [21, 21], "name": "COND_DBG_SYS"},
11959 {"bits": [22, 22], "name": "ALLOW_REPLAY"},
11960 {"bits": [23, 23], "name": "INST_ATC"},
11961 {"bits": [27, 27], "name": "MUST_EXPORT"}
11966 {"bits": [0, 7], "name": "ADDR_HI"}
11971 {"bits": [0, 8], "enum_ref": "EXCP_EN", "name": "EXCP"},
11972 {"bits": [10, 10], "name": "SAVECTX"},
11973 {"bits": [16, 21], "name": "EXCP_CYCLE"},
11974 {"bits": [29, 31], "name": "DP_RATE"}
11979 {"bits": [0, 0], "name": "MRT0_COLOR_OPT_DISABLE"},
11980 {"bits": [1, 1], "name": "MRT0_ALPHA_OPT_DISABLE"},
11981 {"bits": [4, 4], "name": "MRT1_COLOR_OPT_DISABLE"},
11982 {"bits": [5, 5], "name": "MRT1_ALPHA_OPT_DISABLE"},
11983 {"bits": [8, 8], "name": "MRT2_COLOR_OPT_DISABLE"},
11984 {"bits": [9, 9], "name": "MRT2_ALPHA_OPT_DISABLE"},
11985 {"bits": [12, 12], "name": "MRT3_COLOR_OPT_DISABLE"},
11986 {"bits": [13, 13], "name": "MRT3_ALPHA_OPT_DISABLE"},
11987 {"bits": [16, 16], "name": "MRT4_COLOR_OPT_DISABLE"},
11988 {"bits": [17, 17], "name": "MRT4_ALPHA_OPT_DISABLE"},
11989 {"bits": [20, 20], "name": "MRT5_COLOR_OPT_DISABLE"},
11990 {"bits": [21, 21], "name": "MRT5_ALPHA_OPT_DISABLE"},
11991 {"bits": [24, 24], "name": "MRT6_COLOR_OPT_DISABLE"},
11992 {"bits": [25, 25], "name": "MRT6_ALPHA_OPT_DISABLE"},
11993 {"bits": [28, 28], "name": "MRT7_COLOR_OPT_DISABLE"},
11994 {"bits": [29, 29], "name": "MRT7_ALPHA_OPT_DISABLE"},
11995 {"bits": [31, 31], "name": "PIXEN_ZERO_OPT_DISABLE"}
12000 {"bits": [0, 3], "enum_ref": "SX_BLEND_OPT_EPSILON__MRT0_EPSILON", "name": "MRT0_EPSILON"},
12001 {"bits": [4, 7], "name": "MRT1_EPSILON"},
12002 {"bits": [8, 11], "name": "MRT2_EPSILON"},
12003 {"bits": [12, 15], "name": "MRT3_EPSILON"},
12004 {"bits": [16, 19], "name": "MRT4_EPSILON"},
12005 {"bits": [20, 23], "name": "MRT5_EPSILON"},
12006 {"bits": [24, 27], "name": "MRT6_EPSILON"},
12007 {"bits": [28, 31], "name": "MRT7_EPSILON"}
12012 {"bits": [0, 2], "enum_ref": "SX_BLEND_OPT", "name": "COLOR_SRC_OPT"},
12013 {"bits": [4, 6], "enum_ref": "SX_BLEND_OPT", "name": "COLOR_DST_OPT"},
12014 {"bits": [8, 10], "enum_ref": "SX_OPT_COMB_FCN", "name": "COLOR_COMB_FCN"},
12015 {"bits": [16, 18], "enum_ref": "SX_BLEND_OPT", "name": "ALPHA_SRC_OPT"},
12016 {"bits": [20, 22], "enum_ref": "SX_BLEND_OPT", "name": "ALPHA_DST_OPT"},
12017 {"bits": [24, 26], "enum_ref": "SX_OPT_COMB_FCN", "name": "ALPHA_COMB_FCN"}
12022 {"bits": [0, 9], "name": "PERFCOUNTER_SELECT"},
12023 {"bits": [10, 19], "name": "PERFCOUNTER_SELECT1"},
12024 {"bits": [20, 23], "name": "CNTR_MODE"}
12029 {"bits": [0, 9], "name": "PERFCOUNTER_SELECT2"},
12030 {"bits": [10, 19], "name": "PERFCOUNTER_SELECT3"}
12035 {"bits": [0, 3], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT0"},
12036 {"bits": [4, 7], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT1"},
12037 {"bits": [8, 11], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT2"},
12038 {"bits": [12, 15], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT3"},
12039 {"bits": [16, 19], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT4"},
12040 {"bits": [20, 23], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT5"},
12041 {"bits": [24, 27], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT6"},
12042 {"bits": [28, 31], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT7"}
12047 {"bits": [0, 7], "name": "ADDRESS"}
12052 {"bits": [0, 9], "name": "PERF_SEL2"},
12053 {"bits": [10, 19], "name": "PERF_SEL3"},
12054 {"bits": [24, 27], "name": "PERF_MODE2"},
12055 {"bits": [28, 31], "name": "PERF_MODE3"}
12060 {"bits": [0, 9], "name": "PERF_SEL"},
12061 {"bits": [20, 23], "name": "CNTR_MODE"},
12062 {"bits": [28, 31], "name": "PERF_MODE"}
12067 {"bits": [0, 7], "name": "PERF_SEL"},
12068 {"bits": [10, 17], "name": "PERF_SEL1"},
12069 {"bits": [20, 23], "name": "CNTR_MODE"},
12070 {"bits": [24, 27], "name": "PERF_MODE1"},
12071 {"bits": [28, 31], "name": "PERF_MODE"}
12076 {"bits": [0, 7], "name": "PERF_SEL2"},
12077 {"bits": [10, 17], "name": "PERF_SEL3"},
12078 {"bits": [24, 27], "name": "PERF_MODE3"},
12079 {"bits": [28, 31], "name": "PERF_MODE2"}
12084 {"bits": [0, 7], "name": "BASE_ADDR"}
12089 {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"},
12090 {"bits": [2, 3], "enum_ref": "VGT_DMA_SWAP_MODE", "name": "SWAP_MODE"},
12091 {"bits": [4, 5], "enum_ref": "VGT_DMA_BUF_TYPE", "name": "BUF_TYPE"},
12092 {"bits": [6, 6], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"},
12093 {"bits": [9, 9], "name": "NOT_EOP"},
12094 {"bits": [10, 10], "name": "REQ_PATH"},
12095 {"bits": [11, 12], "name": "MTYPE"}
12100 {"bits": [0, 1], "enum_ref": "VGT_DI_SOURCE_SELECT", "name": "SOURCE_SELECT"},
12101 {"bits": [2, 3], "enum_ref": "VGT_DI_MAJOR_MODE_SELECT", "name": "MAJOR_MODE"},
12102 {"bits": [4, 4], "name": "SPRITE_EN_R6XX"},
12103 {"bits": [5, 5], "name": "NOT_EOP"},
12104 {"bits": [6, 6], "name": "USE_OPAQUE"}
12109 {"bits": [0, 14], "name": "ITEMSIZE"}
12114 {"bits": [0, 10], "name": "ES_PER_GS"}
12119 {"bits": [0, 27], "name": "ADDRESS_LOW"}
12124 {"bits": [0, 5], "enum_ref": "VGT_EVENT_TYPE", "name": "EVENT_TYPE"},
12125 {"bits": [18, 26], "name": "ADDRESS_HI"},
12126 {"bits": [27, 27], "name": "EXTENDED_EVENT"}
12131 {"bits": [0, 3], "name": "DECR"}
12136 {"bits": [0, 3], "name": "FIRST_DECR"}
12141 {"bits": [0, 4], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"},
12142 {"bits": [14, 14], "name": "RETAIN_ORDER"},
12143 {"bits": [15, 15], "name": "RETAIN_QUADS"},
12144 {"bits": [16, 18], "name": "PRIM_ORDER"}
12149 {"bits": [0, 0], "name": "COMP_X_EN"},
12150 {"bits": [1, 1], "name": "COMP_Y_EN"},
12151 {"bits": [2, 2], "name": "COMP_Z_EN"},
12152 {"bits": [3, 3], "name": "COMP_W_EN"},
12153 {"bits": [8, 15], "name": "STRIDE"},
12154 {"bits": [16, 23], "name": "SHIFT"}
12159 {"bits": [0, 3], "name": "X_CONV"},
12160 {"bits": [4, 7], "name": "X_OFFSET"},
12161 {"bits": [8, 11], "name": "Y_CONV"},
12162 {"bits": [12, 15], "name": "Y_OFFSET"},
12163 {"bits": [16, 19], "name": "Z_CONV"},
12164 {"bits": [20, 23], "name": "Z_OFFSET"},
12165 {"bits": [24, 27], "name": "W_CONV"},
12166 {"bits": [28, 31], "name": "W_OFFSET"}
12171 {"bits": [0, 14], "name": "OFFSET"}
12176 {"bits": [0, 0], "name": "ENABLE"},
12177 {"bits": [2, 8], "name": "CNT"}
12182 {"bits": [0, 10], "name": "MAX_VERT_OUT"}
12187 {"bits": [0, 2], "enum_ref": "VGT_GS_MODE_TYPE", "name": "MODE"},
12188 {"bits": [3, 3], "name": "RESERVED_0"},
12189 {"bits": [4, 5], "enum_ref": "VGT_GS_CUT_MODE", "name": "CUT_MODE"},
12190 {"bits": [6, 10], "name": "RESERVED_1"},
12191 {"bits": [11, 11], "name": "GS_C_PACK_EN"},
12192 {"bits": [12, 12], "name": "RESERVED_2"},
12193 {"bits": [13, 13], "name": "ES_PASSTHRU"},
12194 {"bits": [14, 14], "name": "RESERVED_3"},
12195 {"bits": [15, 15], "name": "RESERVED_4"},
12196 {"bits": [16, 16], "name": "RESERVED_5"},
12197 {"bits": [17, 17], "name": "PARTIAL_THD_AT_EOI"},
12198 {"bits": [18, 18], "name": "SUPPRESS_CUTS"},
12199 {"bits": [19, 19], "name": "ES_WRITE_OPTIMIZE"},
12200 {"bits": [20, 20], "name": "GS_WRITE_OPTIMIZE"},
12201 {"bits": [21, 22], "name": "ONCHIP"}
12206 {"bits": [0, 10], "name": "ES_VERTS_PER_SUBGRP"},
12207 {"bits": [11, 21], "name": "GS_PRIMS_PER_SUBGRP"}
12212 {"bits": [0, 5], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE"},
12213 {"bits": [8, 13], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_1"},
12214 {"bits": [16, 21], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_2"},
12215 {"bits": [22, 27], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_3"},
12216 {"bits": [31, 31], "name": "UNIQUE_TYPE_PER_STREAM"}
12221 {"bits": [0, 10], "name": "GS_PER_ES"}
12226 {"bits": [0, 3], "name": "GS_PER_VS"}
12231 {"bits": [0, 1], "name": "TESS_MODE"}
12236 {"bits": [0, 7], "name": "REUSE_DEPTH"}
12241 {"bits": [0, 8], "name": "OFFCHIP_BUFFERING"},
12242 {"bits": [9, 10], "enum_ref": "VGT_HS_OFFCHIP_PARAM__OFFCHIP_GRANULARITY", "name": "OFFCHIP_GRANULARITY"}
12247 {"bits": [0, 7], "name": "NUM_PATCHES"},
12248 {"bits": [8, 13], "name": "HS_NUM_INPUT_CP"},
12249 {"bits": [14, 19], "name": "HS_NUM_OUTPUT_CP"}
12254 {"bits": [0, 0], "name": "RESET_EN"}
12259 {"bits": [0, 2], "name": "PATH_SELECT"}
12264 {"bits": [0, 6], "name": "DEALLOC_DIST"}
12269 {"bits": [0, 7], "name": "PERF_SEL"},
12270 {"bits": [28, 31], "name": "PERF_MODE"}
12275 {"bits": [0, 7], "name": "PERF_SEID_IGNORE_MASK"}
12280 {"bits": [0, 0], "name": "PRIMITIVEID_EN"},
12281 {"bits": [1, 1], "name": "DISABLE_RESET_ON_EOI"}
12286 {"bits": [0, 5], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"}
12291 {"bits": [0, 0], "name": "REUSE_OFF"}
12296 {"bits": [0, 1], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"},
12297 {"bits": [2, 2], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"},
12298 {"bits": [3, 4], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"},
12299 {"bits": [5, 5], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"},
12300 {"bits": [6, 7], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"},
12301 {"bits": [8, 8], "name": "DYNAMIC_HS"},
12302 {"bits": [9, 9], "name": "DISPATCH_DRAW_EN"},
12303 {"bits": [10, 10], "name": "DIS_DEALLOC_ACCUM_0"},
12304 {"bits": [11, 11], "name": "DIS_DEALLOC_ACCUM_1"},
12305 {"bits": [12, 12], "name": "VS_WAVE_ID_EN"}
12310 {"bits": [0, 3], "name": "STREAM_0_BUFFER_EN"},
12311 {"bits": [4, 7], "name": "STREAM_1_BUFFER_EN"},
12312 {"bits": [8, 11], "name": "STREAM_2_BUFFER_EN"},
12313 {"bits": [12, 15], "name": "STREAM_3_BUFFER_EN"}
12318 {"bits": [0, 0], "name": "STREAMOUT_0_EN"},
12319 {"bits": [1, 1], "name": "STREAMOUT_1_EN"},
12320 {"bits": [2, 2], "name": "STREAMOUT_2_EN"},
12321 {"bits": [3, 3], "name": "STREAMOUT_3_EN"},
12322 {"bits": [4, 6], "name": "RAST_STREAM"},
12323 {"bits": [8, 11], "name": "RAST_STREAM_MASK"},
12324 {"bits": [31, 31], "name": "USE_RAST_STREAM_MASK"}
12329 {"bits": [0, 8], "name": "VERTEX_STRIDE"}
12334 {"bits": [0, 9], "name": "STRIDE"}
12339 {"bits": [0, 7], "name": "ACCUM_ISOLINE"},
12340 {"bits": [8, 15], "name": "ACCUM_TRI"},
12341 {"bits": [16, 23], "name": "ACCUM_QUAD"},
12342 {"bits": [24, 31], "name": "DONUT_SPLIT"}
12347 {"bits": [0, 1], "enum_ref": "VGT_TESS_TYPE", "name": "TYPE"},
12348 {"bits": [2, 4], "enum_ref": "VGT_TESS_PARTITION", "name": "PARTITIONING"},
12349 {"bits": [5, 7], "enum_ref": "VGT_TESS_TOPOLOGY", "name": "TOPOLOGY"},
12350 {"bits": [8, 8], "name": "RESERVED_REDUC_AXIS"},
12351 {"bits": [9, 9], "name": "DEPRECATED"},
12352 {"bits": [10, 13], "name": "NUM_DS_WAVES_PER_SIMD"},
12353 {"bits": [14, 14], "name": "DISABLE_DONUTS"},
12354 {"bits": [15, 15], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"},
12355 {"bits": [17, 18], "enum_ref": "VGT_DIST_MODE", "name": "DISTRIBUTION_MODE"},
12356 {"bits": [19, 20], "name": "MTYPE"}
12361 {"bits": [0, 15], "name": "SIZE"}
12366 {"bits": [0, 7], "name": "VTX_REUSE_DEPTH"}
12371 {"bits": [0, 0], "name": "VTX_CNT_EN"}