Cross Reference: /xsrc/external/mit/MesaLib/dist/src/intel/isl/isl.c

Lines Matching defs:tile_info
332  * @param[out] tile_info   Return parameter for the tiling information
340                     struct isl_tile_info *tile_info)
356                           tile_info);
528    *tile_info = (struct isl_tile_info) {
1092       const struct isl_tile_info *tile_info,
1177        tile_info->tiling != ISL_TILING_LINEAR) {
1183       pitch_el_rows = isl_align(pitch_el_rows, tile_info->logical_extent_el.height);
1266       const struct isl_tile_info *tile_info,
1281       isl_calc_array_pitch_el_rows_gfx4_2d(dev, info, tile_info,
1286    if (tile_info->tiling == ISL_TILING_64) {
1378       const struct isl_tile_info *tile_info,
1387       .w = tile_info->logical_extent_el.w * fmtl->bw,
1388       .h = tile_info->logical_extent_el.h * fmtl->bh,
1479                               const struct isl_tile_info *tile_info,
1497       isl_calc_phys_total_extent_el_gfx4_2d(dev, info, tile_info, msaa_layout,
1505       isl_calc_phys_total_extent_el_gfx6_stencil_hiz(dev, info, tile_info,
1526                              const struct isl_tile_info *tile_info)
1528    if (tile_info->tiling != ISL_TILING_LINEAR) {
1541           tile_info->tiling != ISL_TILING_X &&
1544          return isl_align(tile_info->phys_extent_B.width, 512);
1547       return tile_info->phys_extent_B.width;
1617                              const struct isl_tile_info *tile_info,
1623    assert(fmtl->bpb % tile_info->format_bpb == 0);
1625    const uint32_t tile_el_scale = fmtl->bpb / tile_info->format_bpb;
1628                     tile_info->logical_extent_el.width);
1634    assert(alignment_B >= tile_info->phys_extent_B.width);
1635    return isl_align(total_w_tl * tile_info->phys_extent_B.width, alignment_B);
1641                        const struct isl_tile_info *tile_info,
1645    if (tile_info->tiling == ISL_TILING_LINEAR) {
1649       return isl_calc_tiled_min_row_pitch(dev, surf_info, tile_info,
1673                    const struct isl_tile_info *tile_info,
1679       isl_calc_row_pitch_alignment(dev, surf_info, tile_info);
1682       isl_calc_min_row_pitch(dev, surf_info, tile_info, phys_total_el,
1696    const uint32_t row_pitch_tl = row_pitch_B / tile_info->phys_extent_B.width;
1763    struct isl_tile_info tile_info;
1765                        info->samples, &tile_info);
1783    isl_calc_phys_total_extent_el(dev, info, &tile_info,
1790    if (!isl_calc_row_pitch(dev, info, &tile_info, dim_layout,
1830       assert(row_pitch_B % tile_info.phys_extent_B.width == 0);
1836                                               tile_info.logical_extent_el.h);
1838                                       tile_info.logical_extent_el.d);
1842                                               tile_info.logical_extent_el.h);
1844                                       tile_info.logical_extent_el.a);
1853          isl_align_div(phys_total_el.h, tile_info.logical_extent_el.height);
1855       size_B = (uint64_t) total_h_tl * tile_info.phys_extent_B.height * row_pitch_B;
1857       const uint32_t tile_size_B = tile_info.phys_extent_B.width *
1858                                    tile_info.phys_extent_B.height;
1939                        struct isl_tile_info *tile_info)
1943                        surf->samples, tile_info);
2601    struct isl_tile_info tile_info;
2602    isl_surf_get_tile_info(surf, &tile_info);
2604       .w = tile_info.logical_extent_el.w * fmtl->bw,
2605       .h = tile_info.logical_extent_el.h * fmtl->bh,
3110    struct isl_tile_info tile_info;
3111    isl_tiling_get_info(tiling, dim, msaa_layout, bpb, samples, &tile_info);
3114    assert(row_pitch_B % tile_info.phys_extent_B.width == 0);
3115    if (tile_info.logical_extent_el.d > 1 || tile_info.logical_extent_el.a > 1)
3116       assert(array_pitch_el_rows % tile_info.logical_extent_el.h == 0);
3123     * integer number of tile_info.format_bpb size elements.  To scale the
3127    const uint32_t tile_el_scale = bpb / tile_info.format_bpb;
3128    tile_info.phys_extent_B.width *= tile_el_scale;
3131    *x_offset_el = total_x_offset_el % tile_info.logical_extent_el.w;
3132    *y_offset_el = total_y_offset_el % tile_info.logical_extent_el.h;
3133    *z_offset_el = total_z_offset_el % tile_info.logical_extent_el.d;
3134    *array_offset = total_array_offset % tile_info.logical_extent_el.a;
3137    uint32_t x_offset_tl = total_x_offset_el / tile_info.logical_extent_el.w;
3138    uint32_t y_offset_tl = total_y_offset_el / tile_info.logical_extent_el.h;
3139    uint32_t z_offset_tl = total_z_offset_el / tile_info.logical_extent_el.d;
3140    uint32_t a_offset_tl = total_array_offset / tile_info.logical_extent_el.a;
3144       array_pitch_el_rows / tile_info.logical_extent_el.h;
3150       (uint64_t)y_offset_tl * tile_info.phys_extent_B.h * row_pitch_B +
3151       (uint64_t)x_offset_tl * tile_info.phys_extent_B.h * tile_info.phys_extent_B.w;