Lines Matching defs:ULONG
45 #ifndef ULONG
46 typedef unsigned long ULONG;
363 ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Div and ref_div
372 ULONG ulClock; //When return, [23:0] return real clock
397 ULONG ulComputeClockFlag:8; // =1: COMPUTE_MEMORY_PLL_PARAM, =2: COMPUTE_ENGINE_PLL_PARAM
398 ULONG ulClockFreq:24; // in unit of 10kHz
400 ULONG ulClockFreq:24; // in unit of 10kHz
401 ULONG ulComputeClockFlag:8; // =1: COMPUTE_MEMORY_PLL_PARAM, =2: COMPUTE_ENGINE_PLL_PARAM
435 ULONG ucPostDiv; //return parameter: post divider which is used to program to register directly
436 ULONG ulClock:24; //Input= target clock, output = actual clock
438 ULONG ulClock:24; //Input= target clock, output = actual clock
439 ULONG ucPostDiv; //return parameter: post divider which is used to program to register directly
446 ULONG ulReserved[2];
452 ULONG ulMemoryClock;
453 ULONG ulReserved;
461 ULONG ulTargetEngineClock; //In 10Khz unit
466 ULONG ulTargetEngineClock; //In 10Khz unit
475 ULONG ulTargetMemoryClock; //In 10Khz unit
480 ULONG ulTargetMemoryClock; //In 10Khz unit
489 ULONG ulDefaultEngineClock; //In 10Khz unit
490 ULONG ulDefaultMemoryClock; //In 10Khz unit
535 ULONG Reserved[2];// Don't set this one, allocation for EXT DAC
1193 ULONG ulFbDivDecFrac; // 20 bit feedback divider decimal fraction part, range from 1~999999 ( 0.000001 to 0.999999 )
1265 ULONG ulDispPllFreq; // return display PPLL freq which is used to generate the pixclock, and related idclk, symclk etc
1296 ULONG ulReturnMemoryClock; // current memory speed in 10KHz unit
1305 ULONG ulReturnEngineClock; // current engine speed in 10KHz unit
1458 ULONG ulTargetMemoryClock; //In 10Khz unit
1751 ULONG ulSignature; // HW info table signature string "$ATI"
1764 ULONG ulSignature; // MM info table signature sting "$MMT"
1853 ULONG ulFirmwareRevision;
1854 ULONG ulDefaultEngineClock; //In 10Khz unit
1855 ULONG ulDefaultMemoryClock; //In 10Khz unit
1856 ULONG ulDriverTargetEngineClock; //In 10Khz unit
1857 ULONG ulDriverTargetMemoryClock; //In 10Khz unit
1858 ULONG ulMaxEngineClockPLL_Output; //In 10Khz unit
1859 ULONG ulMaxMemoryClockPLL_Output; //In 10Khz unit
1860 ULONG ulMaxPixelClockPLL_Output; //In 10Khz unit
1861 ULONG ulASICMaxEngineClock; //In 10Khz unit
1862 ULONG ulASICMaxMemoryClock; //In 10Khz unit
1865 ULONG aulReservedForBIOS[3]; //Don't use them
1887 ULONG ulFirmwareRevision;
1888 ULONG ulDefaultEngineClock; //In 10Khz unit
1889 ULONG ulDefaultMemoryClock; //In 10Khz unit
1890 ULONG ulDriverTargetEngineClock; //In 10Khz unit
1891 ULONG ulDriverTargetMemoryClock; //In 10Khz unit
1892 ULONG ulMaxEngineClockPLL_Output; //In 10Khz unit
1893 ULONG ulMaxMemoryClockPLL_Output; //In 10Khz unit
1894 ULONG ulMaxPixelClockPLL_Output; //In 10Khz unit
1895 ULONG ulASICMaxEngineClock; //In 10Khz unit
1896 ULONG ulASICMaxMemoryClock; //In 10Khz unit
1900 ULONG aulReservedForBIOS[2]; //Don't use them
1901 ULONG ulMinPixelClockPLL_Output; //In 10Khz unit
1923 ULONG ulFirmwareRevision;
1924 ULONG ulDefaultEngineClock; //In 10Khz unit
1925 ULONG ulDefaultMemoryClock; //In 10Khz unit
1926 ULONG ulDriverTargetEngineClock; //In 10Khz unit
1927 ULONG ulDriverTargetMemoryClock; //In 10Khz unit
1928 ULONG ulMaxEngineClockPLL_Output; //In 10Khz unit
1929 ULONG ulMaxMemoryClockPLL_Output; //In 10Khz unit
1930 ULONG ulMaxPixelClockPLL_Output; //In 10Khz unit
1931 ULONG ulASICMaxEngineClock; //In 10Khz unit
1932 ULONG ulASICMaxMemoryClock; //In 10Khz unit
1936 ULONG aulReservedForBIOS; //Don't use them
1937 ULONG ul3DAccelerationEngineClock;//In 10Khz unit
1938 ULONG ulMinPixelClockPLL_Output; //In 10Khz unit
1960 ULONG ulFirmwareRevision;
1961 ULONG ulDefaultEngineClock; //In 10Khz unit
1962 ULONG ulDefaultMemoryClock; //In 10Khz unit
1963 ULONG ulDriverTargetEngineClock; //In 10Khz unit
1964 ULONG ulDriverTargetMemoryClock; //In 10Khz unit
1965 ULONG ulMaxEngineClockPLL_Output; //In 10Khz unit
1966 ULONG ulMaxMemoryClockPLL_Output; //In 10Khz unit
1967 ULONG ulMaxPixelClockPLL_Output; //In 10Khz unit
1968 ULONG ulASICMaxEngineClock; //In 10Khz unit
1969 ULONG ulASICMaxMemoryClock; //In 10Khz unit
1975 ULONG ul3DAccelerationEngineClock;//In 10Khz unit
1976 ULONG ulMinPixelClockPLL_Output; //In 10Khz unit
1999 ULONG ulFirmwareRevision;
2000 ULONG ulDefaultEngineClock; //In 10Khz unit
2001 ULONG ulDefaultMemoryClock; //In 10Khz unit
2002 ULONG ulReserved1;
2003 ULONG ulReserved2;
2004 ULONG ulMaxEngineClockPLL_Output; //In 10Khz unit
2005 ULONG ulMaxMemoryClockPLL_Output; //In 10Khz unit
2006 ULONG ulMaxPixelClockPLL_Output; //In 10Khz unit
2007 ULONG ulBinaryAlteredInfo; //Was ulASICMaxEngineClock
2008 ULONG ulDefaultDispEngineClkFreq; //In 10Khz unit
2014 ULONG ulReserved4; //Was ulAsicMaximumVoltage
2015 ULONG ulMinPixelClockPLL_Output; //In 10Khz unit
2048 ULONG ulBootUpEngineClock; //in 10kHz unit
2049 ULONG ulBootUpMemoryClock; //in 10kHz unit
2050 ULONG ulMaxSystemMemoryClock; //in 10kHz unit
2051 ULONG ulMinSystemMemoryClock; //in 10kHz unit
2057 ULONG ulReserved[2];
2120 ULONG ulBootUpEngineClock; //in 10kHz unit
2121 ULONG ulReserved1[2]; //must be 0x0 for the reserved
2122 ULONG ulBootUpUMAClock; //in 10kHz unit
2123 ULONG ulBootUpSidePortClock; //in 10kHz unit
2124 ULONG ulMinSidePortClock; //in 10kHz unit
2125 ULONG ulReserved2[6]; //must be 0x0 for the reserved
2126 ULONG ulSystemConfig; //see explanation below
2127 ULONG ulBootUpReqDisplayVector;
2128 ULONG ulOtherDisplayMisc;
2129 ULONG ulDDISlot1Config;
2130 ULONG ulDDISlot2Config;
2135 ULONG ulDockingPinCFGInfo;
2136 ULONG ulCPUCapInfo;
2141 ULONG ulHTLinkFreq; //in 10Khz
2148 ULONG ulHighVoltageHTLinkFreq; // in 10Khz
2149 ULONG ulLowVoltageHTLinkFreq; // in 10Khz
2156 ULONG ulReserved3[96]; //must be 0x0
2284 ULONG ulBootUpEngineClock; //in 10kHz unit
2285 ULONG ulDentistVCOFreq; //Dentist VCO clock in 10kHz unit, the source of GPU SCLK, LCLK, UCLK and VCLK.
2286 ULONG ulLClockFreq; //GPU Lclk freq in 10kHz unit, have relationship with NCLK in NorthBridge
2287 ULONG ulBootUpUMAClock; //in 10kHz unit
2288 ULONG ulReserved1[8]; //must be 0x0 for the reserved
2289 ULONG ulBootUpReqDisplayVector;
2290 ULONG ulOtherDisplayMisc;
2291 ULONG ulReserved2[4]; //must be 0x0 for the reserved
2292 ULONG ulSystemConfig; //TBD
2293 ULONG ulCPUCapInfo; //TBD
2299 ULONG ulReserved3[4]; //must be 0x0 for the reserved
2300 ULONG ulDDISlot1Config; //see above ulDDISlot1Config definition
2301 ULONG ulDDISlot2Config;
2302 ULONG ulDDISlot3Config;
2303 ULONG ulDDISlot4Config;
2304 ULONG ulReserved4[4]; //must be 0x0 for the reserved
2308 ULONG ulReserved5[4]; //must be 0x0 for the reserved
2309 ULONG ulCSR_M3_ARB_CNTL_DEFAULT[10];//arrays with values for CSR M3 arbiter for default
2310 ULONG ulCSR_M3_ARB_CNTL_UVD[10]; //arrays with values for CSR M3 arbiter for UVD playback
2311 ULONG ulCSR_M3_ARB_CNTL_FS3D[10];//arrays with values for CSR M3 arbiter for Full Screen 3D applications
2312 ULONG ulReserved6[61]; //must be 0x0
3041 ULONG ulStartAddrUsedByFirmware;
3055 ULONG ulStartAddrUsedByFirmware;
3343 ULONG ulACPIDeviceEnum; //Reserved for now
3440 ULONG ulStrengthControl; // DVOA strength control for CF
3676 ULONG ulBootUpEngineClock;
3677 ULONG ulDentistVCOFreq;
3678 ULONG ulBootUpUMAClock;
3679 ULONG ulReserved1[8];
3680 ULONG ulBootUpReqDisplayVector;
3681 ULONG ulOtherDisplayMisc;
3682 ULONG ulGPUCapInfo;
3683 ULONG ulReserved2[3];
3684 ULONG ulSystemConfig;
3685 ULONG ulCPUCapInfo;
3694 ULONG ulCSR_M3_ARB_CNTL_DEFAULT[10];
3695 ULONG ulCSR_M3_ARB_CNTL_UVD[10];
3696 ULONG ulCSR_M3_ARB_CNTL_FS3D[10];
3697 ULONG ulReserved3[42];
3775 ULONG ulTargetClockRange; //Clock Out frequence (VCO ), in unit of 10Khz
3796 ULONG ulTargetClockRange; //For mem/engine/uvd, Clock Out frequence (VCO ), in unit of 10Khz
3827 ULONG ulTargetClockRange; //For mem/engine/uvd, Clock Out frequence (VCO ), in unit of 10Khz
4294 ULONG ulTargetMemoryClock; //In 10Khz unit
4332 ULONG usHWIconHorzVertPosn; // Hardware Icon Vertical position
4480 ULONG ulDllResetClkRange;
4486 ULONG ucMemBlkId:8;
4487 ULONG ulMemClockRange:24;
4489 ULONG ulMemClockRange:24;
4490 ULONG ucMemBlkId:8;
4497 ULONG ulAccess;
4503 ULONG aulMemData[1];
4525 #define VALUE_DWORD SIZEOF ULONG
4541 ULONG ulARB_SEQDataBuf[32];
4582 ULONG ulSignature;
4600 ULONG ulReserved;
4622 ULONG ulReserved;
4623 ULONG ulFlags; // To enable/disable functionalities based on memory type
4624 ULONG ulEngineClock; // Override of default engine clock for particular memory type
4625 ULONG ulMemoryClock; // Override of default memory clock for particular memory type
4650 ULONG ulClkRange; // memory clock in 10kHz unit, when target memory clock is below this clock, use this memory timing
4686 ULONG ulClkRange; // memory clock in 10kHz unit, when target memory clock is below this clock, use this memory timing
4719 ULONG ulClkRange; // memory clock in 10kHz unit, when target memory clock is below this clock, use this memory timing
4755 ULONG ulDllDisClock; // memory DLL will be disable when target memory clock is below this clock
4782 ULONG ulChannelMapCfg; // board dependent paramenter:Channel combination
4804 ULONG ulChannelMapCfg; // board dependent parameter: Channel combination
4846 ULONG ulChannelMapCfg; // board dependent parameter: Channel combination
4877 ULONG ulChannelMapCfg; // board dependent parameter: Channel combination
4937 ULONG ulMemDQ7_0BitRemap; // each DQ line ( 7~0) use 3bits, like: DQ0=Bit[2:0], DQ1:[5:3], ... DQ7:[23:21]
5016 ULONG Ptr32_Bit;
5061 ULONG RsvdOffScrnMemSize;
5062 ULONG RsvdOffScrnMEmPtr;
5076 ULONG WinFuncPtr; // dd ? ; real mode pointer to window function
5104 ULONG PhysBasePtr; // dd ? ; physical address for flat memory frame buffer
5105 ULONG Reserved_1; // dd 0 ; reserved - always set to 0
5120 ULONG MaxPixelClock; // dd ? ; maximum pixel clock(in Hz) for graphics mode
5623 ULONG ulMiscInfo; //The power level should be arranged in ascending order
5624 ULONG ulReserved1; // must set to 0
5625 ULONG ulReserved2; // must set to 0
5639 ULONG ulMiscInfo; //The power level should be arranged in ascending order
5640 ULONG ulMiscInfo2;
5641 ULONG ulEngineClock;
5642 ULONG ulMemoryClock;
5654 ULONG ulMiscInfo; //The power level should be arranged in ascending order
5655 ULONG ulMiscInfo2;
5656 ULONG ulEngineClock;
5657 ULONG ulMemoryClock;
5770 ULONG ulMaxEngineClock; // For Overdrive.
5771 ULONG ulMaxMemoryClock; // For Overdrive.
5820 ULONG ulPlatformCaps; // See ATOM_PPLIB_CAPS_*
5907 ULONG ulCapsAndSettings;
5930 ULONG ulFlags; // ATOM_PPLIB_R600_FLAGS_*
5954 ULONG ulFlags; // ATOM_PPLIB_R600_FLAGS_*
5972 ULONG ulFlags;