Lines Matching defs:ps_conf
175 shader_config_t vs_conf, ps_conf;
214 CLEAR (ps_conf);
233 ps_conf.shader_addr = accel_state->ps_mc_addr;
234 ps_conf.shader_size = accel_state->ps_size;
235 ps_conf.num_gprs = 1;
236 ps_conf.stack_size = 0;
237 ps_conf.uncached_first_inst = 1;
238 ps_conf.clamp_consts = 0;
239 ps_conf.export_mode = 2;
240 ps_conf.bo = accel_state->shaders_bo;
241 r600_ps_setup(pScrn, accel_state->ib, &ps_conf, RADEON_GEM_DOMAIN_VRAM);
384 shader_config_t vs_conf, ps_conf;
390 CLEAR (ps_conf);
409 ps_conf.shader_addr = accel_state->ps_mc_addr;
410 ps_conf.shader_size = accel_state->ps_size;
411 ps_conf.num_gprs = 1;
412 ps_conf.stack_size = 0;
413 ps_conf.uncached_first_inst = 1;
414 ps_conf.clamp_consts = 0;
415 ps_conf.export_mode = 2;
416 ps_conf.bo = accel_state->shaders_bo;
417 r600_ps_setup(pScrn, accel_state->ib, &ps_conf, RADEON_GEM_DOMAIN_VRAM);
1281 shader_config_t vs_conf, ps_conf;
1391 CLEAR (ps_conf);
1435 ps_conf.shader_addr = accel_state->ps_mc_addr;
1436 ps_conf.shader_size = accel_state->ps_size;
1437 ps_conf.num_gprs = 3;
1438 ps_conf.stack_size = 1;
1439 ps_conf.uncached_first_inst = 1;
1440 ps_conf.clamp_consts = 0;
1441 ps_conf.export_mode = 2;
1442 ps_conf.bo = accel_state->shaders_bo;
1443 r600_ps_setup(pScrn, accel_state->ib, &ps_conf, RADEON_GEM_DOMAIN_VRAM);