Lines Matching defs:native_mode
140 radeon_native_mode_ptr native_mode = &radeon_output->native_mode;
144 if (native_mode->PanelXRes != 0 &&
145 native_mode->PanelYRes != 0 &&
146 native_mode->DotClock != 0) {
149 sprintf(stmp, "%dx%d", native_mode->PanelXRes, native_mode->PanelYRes);
156 new->HDisplay = native_mode->PanelXRes;
157 new->VDisplay = native_mode->PanelYRes;
159 new->HTotal = new->HDisplay + native_mode->HBlank;
160 new->HSyncStart = new->HDisplay + native_mode->HOverPlus;
161 new->HSyncEnd = new->HSyncStart + native_mode->HSyncWidth;
162 new->VTotal = new->VDisplay + native_mode->VBlank;
163 new->VSyncStart = new->VDisplay + native_mode->VOverPlus;
164 new->VSyncEnd = new->VSyncStart + native_mode->VSyncWidth;
166 new->Clock = native_mode->DotClock;
167 new->Flags = native_mode->Flags;
177 native_mode->PanelXRes, native_mode->PanelYRes);
178 } else if (native_mode->PanelXRes != 0 &&
179 native_mode->PanelYRes != 0) {
181 new = xf86CVTMode(native_mode->PanelXRes, native_mode->PanelYRes, 60.0, TRUE, FALSE);
192 native_mode->PanelXRes, native_mode->PanelYRes);
262 radeon_native_mode_ptr native_mode = &radeon_output->native_mode;
281 if (width == native_mode->PanelXRes && height == native_mode->PanelYRes)
289 if (width < 320 || width > native_mode->PanelXRes ||
290 height < 200 || height > native_mode->PanelYRes) {
295 native_mode->PanelXRes, native_mode->PanelYRes);
339 radeon_native_mode_ptr native_mode = &radeon_output->native_mode;
350 radeon_output->native_mode = lvds->native_mode;
355 if ((info->UseBiosDividers && native_mode->DotClock != 0) || (ddc == NULL))
370 if (native_mode->DotClock == 0 &&
371 native_mode->PanelXRes == d_timings->h_active &&
372 native_mode->PanelYRes == d_timings->v_active)
378 if (native_mode->PanelXRes < d_timings->h_active &&
379 native_mode->PanelYRes < d_timings->v_active &&
384 native_mode->PanelXRes = d_timings->h_active;
385 native_mode->PanelYRes = d_timings->v_active;
386 native_mode->DotClock = d_timings->clock / 1000;
387 native_mode->HOverPlus = d_timings->h_sync_off;
388 native_mode->HSyncWidth = d_timings->h_sync_width;
389 native_mode->HBlank = d_timings->h_blanking;
390 native_mode->VOverPlus = d_timings->v_sync_off;
391 native_mode->VSyncWidth = d_timings->v_sync_width;
392 native_mode->VBlank = d_timings->v_blanking;
393 native_mode->Flags = (d_timings->interlaced ? V_INTERLACE : 0);
395 case 0: native_mode->Flags |= V_NHSYNC | V_NVSYNC; break;
396 case 1: native_mode->Flags |= V_PHSYNC | V_NVSYNC; break;
397 case 2: native_mode->Flags |= V_NHSYNC | V_PVSYNC; break;
398 case 3: native_mode->Flags |= V_PHSYNC | V_PVSYNC; break;
401 native_mode->PanelXRes, native_mode->PanelYRes);
406 if (info->UseBiosDividers && native_mode->DotClock != 0)
411 if ((native_mode->PanelXRes < ddc->timings2[j].hsize) &&
412 (native_mode->PanelYRes < ddc->timings2[j].vsize)) {
421 native_mode->PanelXRes = ddc->timings2[j].hsize;
422 native_mode->PanelYRes = ddc->timings2[j].vsize;
423 native_mode->HBlank = p->HTotal - p->HDisplay;
424 native_mode->HOverPlus = p->HSyncStart - p->HDisplay;
425 native_mode->HSyncWidth = p->HSyncEnd - p->HSyncStart;
426 native_mode->VBlank = p->VTotal - p->VDisplay;
427 native_mode->VOverPlus = p->VSyncStart - p->VDisplay;
428 native_mode->VSyncWidth = p->VSyncEnd - p->VSyncStart;
429 native_mode->DotClock = p->Clock;
430 native_mode->Flags = p->Flags;
432 native_mode->PanelXRes, native_mode->PanelYRes);
444 radeon_native_mode_ptr native_mode = &radeon_output->native_mode;
456 if (widths[i] == native_mode->PanelXRes && heights[i] == native_mode->PanelYRes)
464 if (widths[i] < 320 || widths[i] > native_mode->PanelXRes ||
465 heights[i] < 200 || heights[i] > native_mode->PanelYRes)