Cross Reference: /xsrc/external/mit/xf86-video-ati/dist/src/radeon

Lines Matching defs:constPtr
629     const TVModeConstants *constPtr;
636 	    constPtr = &availableTVModes[0];
638 	    constPtr = &availableTVModes[2];
641 	    constPtr = &availableTVModes[1];
643 	    constPtr = &availableTVModes[3];
646     hTotal = constPtr->horTotal;
647     vTotal = constPtr->verTotal;
683     hOffset = (hOffset * (int)(constPtr->pixToTV)) / 1000;
686     restart = constPtr->defRestart;
703 	   constPtr->defRestart , tvout->hPos , tvout->vPos , p1 , p2 , restart);
719 	hInc = (uint16_t)((int)(constPtr->horResolution * 4096 * NTSC_TV_CLOCK_T) /
722 	hInc = (uint16_t)((int)(constPtr->horResolution * 4096 * PAL_TV_CLOCK_T) /
746     const TVModeConstants *constPtr;
765 	    constPtr = &availableTVModes[0];
767 	    constPtr = &availableTVModes[2];
770 	    constPtr = &availableTVModes[1];
772 	    constPtr = &availableTVModes[3];
780     save->tv_hdisp = constPtr->horResolution - 1;
781     save->tv_hstart = constPtr->horStart;
782     save->tv_htotal = constPtr->horTotal - 1;
848     save->tv_sync_size = constPtr->horResolution + 8;
854 	vert_space = constPtr->verTotal * 2 * 10000 / NTSC_TV_LINES_PER_FRAME;
856 	vert_space = constPtr->verTotal * 2 * 10000 / PAL_TV_LINES_PER_FRAME;
865     if (constPtr->horResolution == 1024)
875 	    (float) constPtr->verTotal * 2.0 / NTSC_TV_LINES_PER_FRAME + 0.5;
878 	    (float) constPtr->verTotal * 2.0 / PAL_TV_LINES_PER_FRAME + 0.5;
978     save->tv_vdisp = constPtr->verResolution - 1;
988     save->tv_vtotal = constPtr->verTotal - 1;
1079     const TVModeConstants *constPtr;
1090 	    constPtr = &availableTVModes[0];
1092 	    constPtr = &availableTVModes[2];
1095 	    constPtr = &availableTVModes[1];
1097 	    constPtr = &availableTVModes[3];
1100     save->crtc_h_total_disp = (((constPtr->horResolution / 8) - 1) << RADEON_CRTC_H_DISP_SHIFT) |
1101 	(((constPtr->horTotal / 8) - 1) << RADEON_CRTC_H_TOTAL_SHIFT);
1105 	(((constPtr->horSyncStart / 8) - 1) << RADEON_CRTC_H_SYNC_STRT_CHAR_SHIFT) |
1106 	(constPtr->horSyncStart & 7);
1108     save->crtc_v_total_disp = ((constPtr->verResolution - 1) << RADEON_CRTC_V_DISP_SHIFT) |
1109 	((constPtr->verTotal - 1) << RADEON_CRTC_V_TOTAL_SHIFT);
1112 	((constPtr->verSyncStart - 1) << RADEON_CRTC_V_SYNC_STRT_SHIFT);
1120     const TVModeConstants *constPtr;
1131 	    constPtr = &availableTVModes[0];
1133 	    constPtr = &availableTVModes[2];
1136 	    constPtr = &availableTVModes[1];
1138 	    constPtr = &availableTVModes[3];
1141     save->htotal_cntl = (constPtr->horTotal & 0x7 /*0xf*/) | RADEON_HTOT_CNTL_VGA_EN;
1143     save->ppll_ref_div = constPtr->crtcPLL_M;
1145     switch (constPtr->crtcPLL_postDiv) {
1173     save->ppll_div_3 = (constPtr->crtcPLL_N & 0x7ff) | (postDiv << 16);
1183     const TVModeConstants *constPtr;
1194 	    constPtr = &availableTVModes[0];
1196 	    constPtr = &availableTVModes[2];
1199 	    constPtr = &availableTVModes[1];
1201 	    constPtr = &availableTVModes[3];
1204     save->crtc2_h_total_disp = (((constPtr->horResolution / 8) - 1) << RADEON_CRTC_H_DISP_SHIFT) |
1205 	(((constPtr->horTotal / 8) - 1) << RADEON_CRTC_H_TOTAL_SHIFT);
1209 	(((constPtr->horSyncStart / 8) - 1) << RADEON_CRTC_H_SYNC_STRT_CHAR_SHIFT) |
1210 	(constPtr->horSyncStart & 7);
1212     save->crtc2_v_total_disp = ((constPtr->verResolution - 1) << RADEON_CRTC_V_DISP_SHIFT) |
1213 	((constPtr->verTotal - 1) << RADEON_CRTC_V_TOTAL_SHIFT);
1216 	((constPtr->verSyncStart - 1) << RADEON_CRTC_V_SYNC_STRT_SHIFT);
1224     const TVModeConstants *constPtr;
1235 	    constPtr = &availableTVModes[0];
1237 	    constPtr = &availableTVModes[2];
1240 	    constPtr = &availableTVModes[1];
1242 	    constPtr = &availableTVModes[3];
1245     save->htotal_cntl2 = (constPtr->horTotal & 0x7); /* 0xf */
1247     save->p2pll_ref_div = constPtr->crtcPLL_M;
1249     switch (constPtr->crtcPLL_postDiv) {
1277     save->p2pll_div_0 = (constPtr->crtcPLL_N & 0x7ff) | (postDiv << 16);