Cross Reference: /xsrc/external/mit/xf86-video-geode/dist/src/gfx/disp

Lines Matching refs:READ_REG32
57         READ_REG32(DC_UNLOCK);
102                 READ_REG32(DC_UNLOCK);
109             READ_REG32(DC_UNLOCK);
196     unlock = READ_REG32(DC_UNLOCK);
200     gcfg = READ_REG32(DC_GENERAL_CFG);
201     tcfg = READ_REG32(DC_TIMING_CFG);
235     lock = READ_REG32(DC_UNLOCK);
236     ocfg = READ_REG32(DC_OUTPUT_CFG) & ~(DC_OCFG_8BPP | DC_OCFG_555);
290     unlock = READ_REG32(DC_UNLOCK);
294     gcfg = READ_REG32(DC_GENERAL_CFG);
295     tcfg = READ_REG32(DC_TIMING_CFG);
496             tcfg = READ_REG32(DC_TIMING_CFG);
706     unlock = READ_REG32(DC_UNLOCK);
710     tcfg = READ_REG32(DC_TIMING_CFG);
711     timing1 = READ_REG32(DC_V_TIMING_1);
712     timing2 = READ_REG32(DC_V_TIMING_2);
745     unsigned long lock = READ_REG32(DC_UNLOCK);
747     value = READ_REG32(DC_LINE_DELTA) & 0xFFFFF000;
788     lock = READ_REG32(DC_UNLOCK);
899     unlock = READ_REG32(DC_UNLOCK);
900     gcfg = READ_REG32(DC_GENERAL_CFG);
1015     unlock = READ_REG32(DC_UNLOCK);
1070     offset = READ_REG32(DC_FB_ST_OFFSET) & 0x003FFFFF;
1090     unlock = READ_REG32(DC_UNLOCK);
1091     gcfg = READ_REG32(DC_GENERAL_CFG);
1114     unlock = READ_REG32(DC_UNLOCK);
1115     gcfg = READ_REG32(DC_GENERAL_CFG);
1169     lock = READ_REG32(DC_UNLOCK);
1193     lock = READ_REG32(DC_UNLOCK);
1194     line_delta = READ_REG32(DC_LINE_DELTA) & 0xFF800FFF;
1227     lock = READ_REG32(DC_UNLOCK);
1228     buf_size = READ_REG32(DC_BUF_SIZE) & 0xFFFF01FF;
1252     lock = READ_REG32(DC_UNLOCK);
1253     gcfg = READ_REG32(DC_GENERAL_CFG);
1254     buf_size = READ_REG32(DC_BUF_SIZE);
1303     lock = READ_REG32(DC_UNLOCK);
1305     value = READ_REG32(DC_BUF_SIZE) & 0x0000FFFF;
1328     lock = READ_REG32(DC_UNLOCK);
1354     lock = READ_REG32(DC_UNLOCK);
1355     control = READ_REG32(MC_MEM_CNTRL1);
1378     if (READ_REG32(DC_TIMING_CFG) & DC_TCFG_TGEN)
1396     if (READ_REG32(DC_TIMING_CFG) & DC_TCFG_VNA)
1596         value = (READ_REG32(DC_LINE_DELTA) & 0x07FF) << 2;
1599         value = (READ_REG32(DC_LINE_DELTA) & 0x03FF) << 2;
1674     return ((READ_REG32(DC_BUF_SIZE) & 0x1FF) << 3);
2008     return ((unsigned short) ((READ_REG32(DC_H_TIMING_1) & 0x07F8) + 8));
2023     return ((unsigned short) ((READ_REG32(DC_H_TIMING_3) & 0x07F8) + 8));
2038     return ((unsigned short) (((READ_REG32(DC_H_TIMING_3) >> 16) & 0x07F8) +
2054     return ((unsigned short) (((READ_REG32(DC_H_TIMING_1) >> 16) & 0x07F8) +
2070     return ((unsigned short) ((READ_REG32(DC_V_TIMING_1) & 0x07FF) + 1));
2085     return ((unsigned short) (((READ_REG32(DC_V_TIMING_3) >> 16) & 0x07FF) +
2101     return ((unsigned short) (((READ_REG32(DC_V_TIMING_1) >> 16) & 0x07FF) +
2119     switch (READ_REG32(DC_OUTPUT_CFG) & 3) {
2144         current_scan_line = (unsigned short) READ_REG32(DC_V_LINE_CNT) & 0x07FF;
2146              (unsigned short) (READ_REG32(DC_V_LINE_CNT) & 0x07FF));
2163     return (READ_REG32(DC_FB_ST_OFFSET) & 0x003FFFFF);
2178     return (READ_REG32(DC_CURS_ST_OFFSET) & 0x003FFFFF);
2199     return ((unsigned short) ((READ_REG32(DC_H_TIMING_2) & 0x07F8) + 8));
2214     return ((unsigned short) (((READ_REG32(DC_H_TIMING_2) >> 16) & 0x07F8) +
2230     return ((unsigned short) ((READ_REG32(DC_V_TIMING_2) & 0x07FF) + 1));
2245     return ((unsigned short) ((READ_REG32(DC_V_TIMING_3) & 0x07FF) + 1));
2260     return ((unsigned short) (((READ_REG32(DC_V_TIMING_2) >> 16) & 0x07FF) +
2282     data = READ_REG32(DC_PAL_DATA);
2306         data = READ_REG32(DC_PAL_DATA);
2325     return (READ_REG32(DC_GENERAL_CFG) & DC_GCFG_CURE);
2340     return ((READ_REG32(DC_CURSOR_X) & 0x07FF) |
2341             ((READ_REG32(DC_CURSOR_Y) << 16) & 0x03FF0000));
2356     return (((READ_REG32(DC_CURSOR_X) >> 11) & 0x01F) |
2357             ((READ_REG32(DC_CURSOR_Y) << 5) & 0x1F0000));
2380     data = READ_REG32(DC_PAL_DATA);
2400     gcfg = READ_REG32(DC_GENERAL_CFG);
2421     offset = READ_REG32(DC_CB_ST_OFFSET) & 0x003FFFFF;
2439     pitch = (unsigned short) (READ_REG32(DC_LINE_DELTA) >> 12) & 0x03FF;
2457     size = (unsigned short) ((READ_REG32(DC_BUF_SIZE) >> 9) & 0x7F) - 1;
2476     valid = (int) READ_REG32(MC_DR_ACC) & 1;
2495     return (READ_REG32(DC_VID_ST_OFFSET) & 0x003FFFFF);
2514     return ((READ_REG32(DC_BUF_SIZE) >> 10) & 0x000FFFC0);
2529     if (READ_REG32(MC_MEM_CNTRL1) & MC_XBUSARB)