Cross Reference: /xsrc/external/mit/xf86-video-i128/dist/src/i128

Lines Matching defs:iobase
441     unsigned long iobase;
646     iobase = (PCI_REGION_BASE(pI128->PciInfo, 5, REGION_IO) & 0xFFFFFF00);
648     iobase += hwp->PIOOffset;
650     pI128->RegRec.iobase = iobase;
652     pI128->io.rbase_g = inl(iobase)        & 0xFFFFFF00;
653     pI128->io.rbase_w = inl(iobase + 0x04) & 0xFFFFFF00;
654     pI128->io.rbase_a = inl(iobase + 0x08) & 0xFFFFFF00;
655     pI128->io.rbase_b = inl(iobase + 0x0C) & 0xFFFFFF00;
656     pI128->io.rbase_i = inl(iobase + 0x10) & 0xFFFFFF00;
657     pI128->io.rbase_e = inl(iobase + 0x14) & 0xFFFF8003;
658     pI128->io.id =      inl(iobase + 0x18) & /* 0x7FFFFFFF */ 0xFFFFFFFF;
659     pI128->io.config1 = inl(iobase + 0x1C) & /* 0xF3333F1F */ 0xFF133706;
660     pI128->io.config2 = inl(iobase + 0x20) & 0xC1F70FFF;
661     pI128->io.sgram   = inl(iobase + 0x24) & 0xFFFFFFFF;
662     pI128->io.soft_sw = inl(iobase + 0x28) & 0x0000FFFF;
663     pI128->io.vga_ctl = inl(iobase + 0x30) & 0x0000FFFF;
681     outl(iobase + 0x1C, pI128->io.config1);
716     outl(pI128->RegRec.iobase + 0x20, pI128->io.config2);
1175     outl(pI128->RegRec.iobase + 0x1C, pI128->io.config1);
1178     outl(pI128->RegRec.iobase + 0x1C, pI128->io.config1);
1806   unsigned long iobase;
1808   iobase = pI128->RegRec.iobase;
1809   ddc = inl(iobase + 0x2C);
1811       outl(iobase + 0x2C, DDC_MODE_DDC1);
1817       tmp = inl(iobase + 0x2C);
1820       tmp = inl(iobase + 0x2C);
1824   tmp = inl(iobase + 0x2C);
1828       outl(iobase + 0x2C, ~DDC_MODE_MASK & ddc);
1841   unsigned long iobase;
1847   iobase = pI128->RegRec.iobase;
1848   ddc = inl(iobase + 0x2C);
1869   unsigned long iobase;
1871   iobase = pI128->RegRec.iobase;
1872   ddc = inl(iobase + 0x2C);
1878   outl(iobase + 0x2C, tmp);
1891     unsigned long iobase;
1909     iobase = pI128->RegRec.iobase;
1910     soft_sw = inl(iobase + 0x28);
1913     outl(iobase + 0x28, soft_sw);
1917     ddc = inl(iobase + 0x2C);
1920     outl(iobase + 0x2C, ddc);
2104     unsigned long iobase;
2113     iobase = pI128->RegRec.iobase;
2114     rbase_g = inl(iobase);
2115     rbase_w = inl(iobase + 0x04);
2116     rbase_a = inl(iobase + 0x08);
2117     rbase_b = inl(iobase + 0x0C);
2118     rbase_i = inl(iobase + 0x10);
2119     rbase_e = inl(iobase + 0x14);
2120     id = inl(iobase + 0x18);
2121     config1 = inl(iobase + 0x1C);
2122     config2 = inl(iobase + 0x20);
2123     sgram = inl(iobase + 0x24);
2124     soft_sw = inl(iobase + 0x28);
2125     ddc = inl(iobase + 0x2C);
2126     vga_ctl = inl(iobase + 0x30);