Lines Matching refs:pI830
243 I830Ptr pI830;
247 pI830 = pScrn->driverPrivate = xnfcalloc(sizeof(I830Rec), 1);
254 I830Ptr pI830;
261 pI830 = I830PTR(pScrn);
270 I830Ptr pI830 = I830PTR(pScrn);
277 if (IS_I965G(pI830)) {
304 } else if (IS_G33CLASS(pI830)) {
319 gtt_size = pI830->FbMapSize / (1024*1024);
330 if (IS_G4X(pI830) || IS_IGD(pI830) || IS_IGDNG(pI830))
333 if (IS_I85X(pI830) || IS_I865G(pI830) || IS_I9XX(pI830)) {
351 if (IS_I9XX(pI830))
355 if (IS_I9XX(pI830))
359 if (IS_I9XX(pI830))
363 if (IS_I9XX(pI830))
367 if (IS_I9XX(pI830))
371 if (IS_I9XX(pI830))
375 if (IS_I9XX(pI830))
379 if (IS_I9XX(pI830))
422 I830Ptr pI830 = I830PTR(pScrn);
424 device = pI830->PciInfo;
426 pI830->MMIOAddr,
427 pI830->MMIOSize,
429 (void **) &pI830->MMIOBase);
441 if (IS_I9XX(pI830)) {
444 if (IS_I965G(pI830))
446 if (IS_G4X(pI830) || IS_IGDNG(pI830)) {
447 gttaddr = pI830->MMIOAddr + MB(2);
448 pI830->GTTMapSize = MB(2);
450 gttaddr = pI830->MMIOAddr + KB(512);
451 pI830->GTTMapSize = KB(512);
456 gttaddr = I810_MEMBASE(pI830->PciInfo, 3) & 0xFFFFFF00;
457 pI830->GTTMapSize = pI830->FbMapSize / 1024;
460 gttaddr, pI830->GTTMapSize,
462 (void **) &pI830->GTTBase);
474 pI830->GTTBase = NULL;
475 pI830->GTTMapSize = 0;
484 I830Ptr pI830 = I830PTR(pScrn);
486 struct pci_device *const device = pI830->PciInfo;
489 for (i = 2; i < pI830->FbMapSize; i <<= 1) ;
490 pI830->FbMapSize = i;
492 err = pci_device_map_range (device, pI830->LinearAddr, pI830->FbMapSize,
494 (void **) &pI830->FbBase);
498 if (pI830->ring.mem != NULL) {
499 pI830->ring.virtual_start = pI830->FbBase + pI830->ring.mem->offset;
508 I830Ptr pI830 = I830PTR(pScrn);
510 pci_device_unmap_range (pI830->PciInfo, pI830->MMIOBase, pI830->MMIOSize);
511 pI830->MMIOBase = NULL;
513 if (IS_I9XX(pI830)) {
514 pci_device_unmap_range (pI830->PciInfo, pI830->GTTBase, pI830->GTTMapSize);
515 pI830->GTTBase = NULL;
522 I830Ptr pI830 = I830PTR(pScrn);
524 pci_device_unmap_range (pI830->PciInfo, pI830->FbBase, pI830->FbMapSize);
525 pI830->FbBase = NULL;
608 I830Ptr pI830 = I830PTR(pScrn);
610 pScreen->CreateScreenResources = pI830->CreateScreenResources;
646 I830Ptr pI830 = I830PTR(pScrn);
654 if (IS_MOBILE(pI830) && !IS_I830(pI830))
657 if (IS_I9XX(pI830)) {
662 if (!found && SUPPORTS_INTEGRATED_HDMI(pI830))
670 !found && SUPPORTS_INTEGRATED_HDMI(pI830))
676 if (IS_I9XX(pI830) && IS_MOBILE(pI830))
705 I830Ptr pI830 = I830PTR(pScrn);
709 if (IS_G4X(pI830)) {
719 if (IS_GM45(pI830))
722 } else if (IS_I965GM(pI830)) {
728 } else if (IS_I965G(pI830)) {
735 } else if (IS_I855(pI830) || IS_I865G(pI830)) {
737 } else if (IS_I830(pI830)) {
745 I830Ptr pI830 = I830PTR(pScrn);
779 I830Ptr pI830 = I830PTR(pScrn);
782 pI830->ddc2 = FALSE;
784 pI830->ddc2 = TRUE;
789 if (pI830->ddc2) {
791 pI830->ddc2 = TRUE;
793 pI830->ddc2 = FALSE;
801 I830Ptr pI830 = I830PTR(pScrn);
803 if (pI830->MMIOBase)
933 I830Ptr pI830 = I830PTR(pScrn);
937 if (pI830->use_drm_mode)
940 gr18 = pI830->readControl(pI830, GRX, 0x18);
945 pI830->writeControl(pI830, GRX, 0x18, gr18);
985 I830Ptr pI830 = I830PTR(pScrn);
993 if (!pI830->use_drm_mode)
994 I830SetPIOAccess(pI830);
996 switch (DEVICE_ID(pI830->PciInfo)) {
1005 pci_device_cfg_read_u32 (pI830->PciInfo, &capid, I85X_CAPID);
1006 pI830->variant = (capid >> I85X_VARIANT_SHIFT) & I85X_VARIANT_MASK;
1007 switch (pI830->variant) {
1022 "Unknown 852GM/855GM variant: 0x%x)\n", pI830->variant);
1113 if (pI830->pEnt->device->chipset && *pI830->pEnt->device->chipset) {
1114 pScrn->chipset = pI830->pEnt->device->chipset;
1116 } else if (pI830->pEnt->device->chipID >= 0) {
1118 pI830->pEnt->device->chipID);
1121 pI830->pEnt->device->chipID);
1122 DEVICE_ID(pI830->PciInfo) = pI830->pEnt->device->chipID;
1126 DEVICE_ID(pI830->PciInfo));
1129 if (pI830->pEnt->device->chipRev >= 0) {
1131 pI830->pEnt->device->chipRev);
1138 if (IS_MOBILE(pI830) || IS_I9XX(pI830))
1139 pI830->CursorNeedsPhysical = TRUE;
1141 pI830->CursorNeedsPhysical = FALSE;
1143 if (IS_I965G(pI830) || IS_G33CLASS(pI830))
1144 pI830->CursorNeedsPhysical = FALSE;
1147 if (pI830->use_drm_mode)
1151 if (IS_I9XX(pI830)) {
1159 if (pI830->pEnt->device->MemBase != 0) {
1160 pI830->LinearAddr = pI830->pEnt->device->MemBase;
1163 pI830->LinearAddr = I810_MEMBASE (pI830->PciInfo, fb_bar);
1164 if (pI830->LinearAddr == 0) {
1173 (unsigned long)pI830->LinearAddr);
1175 if (pI830->pEnt->device->IOBase != 0) {
1176 pI830->MMIOAddr = pI830->pEnt->device->IOBase;
1178 pI830->MMIOSize = I810_REG_SIZE;
1180 pI830->MMIOAddr = I810_MEMBASE (pI830->PciInfo, mmio_bar);
1181 if (pI830->MMIOAddr == 0) {
1187 pI830->MMIOSize = pI830->PciInfo->regions[mmio_bar].size;
1191 (unsigned long)pI830->MMIOAddr, pI830->MMIOSize);
1194 if (IS_I830(pI830) || IS_845G(pI830)) {
1201 pI830->FbMapSize = 0x8000000;
1203 pI830->FbMapSize = 0x4000000; /* 64MB - has this been tested ?? */
1206 if (IS_I9XX(pI830)) {
1207 pI830->FbMapSize = pI830->PciInfo->regions[fb_bar].size;
1210 pI830->FbMapSize = 0x8000000;
1220 I830Ptr pI830 = I830PTR(pScrn);
1222 if (pI830->use_drm_mode)
1238 I830Ptr pI830 = I830PTR(pScrn);
1242 if (!(pI830->Options = xalloc(sizeof(I830Options))))
1244 memcpy(pI830->Options, I830Options, sizeof(I830Options));
1245 xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, pI830->Options);
1247 pI830->fallback_debug = xf86ReturnOptValBool(pI830->Options,
1250 if (xf86ReturnOptValBool(pI830->Options, OPTION_MODEDEBUG, FALSE)) {
1251 pI830->debug_modes = TRUE;
1253 pI830->debug_modes = FALSE;
1256 if (xf86ReturnOptValBool(pI830->Options, OPTION_LVDS24BITMODE, FALSE)) {
1257 pI830->lvds_24_bit_mode = TRUE;
1259 pI830->lvds_24_bit_mode = FALSE;
1262 if (xf86ReturnOptValBool(pI830->Options, OPTION_LVDSFIXEDMODE, TRUE)) {
1263 pI830->skip_panel_detect = FALSE;
1265 pI830->skip_panel_detect = TRUE;
1268 if (xf86ReturnOptValBool(pI830->Options, OPTION_FORCEENABLEPIPEA, FALSE))
1269 pI830->quirk_flag |= QUIRK_PIPEA_FORCE;
1278 I830Ptr pI830 = I830PTR(pScrn);
1290 if (IS_I965G(pI830)) {
1291 max_height = max_width = min(16384 / pI830->cpp, 8192);
1302 I830Ptr pI830 = I830PTR(pScrn);
1303 pI830->directRenderingType = DRI_NONE;
1304 if (!xf86ReturnOptValBool(pI830->Options, OPTION_DRI, TRUE))
1305 pI830->directRenderingType = DRI_DISABLED;
1310 pI830->directRenderingType = DRI_DISABLED;
1317 I830Ptr pI830 = I830PTR(pScrn);
1322 if (pI830->debug_modes) {
1330 if (DEVICE_ID(pI830->PciInfo) == PCI_CHIP_E7221_G)
1333 if (IS_MOBILE(pI830) || IS_I9XX(pI830))
1357 pI830->stolen_size = I830DetectMemory(pScrn);
1433 I830Ptr pI830 = I830PTR(pScrn);
1435 if (drmmode_pre_init(pScrn, pI830->drmSubFD, pI830->cpp) == FALSE) {
1442 pI830->have_gem = TRUE;
1452 I830Ptr pI830 = I830PTR(pScrn);
1455 pI830->XvPreferOverlay = xf86ReturnOptValBool(pI830->Options, OPTION_PREFER_OVERLAY, FALSE);
1457 if (xf86GetOptValInteger(pI830->Options, OPTION_VIDEO_KEY,
1458 &(pI830->colorKey))) {
1460 } else if (xf86GetOptValInteger(pI830->Options, OPTION_COLOR_KEY,
1461 &(pI830->colorKey))) {
1464 pI830->colorKey =
1471 pI830->colorKey);
1491 I830Ptr pI830;
1512 pI830 = I830PTR(pScrn);
1513 pI830->SaveGeneration = -1;
1514 pI830->pEnt = pEnt;
1515 pI830->use_drm_mode = drm_mode_setting;
1516 pI830->kernel_exec_fencing = pI830->use_drm_mode;
1530 if (pI830->pEnt->location.type != BUS_PCI)
1533 pI830->PciInfo = xf86GetPciInfoForEntity(pI830->pEnt->index);
1566 if (!pI830->use_drm_mode)
1569 pI830->cpp = pScrn->bitsPerPixel / 8;
1571 pI830->preinit = TRUE;
1581 if (pI830->use_drm_mode) {
1616 if (!pI830->use_drm_mode) {
1622 I830SetMMIOAccess(pI830);
1626 if (xf86ReturnOptValBool(pI830->Options, OPTION_DRI, FALSE) &&
1627 pI830->directRenderingType != DRI_DISABLED) {
1631 pI830->preinit = FALSE;
1645 I830Ptr pI830 = I830PTR(pScrn);
1666 I830Ptr pI830 = I830PTR(pScrn);
1675 assert((pI830->ring.mem->offset & I830_RING_START_MASK) ==
1676 pI830->ring.mem->offset);
1679 itemp = pI830->ring.mem->offset;
1682 if (((pI830->ring.mem->size - 4096) & I830_RING_NR_PAGES) !=
1683 pI830->ring.mem->size - 4096) {
1686 "mask (%x)\n", pI830->ring.mem->size - 4096,
1690 itemp = (pI830->ring.mem->size - 4096) & I830_RING_NR_PAGES;
1699 I830Ptr pI830 = I830PTR(pScrn);
1704 if (pI830->ring.mem == NULL)
1707 pI830->ring.head = INREG(LP_RING + RING_HEAD) & I830_HEAD_MASK;
1708 pI830->ring.tail = INREG(LP_RING + RING_TAIL);
1709 pI830->ring.space = pI830->ring.head - (pI830->ring.tail + 8);
1710 if (pI830->ring.space < 0)
1711 pI830->ring.space += pI830->ring.mem->size;
1720 i830_pipe_enabled(I830Ptr pI830, enum pipe pipe)
1729 i830_save_palette(I830Ptr pI830, enum pipe pipe)
1733 if (!i830_pipe_enabled(pI830, pipe))
1738 pI830->savePaletteA[i] = INREG(PALETTE_A + (i << 2));
1740 pI830->savePaletteB[i] = INREG(PALETTE_B + (i << 2));
1745 i830_restore_palette(I830Ptr pI830, enum pipe pipe)
1749 if (!i830_pipe_enabled(pI830, pipe))
1754 OUTREG(PALETTE_A + (i << 2), pI830->savePaletteA[i]);
1756 OUTREG(PALETTE_B + (i << 2), pI830->savePaletteB[i]);
1764 I830Ptr pI830 = I830PTR(pScrn);
1769 if (pI830->fb_compression) {
1770 pI830->saveFBC_CFB_BASE = INREG(FBC_CFB_BASE);
1771 pI830->saveFBC_LL_BASE = INREG(FBC_LL_BASE);
1772 pI830->saveFBC_CONTROL2 = INREG(FBC_CONTROL2);
1773 pI830->saveFBC_CONTROL = INREG(FBC_CONTROL);
1774 pI830->saveFBC_FENCE_OFF = INREG(FBC_FENCE_OFF);
1778 if (!DSPARB_HWCONTROL(pI830))
1779 pI830->saveDSPARB = INREG(DSPARB);
1781 pI830->saveDSPACNTR = INREG(DSPACNTR);
1782 pI830->savePIPEACONF = INREG(PIPEACONF);
1783 pI830->savePIPEASRC = INREG(PIPEASRC);
1784 pI830->saveFPA0 = INREG(FPA0);
1785 pI830->saveFPA1 = INREG(FPA1);
1786 pI830->saveDPLL_A = INREG(DPLL_A);
1787 if (IS_I965G(pI830))
1788 pI830->saveDPLL_A_MD = INREG(DPLL_A_MD);
1789 pI830->saveHTOTAL_A = INREG(HTOTAL_A);
1790 pI830->saveHBLANK_A = INREG(HBLANK_A);
1791 pI830->saveHSYNC_A = INREG(HSYNC_A);
1792 pI830->saveVTOTAL_A = INREG(VTOTAL_A);
1793 pI830->saveVBLANK_A = INREG(VBLANK_A);
1794 pI830->saveVSYNC_A = INREG(VSYNC_A);
1795 pI830->saveBCLRPAT_A = INREG(BCLRPAT_A);
1796 pI830->saveDSPASTRIDE = INREG(DSPASTRIDE);
1797 pI830->saveDSPASIZE = INREG(DSPASIZE);
1798 pI830->saveDSPAPOS = INREG(DSPAPOS);
1799 pI830->saveDSPABASE = INREG(DSPABASE);
1801 i830_save_palette(pI830, PIPE_A);
1804 pI830->savePIPEBCONF = INREG(PIPEBCONF);
1805 pI830->savePIPEBSRC = INREG(PIPEBSRC);
1806 pI830->saveDSPBCNTR = INREG(DSPBCNTR);
1807 pI830->saveFPB0 = INREG(FPB0);
1808 pI830->saveFPB1 = INREG(FPB1);
1809 pI830->saveDPLL_B = INREG(DPLL_B);
1810 if (IS_I965G(pI830))
1811 pI830->saveDPLL_B_MD = INREG(DPLL_B_MD);
1812 pI830->saveHTOTAL_B = INREG(HTOTAL_B);
1813 pI830->saveHBLANK_B = INREG(HBLANK_B);
1814 pI830->saveHSYNC_B = INREG(HSYNC_B);
1815 pI830->saveVTOTAL_B = INREG(VTOTAL_B);
1816 pI830->saveVBLANK_B = INREG(VBLANK_B);
1817 pI830->saveVSYNC_B = INREG(VSYNC_B);
1818 pI830->saveBCLRPAT_B = INREG(BCLRPAT_B);
1819 pI830->saveDSPBSTRIDE = INREG(DSPBSTRIDE);
1820 pI830->saveDSPBSIZE = INREG(DSPBSIZE);
1821 pI830->saveDSPBPOS = INREG(DSPBPOS);
1822 pI830->saveDSPBBASE = INREG(DSPBBASE);
1824 i830_save_palette(pI830, PIPE_B);
1827 if (IS_I965G(pI830)) {
1828 pI830->saveDSPASURF = INREG(DSPASURF);
1829 pI830->saveDSPBSURF = INREG(DSPBSURF);
1830 pI830->saveDSPATILEOFF = INREG(DSPATILEOFF);
1831 pI830->saveDSPBTILEOFF = INREG(DSPBTILEOFF);
1834 pI830->saveVCLK_DIVISOR_VGA0 = INREG(VCLK_DIVISOR_VGA0);
1835 pI830->saveVCLK_DIVISOR_VGA1 = INREG(VCLK_DIVISOR_VGA1);
1836 pI830->saveVCLK_POST_DIV = INREG(VCLK_POST_DIV);
1837 pI830->saveVGACNTRL = INREG(VGACNTRL);
1839 pI830->saveCURSOR_A_CONTROL = INREG(CURSOR_A_CONTROL);
1840 pI830->saveCURSOR_A_POSITION = INREG(CURSOR_A_POSITION);
1841 pI830->saveCURSOR_A_BASE = INREG(CURSOR_A_BASE);
1842 pI830->saveCURSOR_B_CONTROL = INREG(CURSOR_B_CONTROL);
1843 pI830->saveCURSOR_B_POSITION = INREG(CURSOR_B_POSITION);
1844 pI830->saveCURSOR_B_BASE = INREG(CURSOR_B_BASE);
1847 pI830->saveSWF[i] = INREG(SWF0 + (i << 2));
1848 pI830->saveSWF[i+7] = INREG(SWF00 + (i << 2));
1850 pI830->saveSWF[14] = INREG(SWF30);
1851 pI830->saveSWF[15] = INREG(SWF31);
1852 pI830->saveSWF[16] = INREG(SWF32);
1854 pI830->saveDSPCLK_GATE_D = INREG(DSPCLK_GATE_D);
1855 pI830->saveRENCLK_GATE_D1 = INREG(RENCLK_GATE_D1);
1857 if (IS_I965G(pI830)) {
1858 pI830->saveRENCLK_GATE_D2 = INREG(RENCLK_GATE_D2);
1859 pI830->saveRAMCLK_GATE_D = INREG(RAMCLK_GATE_D);
1862 if (IS_I965GM(pI830) || IS_GM45(pI830))
1863 pI830->savePWRCTXA = INREG(PWRCTXA);
1865 if (IS_MOBILE(pI830) && !IS_I830(pI830))
1866 pI830->saveLVDS = INREG(LVDS);
1867 pI830->savePFIT_CONTROL = INREG(PFIT_CONTROL);
1892 I830Ptr pI830 = I830PTR(pScrn);
1913 if (IS_MOBILE(pI830) && !IS_I830(pI830))
1914 OUTREG(LVDS, pI830->saveLVDS);
1916 if (!IS_I830(pI830) && !IS_845G(pI830))
1917 OUTREG(PFIT_CONTROL, pI830->savePFIT_CONTROL);
1919 if (!DSPARB_HWCONTROL(pI830))
1920 OUTREG(DSPARB, pI830->saveDSPARB);
1922 OUTREG(DSPCLK_GATE_D, pI830->saveDSPCLK_GATE_D);
1923 OUTREG(RENCLK_GATE_D1, pI830->saveRENCLK_GATE_D1);
1925 if (IS_I965G(pI830)) {
1926 OUTREG(RENCLK_GATE_D2, pI830->saveRENCLK_GATE_D2);
1927 OUTREG(RAMCLK_GATE_D, pI830->saveRAMCLK_GATE_D);
1930 if (IS_I965GM(pI830) || IS_GM45(pI830))
1931 OUTREG(PWRCTXA, pI830->savePWRCTXA);
1945 OUTREG(VCLK_DIVISOR_VGA0, pI830->saveVCLK_DIVISOR_VGA0);
1946 OUTREG(VCLK_DIVISOR_VGA1, pI830->saveVCLK_DIVISOR_VGA1);
1947 OUTREG(VCLK_POST_DIV, pI830->saveVCLK_POST_DIV);
1950 if (pI830->saveDPLL_A & DPLL_VCO_ENABLE)
1952 OUTREG(FPA0, pI830->saveFPA0);
1953 OUTREG(DPLL_A, pI830->saveDPLL_A & ~DPLL_VCO_ENABLE);
1957 OUTREG(FPA0, pI830->saveFPA0);
1958 OUTREG(FPA1, pI830->saveFPA1);
1959 OUTREG(DPLL_A, pI830->saveDPLL_A);
1962 if (IS_I965G(pI830))
1963 OUTREG(DPLL_A_MD, pI830->saveDPLL_A_MD);
1965 OUTREG(DPLL_A, pI830->saveDPLL_A);
1970 OUTREG(HTOTAL_A, pI830->saveHTOTAL_A);
1971 OUTREG(HBLANK_A, pI830->saveHBLANK_A);
1972 OUTREG(HSYNC_A, pI830->saveHSYNC_A);
1973 OUTREG(VTOTAL_A, pI830->saveVTOTAL_A);
1974 OUTREG(VBLANK_A, pI830->saveVBLANK_A);
1975 OUTREG(VSYNC_A, pI830->saveVSYNC_A);
1976 OUTREG(BCLRPAT_A, pI830->saveBCLRPAT_A);
1978 OUTREG(DSPASTRIDE, pI830->saveDSPASTRIDE);
1979 OUTREG(DSPASIZE, pI830->saveDSPASIZE);
1980 OUTREG(DSPAPOS, pI830->saveDSPAPOS);
1981 OUTREG(PIPEASRC, pI830->savePIPEASRC);
1982 OUTREG(DSPABASE, pI830->saveDSPABASE);
1983 if (IS_I965G(pI830))
1985 OUTREG(DSPASURF, pI830->saveDSPASURF);
1986 OUTREG(DSPATILEOFF, pI830->saveDSPATILEOFF);
1989 OUTREG(PIPEACONF, pI830->savePIPEACONF);
1999 if ((pI830->saveDSPACNTR & DISPPLANE_SEL_PIPE_MASK) ==
2001 OUTREG(DSPACNTR, pI830->saveDSPACNTR);
2006 if ((pI830->saveDSPBCNTR & DISPPLANE_SEL_PIPE_MASK) ==
2008 OUTREG(DSPBCNTR, pI830->saveDSPBCNTR);
2018 if (pI830->saveDPLL_B & DPLL_VCO_ENABLE)
2020 OUTREG(FPB0, pI830->saveFPB0);
2021 OUTREG(DPLL_B, pI830->saveDPLL_B & ~DPLL_VCO_ENABLE);
2025 OUTREG(FPB0, pI830->saveFPB0);
2026 OUTREG(FPB1, pI830->saveFPB1);
2027 OUTREG(DPLL_B, pI830->saveDPLL_B);
2030 if (IS_I965G(pI830))
2031 OUTREG(DPLL_B_MD, pI830->saveDPLL_B_MD);
2033 OUTREG(DPLL_B, pI830->saveDPLL_B);
2038 OUTREG(HTOTAL_B, pI830->saveHTOTAL_B);
2039 OUTREG(HBLANK_B, pI830->saveHBLANK_B);
2040 OUTREG(HSYNC_B, pI830->saveHSYNC_B);
2041 OUTREG(VTOTAL_B, pI830->saveVTOTAL_B);
2042 OUTREG(VBLANK_B, pI830->saveVBLANK_B);
2043 OUTREG(VSYNC_B, pI830->saveVSYNC_B);
2044 OUTREG(BCLRPAT_B, pI830->saveBCLRPAT_B);
2045 OUTREG(DSPBSTRIDE, pI830->saveDSPBSTRIDE);
2046 OUTREG(DSPBSIZE, pI830->saveDSPBSIZE);
2047 OUTREG(DSPBPOS, pI830->saveDSPBPOS);
2048 OUTREG(PIPEBSRC, pI830->savePIPEBSRC);
2049 OUTREG(DSPBBASE, pI830->saveDSPBBASE);
2050 if (IS_I965G(pI830))
2052 OUTREG(DSPBSURF, pI830->saveDSPBSURF);
2053 OUTREG(DSPBTILEOFF, pI830->saveDSPBTILEOFF);
2056 OUTREG(PIPEBCONF, pI830->savePIPEBCONF);
2065 if ((pI830->saveDSPACNTR & DISPPLANE_SEL_PIPE_MASK) ==
2067 OUTREG(DSPACNTR, pI830->saveDSPACNTR);
2071 if ((pI830->saveDSPBCNTR & DISPPLANE_SEL_PIPE_MASK) ==
2073 OUTREG(DSPBCNTR, pI830->saveDSPBCNTR);
2079 OUTREG(VGACNTRL, pI830->saveVGACNTRL);
2088 OUTREG(CURSOR_A_POSITION, pI830->saveCURSOR_A_POSITION);
2089 OUTREG(CURSOR_A_BASE, pI830->saveCURSOR_A_BASE);
2090 OUTREG(CURSOR_A_CONTROL, pI830->saveCURSOR_A_CONTROL);
2091 OUTREG(CURSOR_B_POSITION, pI830->saveCURSOR_B_POSITION);
2092 OUTREG(CURSOR_B_BASE, pI830->saveCURSOR_B_BASE);
2093 OUTREG(CURSOR_B_CONTROL, pI830->saveCURSOR_B_CONTROL);
2102 i830_restore_palette(pI830, PIPE_A);
2103 i830_restore_palette(pI830, PIPE_B);
2106 OUTREG(SWF0 + (i << 2), pI830->saveSWF[i]);
2107 OUTREG(SWF00 + (i << 2), pI830->saveSWF[i+7]);
2110 OUTREG(SWF30, pI830->saveSWF[14]);
2111 OUTREG(SWF31, pI830->saveSWF[15]);
2112 OUTREG(SWF32, pI830->saveSWF[16]);
2114 if (pI830->fb_compression) {
2115 OUTREG(FBC_CFB_BASE, pI830->saveFBC_CFB_BASE);
2116 OUTREG(FBC_LL_BASE, pI830->saveFBC_LL_BASE);
2117 OUTREG(FBC_FENCE_OFF, pI830->saveFBC_FENCE_OFF);
2118 OUTREG(FBC_CONTROL2, pI830->saveFBC_CONTROL2);
2119 OUTREG(FBC_CONTROL, pI830->saveFBC_CONTROL);
2138 I830Ptr pI830 = I830PTR(pScrn);
2143 if (pI830->last_3d != LAST_3D_OTHER)
2146 if (!IS_I965G(pI830))
2148 if (IS_I9XX(pI830))
2161 I830Ptr pI830 = I830PTR(pScrn);
2163 pScreen->BlockHandler = pI830->BlockHandler;
2167 pI830->BlockHandler = pScreen->BlockHandler;
2176 if (pI830->need_mi_flush || pI830->batch_used)
2186 if (pI830->have_gem)
2187 drmCommandNone(pI830->drmSubFD, DRM_I915_GEM_THROTTLE);
2189 pI830->need_mi_flush = FALSE;
2201 I830Ptr pI830 = I830PTR(pScrn);
2219 if (gentry.base == pI830->LinearAddr &&
2220 gentry.size < pI830->FbMapSize) {
2244 I830Ptr pI830 = I830PTR(pScrn);
2245 Bool tiled = pI830->tiling;
2254 if (IS_I965GM(pI830) || IS_GM45(pI830))
2279 I830Ptr pI830 = I830PTR(pScrn);
2283 tiled = i830_tiled_width(pI830, &pScrn->displayWidth, pI830->cpp);
2293 pI830->pEnt->device->videoRam ? X_CONFIG : X_DEFAULT,
2302 pI830->tiling = FALSE;
2308 if (pI830->fb_compression)
2312 pI830->fb_compression = FALSE;
2323 I830Ptr pI830 = I830PTR(pScrn);
2325 if (pI830->bufmgr)
2328 if (pI830->have_gem) {
2334 if (IS_I865G(pI830))
2337 pI830->bufmgr = intel_bufmgr_gem_init(pI830->drmSubFD, batch_size);
2338 intel_bufmgr_gem_enable_reuse(pI830->bufmgr);
2340 assert(pI830->FbBase != NULL);
2341 pI830->bufmgr = intel_bufmgr_fake_init(pI830->drmSubFD,
2342 pI830->fake_bufmgr_mem->offset,
2343 pI830->FbBase +
2344 pI830->fake_bufmgr_mem->offset,
2345 pI830->fake_bufmgr_mem->size,
2354 I830Ptr pI830 = I830PTR(pScrn);
2356 if (pI830->use_drm_mode) {
2382 I830Ptr pI830 = I830PTR(pScrn);
2385 if (pI830->use_drm_mode) {
2386 pipe = drmmode_get_pipe_from_crtc_id(pI830->bufmgr, crtc);
2399 I830Ptr pI830;
2404 pI830 = I830PTR(pScrn);
2412 pScrn->videoRam = pI830->stolen_size / KB(1);
2414 if (sys_mem + (pI830->stolen_size / 1024) < pScrn->videoRam) {
2415 pScrn->videoRam = sys_mem + (pI830->stolen_size / 1024);
2417 if (sys_mem + (pI830->stolen_size / 1024) <
2418 pI830->pEnt->device->videoRam) {
2426 if (pScrn->videoRam > pI830->FbMapSize / 1024) {
2427 pScrn->videoRam = pI830->FbMapSize / 1024;
2428 if (pI830->FbMapSize / 1024 < pI830->pEnt->device->videoRam) {
2444 if (!IS_I965G(pI830) && pScrn->displayWidth > 2048) {
2447 pI830->directRenderingType = DRI_DISABLED;
2454 I830Ptr pI830 = I830PTR(pScrn);
2467 if (I830LVDSPresent(pScrn) && !IS_I965GM(pI830) && !IS_GM45(pI830)) {
2485 I830Ptr pI830 = I830PTR(pScrn);
2489 if (IS_I965GM(pI830) || IS_GM45(pI830)) {
2504 I830Ptr pI830;
2509 pI830 = I830PTR(pScrn);
2511 if (!pI830->use_drm_mode)
2514 pScrn->displayWidth = i830_pad_drawable_width(pScrn->virtualX, pI830->cpp);
2528 if (pI830->pEnt->device->videoRam == 0) {
2530 pScrn->videoRam = pI830->FbMapSize / KB(1);
2534 pScrn->videoRam = pI830->pEnt->device->videoRam;
2544 pScrn->videoRam = pI830->FbMapSize / KB(1);
2546 if (pScrn->videoRam != pI830->pEnt->device->videoRam) {
2553 pScrn->videoRam, pI830->pEnt->device->videoRam);
2558 if (pI830->use_drm_mode) {
2559 struct pci_device *const device = pI830->PciInfo;
2560 int fb_bar = IS_I9XX(pI830) ? 2 : 0;
2568 if (pI830->directRenderingType == DRI_NONE && I830DRI2ScreenInit(pScreen))
2569 pI830->directRenderingType = DRI_DRI2;
2573 pI830->tiling = TRUE;
2576 if (xf86IsOptionSet(pI830->Options, OPTION_TILING)) {
2577 if (xf86ReturnOptValBool(pI830->Options, OPTION_TILING, FALSE))
2578 pI830->tiling = TRUE;
2580 pI830->tiling = FALSE;
2584 if (i830_fb_compression_supported(pI830))
2585 pI830->fb_compression = TRUE;
2587 pI830->fb_compression = FALSE;
2590 if (xf86IsOptionSet(pI830->Options, OPTION_FBC)) {
2591 if (xf86ReturnOptValBool(pI830->Options, OPTION_FBC, FALSE))
2592 pI830->fb_compression = TRUE;
2594 pI830->fb_compression = FALSE;
2597 if (pI830->use_drm_mode && pI830->fb_compression == TRUE) {
2600 pI830->fb_compression = FALSE;
2604 pI830->swapbuffers_wait = TRUE;
2607 if (xf86IsOptionSet(pI830->Options, OPTION_SWAPBUFFERS_WAIT)) {
2608 if (xf86ReturnOptValBool(pI830->Options, OPTION_SWAPBUFFERS_WAIT, FALSE))
2609 pI830->swapbuffers_wait = TRUE;
2611 pI830->swapbuffers_wait = FALSE;
2615 pI830->fb_compression ? "en" : "dis");
2616 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Tiling %sabled\n", pI830->tiling ?
2619 pI830->swapbuffers_wait ? "en" : "dis");
2621 pI830->last_3d = LAST_3D_OTHER;
2622 pI830->overlayOn = FALSE;
2628 pI830->XvEnabled = TRUE;
2631 if (!pI830->use_drm_mode)
2637 if (!pI830->use_drm_mode) {
2640 pScrn->memPhysBase = (unsigned long)pI830->FbBase;
2651 pI830->starting = TRUE;
2661 if (!pI830->use_drm_mode) {
2662 vgaHWSetMmioFuncs(hwp, pI830->MMIOBase, 0);
2678 pScrn->fbOffset = pI830->front_buffer->offset;
2681 if (!fbScreenInit(pScreen, pI830->FbBase + pScrn->fbOffset,
2712 if (IS_I965G(pI830))
2713 pI830->batch_flush_notify = i965_batch_flush_notify;
2714 else if (IS_I9XX(pI830))
2715 pI830->batch_flush_notify = i915_batch_flush_notify;
2717 pI830->batch_flush_notify = i830_batch_flush_notify;
2735 pI830->BlockHandler = pScreen->BlockHandler;
2739 pI830->CloseScreen = pScreen->CloseScreen;
2741 pI830->CreateScreenResources = pScreen->CreateScreenResources;
2761 pI830->XvMCEnabled = FALSE;
2762 from = ((pI830->directRenderingType == DRI_DRI2) &&
2763 xf86GetOptValBool(pI830->Options, OPTION_XVMC,
2764 &pI830->XvMCEnabled) ? X_CONFIG : X_DEFAULT);
2766 pI830->XvMCEnabled ? "en" : "dis");
2769 if (pI830->XvEnabled)
2776 switch (pI830->directRenderingType) {
2778 pI830->directRenderingOpen = TRUE;
2795 pI830->starting = FALSE;
2796 pI830->closing = FALSE;
2797 pI830->suspended = FALSE;
2807 I830Ptr pI830 = I830PTR(pScrn);
2814 if (pI830->use_drm_mode)
2832 I830Ptr pI830 = I830PTR(pScrn);
2833 if (pI830 && pI830->XvMCEnabled)
2848 I830Ptr pI830 = I830PTR(pScrn);
2853 pI830->leaving = TRUE;
2855 if (pI830->devicesTimer)
2856 TimerFree(pI830->devicesTimer);
2857 pI830->devicesTimer = NULL;
2867 if (!pI830->use_drm_mode) {
2872 if (!pI830->have_gem) {
2873 intel_bufmgr_fake_evict_all(pI830->bufmgr);
2877 if (pI830->debug_modes) {
2887 if (pI830->have_gem && !pI830->use_drm_mode) {
2893 ret = drmCommandNone(pI830->drmSubFD, DRM_I915_GEM_LEAVEVT);
2898 if (IS_I965G(pI830))
2901 ret = drmDropMaster(pI830->drmSubFD);
2915 I830Ptr pI830 = I830PTR(pScrn);
2920 ret = drmSetMaster(pI830->drmSubFD);
2936 if (pI830->SaveGeneration != serverGeneration) {
2937 pI830->SaveGeneration = serverGeneration;
2938 if (!pI830->use_drm_mode)
2943 if (!pI830->use_drm_mode) {
2962 pI830->leaving = FALSE;
2964 if (!pI830->use_drm_mode)
2967 if (pI830->have_gem && !pI830->use_drm_mode) {
2973 ret = drmCommandNone(pI830->drmSubFD, DRM_I915_GEM_ENTERVT);
2985 if (IS_I965G(pI830))
2988 if (!pI830->use_drm_mode) {
2995 if (!pI830->have_gem) {
3006 if (pI830->power_context)
3007 OUTREG(PWRCTXA, pI830->power_context->offset | PWRCTX_EN);
3009 memset(pI830->FbBase + pScrn->fbOffset, 0,
3010 pScrn->virtualY * pScrn->displayWidth * pI830->cpp);
3016 if (!pI830->use_drm_mode) {
3017 if (pI830->debug_modes) {
3033 pI830->last_3d = LAST_3D_OTHER;
3051 I830Ptr pI830 = I830PTR(pScrn);
3053 pI830->closing = TRUE;
3059 if (pI830->devicesTimer)
3060 TimerFree(pI830->devicesTimer);
3061 pI830->devicesTimer = NULL;
3063 if (!pI830->use_drm_mode) {
3069 if (pI830->uxa_driver) {
3071 xfree (pI830->uxa_driver);
3072 pI830->uxa_driver = NULL;
3074 if (pI830->front_buffer) {
3076 if (pI830->use_drm_mode)
3078 i830_free_memory(pScrn, pI830->front_buffer);
3079 pI830->front_buffer = NULL;
3087 free(pI830->offscreenImages);
3088 pI830->offscreenImages = NULL;
3090 pScreen->CloseScreen = pI830->CloseScreen;
3093 if (pI830->directRenderingOpen && pI830->directRenderingType == DRI_DRI2) {
3094 pI830->directRenderingOpen = FALSE;
3101 pI830->closing = FALSE;
3134 I830Ptr pI830 = I830PTR(pScrn);
3144 if (!undo && !pI830->suspended) {
3146 pI830->suspended = TRUE;
3148 } else if (undo && pI830->suspended) {
3151 pI830->suspended = FALSE;
3157 if (pI830->suspended) {
3160 pI830->suspended = FALSE;
3177 if (pI830->quirk_flag & QUIRK_RESET_MODES)