Lines Matching refs:op
219 struct i915_fs_op op;
221 op.ui[0] = D0_DCL | (REG_TYPE(reg) << D0_TYPE_SHIFT) |
223 op.ui[1] = 0;
224 op.ui[2] = 0;
226 op.ui[0] |= D0_CHANNEL_ALL;
228 return op;
247 struct i915_fs_op op;
249 op.ui[0] = 0;
250 op.ui[1] = 0;
251 op.ui[2] = 0;
256 op.ui[0] |= load_op;
257 op.ui[0] |= REG_TYPE(dest_reg) << T0_DEST_TYPE_SHIFT;
258 op.ui[0] |= REG_NR(dest_reg) << T0_DEST_NR_SHIFT;
259 op.ui[0] |= REG_NR(sampler_reg) << T0_SAMPLER_NR_SHIFT;
260 op.ui[1] |= REG_TYPE(address_reg) << T1_ADDRESS_REG_TYPE_SHIFT;
261 op.ui[1] |= REG_NR(address_reg) << T1_ADDRESS_REG_NR_SHIFT;
263 return op;
266 #define i915_fs_arith(op, dest_reg, operand0, operand1, operand2) \
267 _i915_fs_arith(A0_##op, dest_reg, operand0, operand1, operand2)
275 struct i915_fs_op op;
277 op.ui[0] = 0;
278 op.ui[1] = 0;
279 op.ui[2] = 0;
282 op.ui[0] |= cmd;
283 op.ui[0] |= REG_TYPE(dest_reg) << A0_DEST_TYPE_SHIFT;
284 op.ui[0] |= REG_NR(dest_reg) << A0_DEST_NR_SHIFT;
285 op.ui[0] |= A0_DEST_CHANNEL_ALL;
288 op.ui[0] |= REG_TYPE(operand0.reg) << A0_SRC0_TYPE_SHIFT;
289 op.ui[0] |= REG_NR(operand0.reg) << A0_SRC0_NR_SHIFT;
291 op.ui[1] |= i915_get_hardware_channel_val(operand0.x) <<
294 op.ui[1] |= A1_SRC0_CHANNEL_X_NEGATE;
296 op.ui[1] |= i915_get_hardware_channel_val(operand0.y) <<
299 op.ui[1] |= A1_SRC0_CHANNEL_Y_NEGATE;
301 op.ui[1] |= i915_get_hardware_channel_val(operand0.z) <<
304 op.ui[1] |= A1_SRC0_CHANNEL_Z_NEGATE;
306 op.ui[1] |= i915_get_hardware_channel_val(operand0.w) <<
309 op.ui[1] |= A1_SRC0_CHANNEL_W_NEGATE;
312 op.ui[1] |= REG_TYPE(operand1.reg) << A1_SRC1_TYPE_SHIFT;
313 op.ui[1] |= REG_NR(operand1.reg) << A1_SRC1_NR_SHIFT;
315 op.ui[1] |= i915_get_hardware_channel_val(operand1.x) <<
318 op.ui[1] |= A1_SRC1_CHANNEL_X_NEGATE;
320 op.ui[1] |= i915_get_hardware_channel_val(operand1.y) <<
323 op.ui[1] |= A1_SRC1_CHANNEL_Y_NEGATE;
325 op.ui[2] |= i915_get_hardware_channel_val(operand1.z) <<
328 op.ui[2] |= A2_SRC1_CHANNEL_Z_NEGATE;
330 op.ui[2] |= i915_get_hardware_channel_val(operand1.w) <<
333 op.ui[2] |= A2_SRC1_CHANNEL_W_NEGATE;
336 op.ui[2] |= REG_TYPE(operand2.reg) << A2_SRC2_TYPE_SHIFT;
337 op.ui[2] |= REG_NR(operand2.reg) << A2_SRC2_NR_SHIFT;
339 op.ui[2] |= i915_get_hardware_channel_val(operand2.x) <<
342 op.ui[2] |= A2_SRC2_CHANNEL_X_NEGATE;
344 op.ui[2] |= i915_get_hardware_channel_val(operand2.y) <<
347 op.ui[2] |= A2_SRC2_CHANNEL_Y_NEGATE;
349 op.ui[2] |= i915_get_hardware_channel_val(operand2.z) <<
352 op.ui[2] |= A2_SRC2_CHANNEL_Z_NEGATE;
354 op.ui[2] |= i915_get_hardware_channel_val(operand2.w) <<
357 op.ui[2] |= A2_SRC2_CHANNEL_W_NEGATE;
359 return op;
376 struct i915_fs_op op; \
378 op = i915_fs_arith(MOV, dest_reg, operand0, i915_fs_operand_none(), \
380 op.ui[0] &= ~A0_DEST_CHANNEL_ALL; \
381 op.ui[0] |= ((dest_mask) & ~MASK_SATURATE) << A0_DEST_CHANNEL_SHIFT; \
383 op.ui[0] |= A0_DEST_SATURATE; \
385 FS_OUT(op); \
408 struct i915_fs_op op; \
410 op = i915_fs_arith(DP3, dest_reg, operand0, operand1, \
412 op.ui[0] &= ~A0_DEST_CHANNEL_ALL; \
413 op.ui[0] |= ((dest_mask) & ~MASK_SATURATE) << A0_DEST_CHANNEL_SHIFT; \
415 op.ui[0] |= A0_DEST_SATURATE; \
417 FS_OUT(op); \