Cross Reference: /xsrc/external/mit/xf86-video-intel/dist/src/sna/gen7

Lines Matching refs:gen7
97 	.name = "Ivybridge (gen7)",
106 	.name = "Ivybridge (gen7, gt1)",
116 	.name = "Ivybridge (gen7, gt2)",
126 	.name = "Baytrail (gen7)",
135 	.name = "Haswell (gen7.5)",
146 	.name = "Haswell (gen7.5, gt1)",
158 	.name = "Haswell (gen7.5, gt2)",
170 	.name = "Haswell (gen7.5, gt3)",
540 	OUT_BATCH(sna->render_state.gen7.info->urb.push_ps_size);
544 	OUT_BATCH((sna->render_state.gen7.info->urb.max_vs_entries << GEN7_URB_ENTRY_NUMBER_SHIFT) |
564 	uint32_t mocs = sna->render_state.gen7.info->mocs << 8;
575 				 sna->render_state.gen7.general_bo,
581 				 sna->render_state.gen7.general_bo,
837 	sna->render_state.gen7.needs_invariant = false;
843 	struct gen7_render_state *render = &sna->render_state.gen7;
864 	if (sna->render_state.gen7.samplers == state)
867 	sna->render_state.gen7.samplers = state;
871 	assert (is_aligned(sna->render_state.gen7.wm_state + state, 32));
873 	OUT_BATCH(sna->render_state.gen7.wm_state + state);
881 	if (sna->render_state.gen7.num_sf_outputs == num_sf_outputs)
887 	sna->render_state.gen7.num_sf_outputs = num_sf_outputs;
912 	if (sna->render_state.gen7.kernel == kernel)
915 	sna->render_state.gen7.kernel = kernel;
916 	kernels = sna->render_state.gen7.wm_kernel[kernel];
929 	OUT_BATCH(sna->render_state.gen7.info->max_wm_threads |
944 	if (sna->render_state.gen7.surface_table == offset)
952 	sna->render_state.gen7.surface_table = offset;
966 	if (sna->render_state.gen7.drawrect_limit == limit &&
967 	    sna->render_state.gen7.drawrect_offset == offset)
970 	sna->render_state.gen7.drawrect_offset = offset;
971 	sna->render_state.gen7.drawrect_limit = limit;
990 	struct gen7_render_state *render = &sna->render_state.gen7;
992 	int id = GEN7_VERTEX(op->u.gen7.flags);
1109 	sna->render_state.gen7.pipe_controls_since_stall = 0;
1120 		sna->render_state.gen7.pipe_controls_since_stall = 0;
1122 		sna->render_state.gen7.pipe_controls_since_stall++;
1138 	sna->render_state.gen7.pipe_controls_since_stall = 0;
1153 		(sna->render_state.gen7.emit_flush && GEN7_READS_DST(op->u.gen7.flags));
1159 	need_stall = sna->render_state.gen7.surface_table != wm_binding_table;
1169 	    sna->render_state.gen7.pipe_controls_since_stall >= 3)
1188 	gen7_emit_cc(sna, GEN7_BLEND(op->u.gen7.flags));
1189 	gen7_emit_sampler(sna, GEN7_SAMPLER(op->u.gen7.flags));
1190 	gen7_emit_sf(sna, GEN7_VERTEX(op->u.gen7.flags) >> 2);
1191 	gen7_emit_wm(sna, GEN7_KERNEL(op->u.gen7.flags));
1195 	sna->render_state.gen7.emit_flush = GEN7_READS_DST(op->u.gen7.flags);
1201 	struct gen7_render_state *state = &sna->render_state.gen7;
1360 	ss[5] = (is_scanout || bo->io) ? 0 : sna->render_state.gen7.info->mocs << 16;
1379 	int id = GEN7_VERTEX(op->u.gen7.flags);
1396 	if (sna->kgem.nbatch == sna->render_state.gen7.last_primitive) {
1411 	sna->render_state.gen7.last_primitive = sna->kgem.nbatch;
1417 	int id = 1 << GEN7_VERTEX(op->u.gen7.flags);
1455 			gen7_emit_cc(sna, GEN7_BLEND(op->u.gen7.flags));
1456 			gen7_emit_wm(sna, GEN7_KERNEL(op->u.gen7.flags));
1542 	if (sna->render_state.gen7.needs_invariant)
1579 	    *(uint64_t *)(sna->kgem.batch + sna->render_state.gen7.surface_table) == *(uint64_t*)binding_table &&
1581 	     sna->kgem.batch[sna->render_state.gen7.surface_table+2] == binding_table[2])) {
1583 		offset = sna->render_state.gen7.surface_table;
1586 	if (sna->kgem.batch[sna->render_state.gen7.surface_table] == binding_table[0])
1595 	if (op->floats_per_vertex != sna->render_state.gen7.floats_per_vertex) {
1597 		     sna->render_state.gen7.floats_per_vertex, op->floats_per_vertex));
1599 		sna->render_state.gen7.floats_per_vertex = op->floats_per_vertex;
1948 	tmp.u.gen7.flags =
2642 	tmp->u.gen7.flags =
2876 	tmp->base.u.gen7.flags =
2942 	    *(uint64_t *)(sna->kgem.batch + sna->render_state.gen7.surface_table) == *(uint64_t*)binding_table) {
2944 		offset = sna->render_state.gen7.surface_table;
2947 	if (sna->kgem.batch[sna->render_state.gen7.surface_table] == binding_table[0])
2950 	assert(!GEN7_READS_DST(op->u.gen7.flags));
3143 	tmp.u.gen7.flags = COPY_FLAGS(alu);
3310 	op->base.u.gen7.flags = COPY_FLAGS(alu);
3359 	    *(uint64_t *)(sna->kgem.batch + sna->render_state.gen7.surface_table) == *(uint64_t*)binding_table) {
3362 		offset = sna->render_state.gen7.surface_table;
3365 	if (sna->kgem.batch[sna->render_state.gen7.surface_table] == binding_table[0])
3463 	tmp.u.gen7.flags = FILL_FLAGS(op, format);
3644 	op->base.u.gen7.flags = FILL_FLAGS_NOBLEND;
3728 	tmp.u.gen7.flags = FILL_FLAGS_NOBLEND;
3813 	tmp.u.gen7.flags = FILL_FLAGS_NOBLEND;
3849 	sna->render_state.gen7.pipe_controls_since_stall = 0;
3850 	sna->render_state.gen7.emit_flush = false;
3851 	sna->render_state.gen7.needs_invariant = true;
3852 	sna->render_state.gen7.ve_id = 3 << 2;
3853 	sna->render_state.gen7.last_primitive = -1;
3855 	sna->render_state.gen7.num_sf_outputs = 0;
3856 	sna->render_state.gen7.samplers = -1;
3857 	sna->render_state.gen7.blend = -1;
3858 	sna->render_state.gen7.kernel = -1;
3859 	sna->render_state.gen7.drawrect_offset = -1;
3860 	sna->render_state.gen7.drawrect_limit = -1;
3861 	sna->render_state.gen7.surface_table = 0;
3875 	kgem_bo_destroy(&sna->kgem, sna->render_state.gen7.general_bo);
3896 	struct gen7_render_state *state = &sna->render_state.gen7;
4036 	return sna->render_state.gen7.info->name;