Cross Reference: /xsrc/external/mit/xf86-video-intel/dist/src/sna/gen9

Lines Matching refs:gen9
271 	.name = "Skylake (gen9)",
276 	.name = "Skylake (gen9)",
281 	.name = "Broxton (gen9)",
286 	.name = "Kabylake (gen9)",
291 	.name = "Geminilake (gen9)",
296 	.name = "Coffeelake (gen9)",
582 	OUT_BATCH(sna->render_state.gen9.info->urb.max_vs_entries << URB_ENTRY_NUMBER_SHIFT |
617 				     sna->render_state.gen9.general_bo,
623 				     sna->render_state.gen9.general_bo,
627 	num_pages = sna->render_state.gen9.general_bo->size.pages.count;
984 	sna->render_state.gen9.needs_invariant = false;
990 	struct gen9_render_state *render = &sna->render_state.gen9;
1035 	if (sna->render_state.gen9.samplers == state)
1038 	sna->render_state.gen9.samplers = state;
1044 	OUT_BATCH(sna->render_state.gen9.wm_state + state * 2 * sizeof(struct gen9_sampler_state));
1052 	if (sna->render_state.gen9.num_sf_outputs == num_sf_outputs)
1057 	sna->render_state.gen9.num_sf_outputs = num_sf_outputs;
1078 	if (sna->render_state.gen9.kernel == kernel)
1081 	sna->render_state.gen9.kernel = kernel;
1082 	kernels = sna->render_state.gen9.wm_kernel[kernel];
1113 	if (sna->render_state.gen9.surface_table == offset)
1121 	sna->render_state.gen9.surface_table = offset;
1135 	if (sna->render_state.gen9.drawrect_limit == limit &&
1136 	    sna->render_state.gen9.drawrect_offset == offset)
1139 	sna->render_state.gen9.drawrect_offset = offset;
1140 	sna->render_state.gen9.drawrect_limit = limit;
1159 	struct gen9_render_state *render = &sna->render_state.gen9;
1161 	int id = GEN9_VERTEX(op->u.gen9.flags);
1332 		(sna->render_state.gen9.emit_flush && GEN9_READS_DST(op->u.gen9.flags));
1338 	need_stall = sna->render_state.gen9.surface_table != wm_binding_table;
1364 	gen9_emit_cc(sna, GEN9_BLEND(op->u.gen9.flags));
1365 	gen9_emit_sampler(sna, GEN9_SAMPLER(op->u.gen9.flags));
1366 	gen9_emit_sf(sna, GEN9_VERTEX(op->u.gen9.flags) >> 2);
1367 	gen9_emit_wm(sna, op->u.gen9.wm_kernel);
1371 	sna->render_state.gen9.emit_flush = GEN9_READS_DST(op->u.gen9.flags);
1377 	struct gen9_render_state *state = &sna->render_state.gen9;
1561 	int id = GEN9_VERTEX(op->u.gen9.flags);
1575 	if (sna->kgem.nbatch == sna->render_state.gen9.last_primitive) {
1590 	sna->render_state.gen9.last_primitive = sna->kgem.nbatch;
1591 	sna->render_state.gen9.ve_dirty = false;
1597 	int id = 1 << GEN9_VERTEX(op->u.gen9.flags);
1635 			gen9_emit_cc(sna, GEN9_BLEND(op->u.gen9.flags));
1636 			gen9_emit_wm(sna, op->u.gen9.wm_kernel);
1721 	if (sna->render_state.gen9.needs_invariant)
1758 	    *(uint64_t *)(sna->kgem.batch + sna->render_state.gen9.surface_table) == *(uint64_t*)binding_table &&
1760 	     sna->kgem.batch[sna->render_state.gen9.surface_table+2] == binding_table[2])) {
1762 		offset = sna->render_state.gen9.surface_table;
1765 	if (sna->kgem.batch[sna->render_state.gen9.surface_table] == binding_table[0])
1774 	if (op->floats_per_vertex != sna->render_state.gen9.floats_per_vertex) {
1776 		     sna->render_state.gen9.floats_per_vertex, op->floats_per_vertex));
1778 		sna->render_state.gen9.floats_per_vertex = op->floats_per_vertex;
2558 	tmp->u.gen9.flags =
2567 	tmp->u.gen9.wm_kernel = gen9_choose_composite_kernel(tmp->op,
2793 	tmp->base.u.gen9.flags =
2800 	tmp->base.u.gen9.wm_kernel =
2860 	    *(uint64_t *)(sna->kgem.batch + sna->render_state.gen9.surface_table) == *(uint64_t*)binding_table) {
2862 		offset = sna->render_state.gen9.surface_table;
2865 	if (sna->kgem.batch[sna->render_state.gen9.surface_table] == binding_table[0])
2868 	assert(!GEN9_READS_DST(op->u.gen9.flags));
3063 	tmp.u.gen9.flags = COPY_FLAGS(alu);
3064 	tmp.u.gen9.wm_kernel = GEN9_WM_KERNEL_NOMASK;
3233 	op->base.u.gen9.flags = COPY_FLAGS(alu);
3234 	op->base.u.gen9.wm_kernel = GEN9_WM_KERNEL_NOMASK;
3282 	    *(uint64_t *)(sna->kgem.batch + sna->render_state.gen9.surface_table) == *(uint64_t*)binding_table) {
3284 		offset = sna->render_state.gen9.surface_table;
3287 	if (sna->kgem.batch[sna->render_state.gen9.surface_table] == binding_table[0])
3386 	tmp.u.gen9.flags = FILL_FLAGS(op, format);
3387 	tmp.u.gen9.wm_kernel = GEN9_WM_KERNEL_NOMASK;
3573 	op->base.u.gen9.flags = FILL_FLAGS_NOBLEND;
3574 	op->base.u.gen9.wm_kernel = GEN9_WM_KERNEL_NOMASK;
3659 	tmp.u.gen9.flags = FILL_FLAGS_NOBLEND;
3660 	tmp.u.gen9.wm_kernel = GEN9_WM_KERNEL_NOMASK;
3746 	tmp.u.gen9.flags = FILL_FLAGS_NOBLEND;
3747 	tmp.u.gen9.wm_kernel = GEN9_WM_KERNEL_NOMASK;
3992 	tmp.u.gen9.flags =
3997 	tmp.u.gen9.wm_kernel = select_video_kernel(video, frame);
4077 	sna->render_state.gen9.emit_flush = false;
4078 	sna->render_state.gen9.needs_invariant = true;
4079 	sna->render_state.gen9.ve_id = 3 << 2;
4080 	sna->render_state.gen9.ve_dirty = false;
4081 	sna->render_state.gen9.last_primitive = -1;
4083 	sna->render_state.gen9.num_sf_outputs = 0;
4084 	sna->render_state.gen9.samplers = -1;
4085 	sna->render_state.gen9.blend = -1;
4086 	sna->render_state.gen9.kernel = -1;
4087 	sna->render_state.gen9.drawrect_offset = -1;
4088 	sna->render_state.gen9.drawrect_limit = -1;
4089 	sna->render_state.gen9.surface_table = 0;
4103 	kgem_bo_destroy(&sna->kgem, sna->render_state.gen9.general_bo);
4108 	struct gen9_render_state *state = &sna->render_state.gen9;
4168 			    1 << (sizeof(((struct sna_composite_op *)NULL)->u.gen9.wm_kernel) * 8));
4245 	return sna->render_state.gen9.info->name;