Cross Reference: /xsrc/external/mit/xf86-video-nsc/dist/src/nsc

Lines Matching refs:offset
149 void gfx_write_reg8(unsigned long offset, unsigned char value);
150 void gfx_write_reg16(unsigned long offset, unsigned short value);
151 void gfx_write_reg32(unsigned long offset, unsigned long value);
152 unsigned short gfx_read_reg16(unsigned long offset);
153 unsigned long gfx_read_reg32(unsigned long offset);
154 void gfx_write_vid32(unsigned long offset, unsigned long value);
155 unsigned long gfx_read_vid32(unsigned long offset);
156 unsigned long gfx_read_vip32(unsigned long offset);
157 void gfx_write_vip32(unsigned long offset, unsigned long value);
169 gfx_write_reg8(unsigned long offset, unsigned char value)
171    WRITE_REG8(offset, value);
175 gfx_write_reg16(unsigned long offset, unsigned short value)
177    WRITE_REG16(offset, value);
181 gfx_write_reg32(unsigned long offset, unsigned long value)
183    WRITE_REG32(offset, value);
186 gfx_read_reg16(unsigned long offset)
190    value = READ_REG16(offset);
194 gfx_read_reg32(unsigned long offset)
198    value = READ_REG32(offset);
203 gfx_write_vid32(unsigned long offset, unsigned long value)
205    WRITE_VID32(offset, value);
208 gfx_read_vid32(unsigned long offset)
212    value = READ_VID32(offset);
218 gfx_read_vip32(unsigned long offset)
222    value = READ_VIP32(offset);
227 gfx_write_vip32(unsigned long offset, unsigned long value)
229    WRITE_VIP32(offset, value);
252    unsigned long offset, temp_offset, temp1 = 0, temp2 = 0;
260    offset = (unsigned long)srcy *pitch + ((unsigned long)srcx >> 3);
281    /* The source offset is always 0 since we allow misaligned dword reads. */
300       temp_offset = offset;
327       offset += pitch;