Lines Matching refs:save
2333 static void R128SaveCommonRegisters(ScrnInfoPtr pScrn, R128SavePtr save)
2338 save->ovr_clr = INREG(R128_OVR_CLR);
2339 save->ovr_wid_left_right = INREG(R128_OVR_WID_LEFT_RIGHT);
2340 save->ovr_wid_top_bottom = INREG(R128_OVR_WID_TOP_BOTTOM);
2341 save->ov0_scale_cntl = INREG(R128_OV0_SCALE_CNTL);
2342 save->mpp_tb_config = INREG(R128_MPP_TB_CONFIG);
2343 save->mpp_gp_config = INREG(R128_MPP_GP_CONFIG);
2344 save->subpic_cntl = INREG(R128_SUBPIC_CNTL);
2345 save->viph_control = INREG(R128_VIPH_CONTROL);
2346 save->i2c_cntl_1 = INREG(R128_I2C_CNTL_1);
2347 save->gen_int_cntl = INREG(R128_GEN_INT_CNTL);
2348 save->cap0_trig_cntl = INREG(R128_CAP0_TRIG_CNTL);
2349 save->cap1_trig_cntl = INREG(R128_CAP1_TRIG_CNTL);
2350 save->bus_cntl = INREG(R128_BUS_CNTL);
2351 save->config_cntl = INREG(R128_CONFIG_CNTL);
2355 static void R128SaveCrtcRegisters(ScrnInfoPtr pScrn, R128SavePtr save)
2360 save->crtc_gen_cntl = INREG(R128_CRTC_GEN_CNTL);
2361 save->crtc_ext_cntl = INREG(R128_CRTC_EXT_CNTL);
2362 save->dac_cntl = INREG(R128_DAC_CNTL);
2363 save->crtc_h_total_disp = INREG(R128_CRTC_H_TOTAL_DISP);
2364 save->crtc_h_sync_strt_wid = INREG(R128_CRTC_H_SYNC_STRT_WID);
2365 save->crtc_v_total_disp = INREG(R128_CRTC_V_TOTAL_DISP);
2366 save->crtc_v_sync_strt_wid = INREG(R128_CRTC_V_SYNC_STRT_WID);
2367 save->crtc_offset = INREG(R128_CRTC_OFFSET);
2368 save->crtc_offset_cntl = INREG(R128_CRTC_OFFSET_CNTL);
2369 save->crtc_pitch = INREG(R128_CRTC_PITCH);
2373 static void R128SaveFPRegisters(ScrnInfoPtr pScrn, R128SavePtr save)
2378 save->fp_crtc_h_total_disp = INREG(R128_FP_CRTC_H_TOTAL_DISP);
2379 save->fp_crtc_v_total_disp = INREG(R128_FP_CRTC_V_TOTAL_DISP);
2380 save->fp_gen_cntl = INREG(R128_FP_GEN_CNTL);
2381 save->fp_h_sync_strt_wid = INREG(R128_FP_H_SYNC_STRT_WID);
2382 save->fp_horz_stretch = INREG(R128_FP_HORZ_STRETCH);
2383 save->fp_panel_cntl = INREG(R128_FP_PANEL_CNTL);
2384 save->fp_v_sync_strt_wid = INREG(R128_FP_V_SYNC_STRT_WID);
2385 save->fp_vert_stretch = INREG(R128_FP_VERT_STRETCH);
2386 save->lvds_gen_cntl = INREG(R128_LVDS_GEN_CNTL);
2387 save->tmds_crc = INREG(R128_TMDS_CRC);
2388 save->tmds_transmitter_cntl = INREG(R128_TMDS_TRANSMITTER_CNTL);
2392 static void R128SaveCrtc2Registers(ScrnInfoPtr pScrn, R128SavePtr save)
2397 save->crtc2_gen_cntl = INREG(R128_CRTC2_GEN_CNTL);
2398 save->crtc2_h_total_disp = INREG(R128_CRTC2_H_TOTAL_DISP);
2399 save->crtc2_h_sync_strt_wid = INREG(R128_CRTC2_H_SYNC_STRT_WID);
2400 save->crtc2_v_total_disp = INREG(R128_CRTC2_V_TOTAL_DISP);
2401 save->crtc2_v_sync_strt_wid = INREG(R128_CRTC2_V_SYNC_STRT_WID);
2402 save->crtc2_offset = INREG(R128_CRTC2_OFFSET);
2403 save->crtc2_offset_cntl = INREG(R128_CRTC2_OFFSET_CNTL);
2404 save->crtc2_pitch = INREG(R128_CRTC2_PITCH);
2408 static void R128SavePLLRegisters(ScrnInfoPtr pScrn, R128SavePtr save)
2410 save->ppll_ref_div = INPLL(pScrn, R128_PPLL_REF_DIV);
2411 save->ppll_div_3 = INPLL(pScrn, R128_PPLL_DIV_3);
2412 save->ppll_div_0 = INPLL(pScrn, R128_PPLL_DIV_0);
2413 save->htotal_cntl = INPLL(pScrn, R128_HTOTAL_CNTL);
2417 save->ppll_ref_div,
2418 save->ppll_div_3,
2419 save->htotal_cntl));
2422 save->ppll_ref_div & R128_PPLL_REF_DIV_MASK,
2423 save->ppll_div_3 & R128_PPLL_FB3_DIV_MASK,
2424 (save->ppll_div_3 &
2429 static void R128SavePLL2Registers(ScrnInfoPtr pScrn, R128SavePtr save)
2431 save->p2pll_ref_div = INPLL(pScrn, R128_P2PLL_REF_DIV);
2432 save->p2pll_div_0 = INPLL(pScrn, R128_P2PLL_DIV_0);
2433 save->htotal_cntl2 = INPLL(pScrn, R128_HTOTAL2_CNTL);
2437 save->p2pll_ref_div,
2438 save->p2pll_div_0,
2439 save->htotal_cntl2));
2442 save->p2pll_ref_div & R128_P2PLL_REF_DIV_MASK,
2443 save->p2pll_div_0 & R128_P2PLL_FB0_DIV_MASK,
2444 (save->p2pll_div_0 &
2449 static void R128SaveDDARegisters(ScrnInfoPtr pScrn, R128SavePtr save)
2454 save->dda_config = INREG(R128_DDA_CONFIG);
2455 save->dda_on_off = INREG(R128_DDA_ON_OFF);
2459 static void R128SaveDDA2Registers(ScrnInfoPtr pScrn, R128SavePtr save)
2464 save->dda2_config = INREG(R128_DDA2_CONFIG);
2465 save->dda2_on_off = INREG(R128_DDA2_ON_OFF);
2469 static void R128SavePalette(ScrnInfoPtr pScrn, R128SavePtr save)
2477 for (i = 0; i < 256; i++) save->palette2[i] = INPAL_NEXT();
2480 for (i = 0; i < 256; i++) save->palette[i] = INPAL_NEXT();
2481 save->palette_valid = TRUE;
2485 static void R128SaveMode(ScrnInfoPtr pScrn, R128SavePtr save)
2491 "%s(%p)\n", __func__, save));
2493 R128SaveCommonRegisters(pScrn, save);
2494 R128SaveCrtcRegisters(pScrn, save);
2495 R128SavePLLRegisters(pScrn, save);
2496 R128SaveDDARegisters(pScrn, save);
2498 R128SaveCrtc2Registers(pScrn, save);
2499 R128SavePLL2Registers(pScrn, save);
2500 R128SaveDDA2Registers(pScrn, save);
2503 R128SaveFPRegisters(pScrn, save);
2505 R128SavePalette(pScrn, save);
2508 "%s returns %p\n", __func__, save));
2516 R128SavePtr save = &info->SavedReg;
2547 save->dp_datatype = INREG(R128_DP_DATATYPE);
2548 save->gen_reset_cntl = INREG(R128_GEN_RESET_CNTL);
2549 save->clock_cntl_index = INREG(R128_CLOCK_CNTL_INDEX);
2550 save->amcgpio_en_reg = INREG(R128_AMCGPIO_EN_REG);
2551 save->amcgpio_mask = INREG(R128_AMCGPIO_MASK);
2553 R128SaveMode(pScrn, save);
2621 void R128InitCommonRegisters(R128SavePtr save, R128InfoPtr info)
2623 save->ovr_clr = 0;
2624 save->ovr_wid_left_right = 0;
2625 save->ovr_wid_top_bottom = 0;
2626 save->ov0_scale_cntl = 0;
2627 save->mpp_tb_config = 0;
2628 save->mpp_gp_config = 0;
2629 save->subpic_cntl = 0;
2630 save->viph_control = 0;
2631 save->i2c_cntl_1 = 0;
2633 save->gen_int_cntl = info->gen_int_cntl;
2635 save->gen_int_cntl = 0;
2637 save->cap0_trig_cntl = 0;
2638 save->cap1_trig_cntl = 0;
2639 save->bus_cntl = info->BusCntl;
2643 if (save->bus_cntl & (R128_BUS_WRT_BURST|R128_BUS_READ_BURST))
2644 save->bus_cntl |= R128_BUS_RD_DISCARD_EN | R128_BUS_RD_ABORT_EN;
2648 void R128InitRMXRegisters(R128SavePtr orig, R128SavePtr save,
2657 save->fp_crtc_h_total_disp = save->crtc_h_total_disp;
2658 save->fp_crtc_v_total_disp = save->crtc_v_total_disp;
2659 save->fp_h_sync_strt_wid = save->crtc_h_sync_strt_wid;
2660 save->fp_v_sync_strt_wid = save->crtc_v_sync_strt_wid;
2679 save->fp_horz_stretch =
2685 save->fp_horz_stretch &= ~R128_HORZ_AUTO_RATIO_FIX_EN;
2686 save->fp_horz_stretch &= ~R128_AUTO_HORZ_RATIO;
2688 save->fp_horz_stretch &= ~(R128_HORZ_STRETCH_BLEND | R128_HORZ_STRETCH_ENABLE);
2690 save->fp_horz_stretch |= (R128_HORZ_STRETCH_BLEND | R128_HORZ_STRETCH_ENABLE);
2692 save->fp_vert_stretch =
2697 save->fp_vert_stretch &= ~R128_VERT_AUTO_RATIO_EN;
2699 save->fp_vert_stretch &= ~(R128_VERT_STRETCH_ENABLE | R128_VERT_STRETCH_BLEND);
2701 save->fp_vert_stretch |= (R128_VERT_STRETCH_ENABLE | R128_VERT_STRETCH_BLEND);
2705 void R128InitFPRegisters(R128SavePtr orig, R128SavePtr save, xf86OutputPtr output)
2711 save->fp_gen_cntl = orig->fp_gen_cntl;
2712 save->fp_panel_cntl = orig->fp_panel_cntl;
2713 save->tmds_transmitter_cntl = orig->tmds_transmitter_cntl;
2714 save->tmds_crc = orig->tmds_crc;
2717 save->fp_gen_cntl |= R128_FP_SEL_CRTC2;
2719 save->fp_gen_cntl &= ~R128_FP_SEL_CRTC2;
2721 save->fp_gen_cntl &= ~(R128_FP_CRTC_USE_SHADOW_VEND |
2728 save->fp_gen_cntl |= (R128_FP_CRTC_DONT_SHADOW_VPAR |
2731 save->fp_panel_cntl |= (R128_FP_DIGON | R128_FP_BLON);
2732 save->tmds_transmitter_cntl &= ~R128_TMDS_PLLRST;
2733 save->tmds_transmitter_cntl |= R128_TMDS_PLLEN;
2737 void R128InitLVDSRegisters(R128SavePtr orig, R128SavePtr save, xf86OutputPtr output)
2742 save->lvds_gen_cntl = orig->lvds_gen_cntl;
2745 save->lvds_gen_cntl |= R128_LVDS_SEL_CRTC2;
2747 save->lvds_gen_cntl &= ~R128_LVDS_SEL_CRTC2;
2753 static void R128InitPalette(R128SavePtr save)
2755 save->palette_valid = FALSE;
2950 R128SavePtr save = &info->ModeReg;
2964 R128SavePalette(pScrn, save);