Lines Matching refs:pHWDE
46 /*char I2CAccessBuffer(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl I2CCntl, ULONG DevAddr, ULONG Offset, PUCHAR pBuffer, ULONG ulSize); */
47 char vGetEDIDExtensionBlocks(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2C, PUCHAR pjBuffer, ULONG ulBufferSize);
48 char vGetEnhancedEDIDBlock(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2C, ULONG ulBlockID, ULONG ulBlockTag, PUCHAR pjBuffer, ULONG ulBufferSize);
50 char I2COpen (PXGI_HW_DEVICE_INFO pHWDE,ULONG ulI2CEnable, ULONG ulChannelID, PI2CControl pI2CControl);
51 char I2CAccess(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl);
52 BOOLEAN I2CNull( PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl);
53 BOOLEAN I2CRead(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl);
54 BOOLEAN I2CWrite(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl);
55 BOOLEAN ResetI2C(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl);
56 BOOLEAN I2CRead(PXGI_HW_DEVICE_INFO pHWDE,PI2CControl pI2CControl);
57 BOOLEAN I2CWrite(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl);
58 BOOLEAN ResetI2C(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl);
59 BOOLEAN Ack (PXGI_HW_DEVICE_INFO pHWDE, bool fPut);
60 BOOLEAN NoAck(PXGI_HW_DEVICE_INFO pHWDE);
61 BOOLEAN Start( PXGI_HW_DEVICE_INFO pHWDE);
62 BOOLEAN Stop(PXGI_HW_DEVICE_INFO pHWDE);
63 BOOLEAN WriteUCHARI2C(PXGI_HW_DEVICE_INFO pHWDE, UCHAR cData);
64 BOOLEAN ReadUCHARI2C(PXGI_HW_DEVICE_INFO pHWDE, PUCHAR pBuffer);
67 VOID vWriteClockLineDVI(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data);
68 VOID vWriteDataLineDVI(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data);
69 BOOLEAN bReadClockLineDVI(PXGI_HW_DEVICE_INFO pHWDE);
70 BOOLEAN bReadDataLineDVI(PXGI_HW_DEVICE_INFO pHWDE);
74 VOID vWriteClockLineCRT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data);
75 VOID vWriteDataLineCRT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data);
76 BOOLEAN bReadClockLineCRT(PXGI_HW_DEVICE_INFO pHWDE);
77 BOOLEAN bReadDataLineCRT(PXGI_HW_DEVICE_INFO pHWDE);
80 VOID vWriteClockLineFCNT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data);
81 VOID vWriteDataLineFCNT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data);
82 BOOLEAN bReadClockLineFCNT(PXGI_HW_DEVICE_INFO pHWDE);
83 BOOLEAN bReadDataLineFCNT(PXGI_HW_DEVICE_INFO pHWDE);
86 VOID vWriteClockLine(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data);
87 VOID vWriteDataLine(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data);
88 BOOLEAN bReadClockLine(PXGI_HW_DEVICE_INFO pHWDE);
89 BOOLEAN bReadDataLine(PXGI_HW_DEVICE_INFO pHWDE);
201 char I2CAccessBuffer(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl, ULONG ulDevAddr,
228 I2CAccess(pHWDE, &I2C);
238 I2CAccess(pHWDE, &I2C);
248 I2CAccess(pHWDE, &I2C);
258 I2CAccess(pHWDE, &I2C);
271 I2CAccess(pHWDE, &I2C);
285 I2CAccess(pHWDE, &I2C);
295 I2CAccess(pHWDE, &I2C);
305 I2CAccess(pHWDE, &I2C);
319 I2CAccess(pHWDE, &I2C);
349 // pHWDE - Hardware extension object pointer
362 PXGI_HW_DEVICE_INFO pHWDE,
379 status = I2CAccessBuffer(pHWDE, pI2C, 0xA0, 128, pjBuffer, 128);
399 status = vGetEnhancedEDIDBlock(pHWDE, pI2C, i+1, ulBlockTag, pjBuffer, ulBufferSize);
421 status = vGetEnhancedEDIDBlock(pHWDE, pI2C, 128, ulBlockTag, pjBuffer, ulBufferSize);
435 status = vGetEnhancedEDIDBlock(pHWDE, pI2C, i+128, ulBlockTag, pjBuffer, ulBufferSize);
467 // pHWDE - Hardware extension object pointer
482 PXGI_HW_DEVICE_INFO pHWDE,
501 status = I2CAccessBuffer(pHWDE, pI2C, 0x60, 0, (PUCHAR)&SegmentID, 1);
505 status = I2CAccessBuffer(pHWDE, pI2C, 0xA0, ulOffset, pjBuffer, 128);
531 char I2COpen (PXGI_HW_DEVICE_INFO pHWDE, ULONG ulI2CEnable, ULONG ulChannelID, PI2CControl pI2CControl)
571 char I2CAccess(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl)
584 pHWDE->I2CDelay = (1000000 / pI2CControl->ClockRate) * 10 * 2; /* in 100ns */
585 /* pHWDE->I2CDelay = (1000000 / pI2CControl->ClockRate) * 10; */ /* in 100ns */
586 /* pHWDE->I2CDelay = 100; */
587 /* PDEBUG(ErrorF("I2CAccess()-I2CDelay = %d...\n", pHWDE->I2CDelay)); */
589 /* pHWDE->I2CDelay = 100; */ /* Jong@08032009 */
595 if (I2CNull(pHWDE, pI2CControl) == FALSE) break;
603 if (I2CRead(pHWDE, pI2CControl) == FALSE) break;
610 if (I2CWrite(pHWDE, pI2CControl) == FALSE) break;
622 if (ResetI2C(pHWDE, pI2CControl) == FALSE) break;
648 BOOLEAN I2CNull( PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl)
655 if (Stop(pHWDE) == FALSE) return FALSE;
656 if (Start(pHWDE) == FALSE) return FALSE;
662 if (Start(pHWDE) == FALSE) return FALSE;
668 if (Stop(pHWDE) == FALSE) return FALSE;
686 BOOLEAN I2CRead(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl)
693 if (Stop(pHWDE) == FALSE) return FALSE;
694 if (Start(pHWDE) == FALSE) return FALSE;
700 if (Start(pHWDE) == FALSE) return FALSE;
704 if (ReadUCHARI2C(pHWDE, &pI2CControl->Data) == FALSE)
708 if (NoAck(pHWDE) == FALSE) return FALSE;
712 if (Ack(pHWDE, SEND_ACK) == FALSE) return FALSE;
719 if (Stop(pHWDE) == FALSE) return FALSE;
737 BOOLEAN I2CWrite(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl)
744 if (Stop(pHWDE) == FALSE)
749 if (Start(pHWDE) == FALSE)
760 if (Start(pHWDE) == FALSE)
767 if (WriteUCHARI2C(pHWDE, pI2CControl->Data) == FALSE)
774 if (Ack(pHWDE, RECV_ACK) == FALSE)
783 if (Stop(pHWDE) == FALSE)
803 BOOLEAN ResetI2C(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl)
806 if (Stop(pHWDE) == TRUE) {
829 BOOLEAN Ack (PXGI_HW_DEVICE_INFO pHWDE, bool fPut)
835 delay = pHWDE->I2CDelay / 10 / 2;
838 vWriteDataLine(pHWDE, LODAT);
841 vWriteClockLine(pHWDE, HICLK);
843 if (bReadClockLine(pHWDE) != HICLK) {
848 vWriteClockLine(pHWDE, HICLK);
850 if (bReadClockLine(pHWDE) == HICLK) break;
859 vWriteClockLine(pHWDE, LOCLK);
867 vWriteDataLine(pHWDE, HIDAT);
869 ack = bReadDataLine(pHWDE);
872 vWriteClockLine(pHWDE, HICLK);
874 if (bReadClockLine(pHWDE) != HICLK) {
879 vWriteClockLine(pHWDE, HICLK);
881 if (bReadClockLine(pHWDE) == HICLK) break;
889 status = bReadDataLine(pHWDE);
892 vWriteClockLine(pHWDE, LOCLK);
910 BOOLEAN NoAck(PXGI_HW_DEVICE_INFO pHWDE)
914 delay = pHWDE->I2CDelay / 10 / 2;
916 vWriteDataLine(pHWDE, HIDAT);
919 vWriteClockLine(pHWDE, HICLK);
921 if (bReadClockLine(pHWDE) != HICLK) {
926 vWriteClockLine(pHWDE, HICLK);
928 if (bReadClockLine(pHWDE) == HICLK) break;
936 vWriteClockLine(pHWDE, LOCLK);
953 BOOLEAN Start( PXGI_HW_DEVICE_INFO pHWDE)
957 delay = pHWDE->I2CDelay / 10 / 2;
959 vWriteDataLine(pHWDE, HIDAT);
961 if (bReadDataLine(pHWDE) != HIDAT) {
966 vWriteDataLine(pHWDE, HIDAT);
968 if (bReadDataLine(pHWDE) == HIDAT) break;
976 vWriteClockLine(pHWDE, HICLK);
978 if (bReadClockLine(pHWDE) != HICLK) {
983 vWriteClockLine(pHWDE, HICLK);
985 if (bReadClockLine(pHWDE) == HICLK) break;
993 vWriteDataLine(pHWDE, LODAT);
996 vWriteClockLine(pHWDE, LOCLK);
1012 BOOLEAN Stop(PXGI_HW_DEVICE_INFO pHWDE)
1016 delay = pHWDE->I2CDelay / 10 / 2;
1017 PDEBUGI2C(ErrorF("Stop()-begin-pHWDE->I2CDelay=%d, delay=%d...\n", pHWDE->I2CDelay, delay));
1019 vWriteDataLine(pHWDE, LODAT);
1022 vWriteClockLine(pHWDE, HICLK);
1024 if (bReadClockLine(pHWDE) != HICLK) {
1029 vWriteClockLine(pHWDE, HICLK);
1031 if (bReadClockLine(pHWDE) == HICLK) break;
1039 vWriteDataLine(pHWDE, HIDAT);
1042 return (BOOLEAN)(bReadDataLine(pHWDE) == HIDAT);
1056 BOOLEAN WriteUCHARI2C(PXGI_HW_DEVICE_INFO pHWDE, UCHAR cData)
1062 delay = pHWDE->I2CDelay / 10 / 2;
1067 vWriteDataLine(pHWDE, cData);
1070 vWriteClockLine(pHWDE, HICLK);
1072 if (bReadClockLine(pHWDE) != HICLK) {
1077 vWriteClockLine(pHWDE, HICLK);
1079 if (bReadClockLine(pHWDE) == HICLK) break;
1087 vWriteClockLine(pHWDE, LOCLK);
1103 BOOLEAN ReadUCHARI2C(PXGI_HW_DEVICE_INFO pHWDE, PUCHAR pBuffer)
1107 delay = pHWDE->I2CDelay / 10 / 2;
1109 vWriteDataLine(pHWDE, HIDAT);
1115 vWriteClockLine(pHWDE, HICLK);
1117 if (bReadClockLine(pHWDE) != HICLK) {
1122 vWriteClockLine(pHWDE, HICLK);
1124 if (bReadClockLine(pHWDE) == HICLK) break;
1132 data = bReadDataLine(pHWDE);
1136 vWriteClockLine(pHWDE, LOCLK);
1139 vWriteDataLine(pHWDE, HIDAT);
1176 VOID vWriteClockLineDVI(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data)
1183 if ((pHWDE->jChipType < XG21)&&(pHWDE->jChipType != XG27))
1190 pjI2cIOBase = pHWDE->pjIOAddress + CRTC_ADDRESS_PORT_COLOR;
1196 PDEBUGI2C(ErrorF("*1 - pHWDE->ucI2cDVI = %d\n", pHWDE->ucI2cDVI));
1197 pHWDE->ucI2cDVI = (pHWDE->ucI2cDVI & MASK(1:1)) | SETBITS(data, 0:0);
1198 PDEBUGI2C(ErrorF("*2 - pHWDE->ucI2cDVI = %d\n", pHWDE->ucI2cDVI));
1209 temp = (temp & (~MASK(1:0))) | pHWDE->ucI2cDVI;
1226 VOID vWriteDataLineDVI(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data)
1233 if ((pHWDE->jChipType < XG21)&&(pHWDE->jChipType != XG27))
1240 pjI2cIOBase = pHWDE->pjIOAddress + CRTC_ADDRESS_PORT_COLOR;
1247 PDEBUGI2C(ErrorF("*1 - pHWDE->ucI2cDVI = %d\n", pHWDE->ucI2cDVI));
1248 pHWDE->ucI2cDVI = (pHWDE->ucI2cDVI & MASK(0:0)) | SETBITS(data, 1:1);
1249 PDEBUGI2C(ErrorF("*2 - pHWDE->ucI2cDVI = %d\n", pHWDE->ucI2cDVI));
1261 temp = (temp & (~MASK(1:0))) | pHWDE->ucI2cDVI;
1279 BOOLEAN bReadClockLineDVI(PXGI_HW_DEVICE_INFO pHWDE)
1286 if ((pHWDE->jChipType != XG21)&&(pHWDE->jChipType != XG27))
1293 pjI2cIOBase = pHWDE->pjIOAddress + CRTC_ADDRESS_PORT_COLOR;
1319 BOOLEAN bReadDataLineDVI(PXGI_HW_DEVICE_INFO pHWDE)
1326 if ((pHWDE->jChipType != XG21)&&(pHWDE->jChipType != XG27))
1333 pjI2cIOBase = pHWDE->pjIOAddress + CRTC_ADDRESS_PORT_COLOR;
1359 VOID vWaitForCRT1HsyncActive(PXGI_HW_DEVICE_INFO pHWDE)
1361 XGIIOADDRESS pjPort = pHWDE->pjIOAddress + INPUT_STATUS_1_COLOR;
1399 VOID vWriteClockLineCRT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data)
1402 XGIIOADDRESS pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT;
1408 pHWDE->ucI2cCRT = (pHWDE->ucI2cCRT & MASK(1:1)) | SETBITS(data, 0:0);
1411 temp = (temp & (~MASK(1:0))) | pHWDE->ucI2cCRT;
1414 /* if (pHWDE->bMonitorPoweredOn) */ /* jong@08042009; ignore here */
1418 vWaitForCRT1HsyncActive(pHWDE);
1434 VOID vWriteDataLineCRT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data)
1437 XGIIOADDRESS pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT;
1441 ujSR1F = XGI_GetReg(pHWDE->pjIOAddress + SEQ_ADDRESS_PORT, IND_SR1F_POWER_MANAGEMENT);
1443 pHWDE->ucI2cCRT = (pHWDE->ucI2cCRT & MASK(0:0)) | SETBITS(data, 1:1);
1445 temp = (temp & (~MASK(1:0))) | pHWDE->ucI2cCRT;
1448 /* if (pHWDE->bMonitorPoweredOn) */ /* Jong@08042009; ignore checking */
1452 vWaitForCRT1HsyncActive(pHWDE);
1468 BOOLEAN bReadClockLineCRT(PXGI_HW_DEVICE_INFO pHWDE)
1471 XGIIOADDRESS pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT;
1490 BOOLEAN bReadDataLineCRT(PXGI_HW_DEVICE_INFO pHWDE)
1493 XGIIOADDRESS pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT;
1518 VOID vWriteClockLineFCNT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data)
1521 XGIIOADDRESS pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT;
1525 pHWDE->ucI2cFCNT = (pHWDE->ucI2cFCNT & MASK(3:3)) | SETBITS(data, 2:2);
1528 temp = (temp & (~MASK(3:2))) | pHWDE->ucI2cFCNT;
1542 VOID vWriteDataLineFCNT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data)
1545 XGIIOADDRESS pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT;
1549 pHWDE->ucI2cFCNT = (pHWDE->ucI2cFCNT & MASK(2:2)) | SETBITS(data, 3:3);
1552 temp = (temp & (~MASK(3:2))) | pHWDE->ucI2cFCNT;
1566 BOOLEAN bReadClockLineFCNT(PXGI_HW_DEVICE_INFO pHWDE)
1569 XGIIOADDRESS pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT;
1588 BOOLEAN bReadDataLineFCNT(PXGI_HW_DEVICE_INFO pHWDE)
1591 XGIIOADDRESS pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT;
1602 VOID vWriteClockLine(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data)
1604 if(pHWDE->crtno == 0)
1605 vWriteClockLineCRT(pHWDE, data);
1606 else if(pHWDE->crtno == 1)
1607 vWriteClockLineDVI(pHWDE, data);
1608 else if(pHWDE->crtno == 2)
1609 vWriteClockLineFCNT(pHWDE, data);
1614 VOID vWriteDataLine(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data)
1616 if(pHWDE->crtno == 0)
1617 vWriteDataLineCRT(pHWDE, data);
1618 else if(pHWDE->crtno == 1)
1619 vWriteDataLineDVI(pHWDE, data);
1620 else if(pHWDE->crtno == 2)
1621 vWriteDataLineFCNT(pHWDE, data);
1626 BOOLEAN bReadClockLine(PXGI_HW_DEVICE_INFO pHWDE)
1628 if(pHWDE->crtno == 0)
1629 return(bReadClockLineCRT(pHWDE));
1630 else if(pHWDE->crtno == 1)
1631 return(bReadClockLineDVI(pHWDE));
1632 else if(pHWDE->crtno == 2)
1633 return(bReadClockLineFCNT(pHWDE));
1640 BOOLEAN bReadDataLine(PXGI_HW_DEVICE_INFO pHWDE)
1642 if(pHWDE->crtno == 0)
1643 return(bReadDataLineCRT(pHWDE));
1644 else if(pHWDE->crtno == 1)
1645 return(bReadDataLineDVI(pHWDE));
1646 else if(pHWDE->crtno == 2)
1647 return(bReadDataLineFCNT(pHWDE));
1680 // pHWDE - Hardware extension object pointer
1693 PXGI_HW_DEVICE_INFO pHWDE,
1710 I2CAccessBuffer(pHWDE, pI2C, 0x60, 0, &(pI2C->Data), 0);
1714 I2CAccessBuffer(pHWDE, pI2C, 0x60, 0, &(pI2C->Data), 0);
1717 status = I2CAccessBuffer(pHWDE, pI2C, 0xA0, 0, pjBuffer, 128);
1756 // pHWDE - Hardware extension object pointer
1769 PXGI_HW_DEVICE_INFO pHWDE,
1783 status = I2CAccessBuffer(pHWDE, pI2C, 0xA2, 0, pjBuffer, 256);
1787 status = I2CAccessBuffer(pHWDE, pI2C, 0xA6, 0, pjBuffer, 256);
1816 // pHWDE - Hardware extension object pointer
1829 PXGI_HW_DEVICE_INFO pHWDE,
1849 if (I2COpen(pHWDE, I2C_OPEN, ulChannelID, &I2C) != NO_ERROR)
1860 I2CAccess(pHWDE, &I2C);
1864 I2CAccess(pHWDE, &I2C);
1871 status = vGetEDID_2(pHWDE, &I2C, pjEDIDBuffer, ulBufferSize);
1877 status = vGetEDID_1(pHWDE, &I2C, pjEDIDBuffer, ulBufferSize);
1884 vGetEDIDExtensionBlocks(pHWDE, &I2C, pjEDIDBuffer+128, ulBufferSize-128);
1894 I2COpen(pHWDE, I2C_CLOSE, ulChannelID, &I2C);