PDP-11 Dependent Features
*************************

Options
=======

The PDP-11 version of AS has a rich set of machine dependent options.

Code Generation Options
-----------------------

-mpic | -mno-pic
     Generate position-independent (or position-dependent) code.

     The default is to generate position-independent code.

Instruction Set Extension Options
---------------------------------

These options enables or disables the use of extensions over the base line instruction set as introduced by the first PDP-11 CPU: the KA11. Most options come in two variants: a -mEXTENSION that enables EXTENSION, and a -mno-EXTENSION that disables EXTENSION.

The default is to enable all extensions.

-mall | -mall-extensions
     Enable all instruction set extensions.

-mno-extensions
     Disable all instruction set extensions.

-mcis | -mno-cis
     Enable (or disable) the use of the commercial instruction set, which consists of these instructions: ADDNI, ADDN, ADDPI, ADDP, ASHNI, ASHN, ASHPI, ASHP, CMPCI, CMPC, CMPNI, CMPN, CMPPI, CMPP, CVTLNI, CVTLN, CVTLPI, CVTLP, CVTNLI, CVTNL, CVTNPI, CVTNP, CVTPLI, CVTPL, CVTPNI, CVTPN, DIVPI, DIVP, L2DR, L3DR, LOCCI, LOCC, MATCI, MATC, MOVCI, MOVC, MOVRCI, MOVRC, MOVTCI, MOVTC, MULPI, MULP, SCANCI, SCANC, SKPCI, SKPC, SPANCI, SPANC, SUBNI, SUBN, SUBPI, and SUBP.

-mcsm | -mno-csm
     Enable (or disable) the use of the CSM instruction.

-meis | -mno-eis
     Enable (or disable) the use of the extended instruction set, which consists of these instructions: ASHC, ASH, DIV, MARK, MUL, RTT, SOB SXT, and XOR.

-mfis | -mkev11
-mno-fis | -mno-kev11
     Enable (or disable) the use of the KEV11 floating-point instructions: FADD, FDIV, FMUL, and FSUB.

-mfpp | -mfpu | -mfp-11
-mno-fpp | -mno-fpu | -mno-fp-11
     Enable (or disable) the use of FP-11 floating-point instructions: ABSF, ADDF, CFCC, CLRF, CMPF, DIVF, LDCFF, LDCIF, LDEXP, LDF, LDFPS, MODF, MULF, NEGF, SETD, SETF, SETI, SETL, STCFF, STCFI, STEXP, STF, STFPS, STST, SUBF, and TSTF.

-mlimited-eis | -mno-limited-eis
     Enable (or disable) the use of the limited extended instruction set: MARK, RTT, SOB, SXT, and XOR.

     The -mno-limited-eis options also implies -mno-eis.

-mmfpt | -mno-mfpt
     Enable (or disable) the use of the MFPT instruction.

-mmultiproc | -mno-multiproc
     Enable (or disable) the use of multiprocessor instructions: TSTSET and WRTLCK.

-mmxps | -mno-mxps
     Enable (or disable) the use of the MFPS and MTPS instructions.

-mspl | -mno-spl
     Enable (or disable) the use of the SPL instruction.

     Enable (or disable) the use of the microcode instructions: LDUB, MED, and XFC.

CPU Model Options
-----------------

These options enable the instruction set extensions supported by a particular CPU, and disables all other extensions.

-mka11
     KA11 CPU.  Base line instruction set only.

-mkb11
     KB11 CPU.  Enable extended instruction set and SPL.

-mkd11a
     KD11-A CPU.  Enable limited extended instruction set.

-mkd11b
     KD11-B CPU.  Base line instruction set only.

-mkd11d
     KD11-D CPU.  Base line instruction set only.

-mkd11e
     KD11-E CPU.  Enable extended instruction set, MFPS, and MTPS.

-mkd11f | -mkd11h | -mkd11q
     KD11-F, KD11-H, or KD11-Q CPU.  Enable limited extended instruction set, MFPS, and MTPS.

-mkd11k
     KD11-K CPU.  Enable extended instruction set, LDUB, MED, MFPS, MFPT, MTPS, and XFC.

-mkd11z
     KD11-Z CPU.  Enable extended instruction set, CSM, MFPS, MFPT, MTPS, and SPL.

-mf11
     F11 CPU.  Enable extended instruction set, MFPS, MFPT, and MTPS.

-mj11
     J11 CPU.  Enable extended instruction set, CSM, MFPS, MFPT, MTPS, SPL, TSTSET, and WRTLCK.

-mt11
     T11 CPU.  Enable limited extended instruction set, MFPS, and MTPS.

Machine Model Options
---------------------

These options enable the instruction set extensions supported by a particular machine model, and disables all other extensions.

-m11/03
     Same as -mkd11f.

-m11/04
     Same as -mkd11d.

-m11/05 | -m11/10
     Same as -mkd11b.

-m11/15 | -m11/20
     Same as -mka11.

-m11/21
     Same as -mt11.

-m11/23 | -m11/24
     Same as -mf11.

-m11/34
     Same as -mkd11e.

-m11/34a
     Ame as -mkd11e -mfpp.

-m11/35 | -m11/40
     Same as -mkd11a.

-m11/44
     Same as -mkd11z.

-m11/45 | -m11/50 | -m11/55 | -m11/70
     Same as -mkb11.

-m11/53 | -m11/73 | -m11/83 | -m11/84 | -m11/93 | -m11/94
     Same as -mj11.

-m11/60
     Same as -mkd11k.

Assembler Directives
====================

The PDP-11 version of AS has a few machine dependent assembler directives.

.bss
     Switch to the bss section.

.even
     Align the location counter to an even number.

PDP-11 Assembly Language Syntax
===============================

AS supports both DEC syntax and BSD syntax.  The only difference is that in DEC syntax, a # character is used to denote an immediate constants, while in BSD syntax the character for this purpose is $.

general-purpose registers are named r0 through r7. Mnemonic alternatives for r6 and r7 are sp and pc, respectively.

Floating-point registers are named ac0 through ac3, or alternatively fr0 through fr3.

Comments are started with a # or a / character, and extend to the end of the line.  (FIXME: clash with immediates?)

Instruction Naming
==================

Some instructions have alternative names.

BCC
     BHIS

BCS
     BLO

L2DR
     L2D

L3DR
     L3D

SYS
     TRAP

Synthetic Instructions
======================

The JBR and JCC synthetic instructions are not supported yet.