/* $NetBSD: intr.h,v 1.13 2006/12/21 15:55:23 yamt Exp $ */ /* * * Copyright (c) 1998 NetBSD Foundation, Inc. * All rights reserved. * * This code is derived from software contributed to The NetBSD Foundation * by Minoura Makoto and Jason R. Thorpe. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by The NetBSD Foundation * Inc. and its contributers. * 4. The name of the author may not be used to endorse or promote products * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef _NEWS68K_INTR_H_ #define _NEWS68K_INTR_H_ #include #include #ifdef _KERNEL /* * news68k can handle software interrupts by its own hardware * so has no need to check for any simulated interrupts, etc. */ #define spl0() _spl0() #define spllowersoftclock() spl2() #define IPL_NONE 0 #define IPL_SOFTCLOCK (PSL_S|PSL_IPL2) #define IPL_SOFTNET (PSL_S|PSL_IPL2) #define IPL_BIO (PSL_S|PSL_IPL4) #define IPL_NET (PSL_S|PSL_IPL4) #define IPL_TTY (PSL_S|PSL_IPL5) #define IPL_VM (PSL_S|PSL_IPL5) #define IPL_SERIAL (PSL_S|PSL_IPL5) #define IPL_CLOCK (PSL_S|PSL_IPL6) #define IPL_STATCLOCK IPL_CLOCK #define IPL_SCHED (PSL_S|PSL_IPL7) #define IPL_HIGH (PSL_S|PSL_IPL7) #define IPL_LOCK (PSL_S|PSL_IPL7) typedef int ipl_t; typedef struct { ipl_t _ipl; } ipl_cookie_t; static inline ipl_cookie_t makeiplcookie(ipl_t ipl) { return (ipl_cookie_t){._ipl = ipl}; } static inline int splraiseipl(ipl_cookie_t icookie) { return _splraise(icookie._ipl); } #include static __inline void splx(int sr) { __asm volatile("movw %0,%%sr" : : "di" (sr)); } /* * simulated software interrupt register */ extern u_char ssir; extern volatile u_char *ctrl_int2; #define NSIR (sizeof(ssir) * 8) #define SIR_NET 0 #define SIR_CLOCK 1 #define NEXT_SIR 2 #define siron(x) single_inst_bset_b((ssir), (x)) #define siroff(x) single_inst_bclr_b((ssir), (x)) #define setsoftint(x) do { \ siron(x); \ *ctrl_int2 = 0xff; \ } while (0) #define setsoftnet() setsoftint(1 << SIR_NET) #define setsoftclock() setsoftint(1 << SIR_CLOCK) u_char allocate_sir(void (*)(void *), void *); void init_sir(void); #endif /* _KERNEL */ #endif /* _NEWS68K_INTR_H_ */