1 /* $NetBSD: tcic2_isa.c,v 1.30 2022/09/25 17:09:36 thorpej Exp $ */ 2 3 /* 4 * 5 * Copyright (c) 1998, 1999 Christoph Badura. All rights reserved. 6 * Copyright (c) 1997 Marc Horowitz. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Marc Horowitz. 19 * 4. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #include <sys/cdefs.h> 35 __KERNEL_RCSID(0, "$NetBSD: tcic2_isa.c,v 1.30 2022/09/25 17:09:36 thorpej Exp $"); 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/device.h> 40 #include <sys/extent.h> 41 42 #include <sys/bus.h> 43 #include <sys/intr.h> 44 45 #include <dev/isa/isareg.h> 46 #include <dev/isa/isavar.h> 47 48 #include <dev/pcmcia/pcmciareg.h> 49 #include <dev/pcmcia/pcmciavar.h> 50 #include <dev/pcmcia/pcmciachip.h> 51 52 #include <dev/ic/tcic2reg.h> 53 #include <dev/ic/tcic2var.h> 54 55 /***************************************************************************** 56 * Configurable parameters. 57 *****************************************************************************/ 58 59 #include "opt_tcic_isa_alloc_iobase.h" 60 #include "opt_tcic_isa_alloc_iosize.h" 61 #include "opt_tcic_isa_intr_alloc_mask.h" 62 63 /* 64 * Default I/O allocation range. If both are set to non-zero, these 65 * values will be used instead. Otherwise, the code attempts to probe 66 * the bus width. Systems with 10 address bits should use 0x300 and 0xff. 67 * Systems with 12 address bits (most) should use 0x400 and 0xbff. 68 */ 69 70 #ifndef TCIC_ISA_ALLOC_IOBASE 71 #define TCIC_ISA_ALLOC_IOBASE 0 72 #endif 73 74 #ifndef TCIC_ISA_ALLOC_IOSIZE 75 #define TCIC_ISA_ALLOC_IOSIZE 0 76 #endif 77 78 int tcic_isa_alloc_iobase = TCIC_ISA_ALLOC_IOBASE; 79 int tcic_isa_alloc_iosize = TCIC_ISA_ALLOC_IOSIZE; 80 81 /* 82 * Default IRQ allocation bitmask. This defines the range of allowable 83 * IRQs for PCMCIA slots. Useful if order of probing would screw up other 84 * devices, or if TCIC hardware/cards have trouble with certain interrupt 85 * lines. 86 * 87 * We disable IRQ 10 by default, since some common laptops (namely, the 88 * NEC Versa series) reserve IRQ 10 for the docking station SCSI interface. 89 * 90 * XXX Do we care about this? the Versa doesn't use a tcic. -chb 91 */ 92 93 #ifndef TCIC_ISA_INTR_ALLOC_MASK 94 #define TCIC_ISA_INTR_ALLOC_MASK 0xffff 95 #endif 96 97 int tcic_isa_intr_alloc_mask = TCIC_ISA_INTR_ALLOC_MASK; 98 99 /***************************************************************************** 100 * End of configurable parameters. 101 *****************************************************************************/ 102 103 #ifdef TCICISADEBUG 104 int tcic_isa_debug = 1; 105 #define DPRINTF(arg) if (tcic_isa_debug) printf arg; 106 #else 107 #define DPRINTF(arg) 108 #endif 109 110 int tcic_isa_probe(device_t, cfdata_t, void *); 111 void tcic_isa_attach(device_t, device_t, void *); 112 113 void *tcic_isa_chip_intr_establish(pcmcia_chipset_handle_t, 114 struct pcmcia_function *, int, int (*) (void *), void *); 115 void tcic_isa_chip_intr_disestablish(pcmcia_chipset_handle_t, void *); 116 117 CFATTACH_DECL_NEW(tcic_isa, sizeof(struct tcic_softc), 118 tcic_isa_probe, tcic_isa_attach, NULL, NULL); 119 120 static const struct pcmcia_chip_functions tcic_isa_functions = { 121 tcic_chip_mem_alloc, 122 tcic_chip_mem_free, 123 tcic_chip_mem_map, 124 tcic_chip_mem_unmap, 125 126 tcic_chip_io_alloc, 127 tcic_chip_io_free, 128 tcic_chip_io_map, 129 tcic_chip_io_unmap, 130 131 tcic_isa_chip_intr_establish, 132 tcic_isa_chip_intr_disestablish, 133 134 tcic_chip_socket_enable, 135 tcic_chip_socket_disable, 136 tcic_chip_socket_settype, 137 138 NULL, /* card_detect */ 139 }; 140 141 int 142 tcic_isa_probe(device_t parent, cfdata_t match, void *aux) 143 { 144 struct isa_attach_args *ia = aux; 145 bus_space_tag_t iot = ia->ia_iot; 146 bus_space_handle_t ioh, memh; 147 int val, found, msize; 148 149 if (ia->ia_nio < 1) 150 return (0); 151 if (ia->ia_niomem < 1) 152 return (0); 153 154 if (ISA_DIRECT_CONFIG(ia)) 155 return (0); 156 157 /* Disallow wildcarded i/o address. */ 158 if (ia->ia_io[0].ir_addr == ISA_UNKNOWN_PORT) 159 return (0); 160 if (ia->ia_iomem[0].ir_addr == ISA_UNKNOWN_IOMEM) 161 return (0); 162 163 if (bus_space_map(iot, ia->ia_io[0].ir_addr, TCIC_IOSIZE, 0, &ioh)) 164 return (0); 165 166 if (ia->ia_iomem[0].ir_size == ISA_UNKNOWN_IOSIZ) 167 msize = TCIC_MEMSIZE; 168 else 169 msize = ia->ia_iomem[0].ir_size; 170 171 if (bus_space_map(ia->ia_memt, ia->ia_iomem[0].ir_addr, 172 msize, 0, &memh)) { 173 bus_space_unmap(iot, ioh, TCIC_IOSIZE); 174 return (0); 175 } 176 177 DPRINTF(("tcic probing 0x%03x\n", ia->ia_iomem[0].ir_addr)); 178 found = 0; 179 180 /* 181 * First, check for the reserved bits to be zero. 182 */ 183 if (tcic_check_reserved_bits(iot, ioh)) { 184 DPRINTF(("tcic: reserved bits checked OK\n")); 185 /* Second, check whether the we know how to handle the chip. */ 186 if ((val = tcic_chipid(iot, ioh))) { 187 DPRINTF(("tcic id: 0x%02x\n", val)); 188 if (tcic_chipid_known(val)) 189 found++; 190 } 191 } 192 else { 193 DPRINTF(("tcic: reserved bits didn't check OK\n")); 194 } 195 196 bus_space_unmap(iot, ioh, TCIC_IOSIZE); 197 bus_space_unmap(ia->ia_memt, memh, msize); 198 199 if (!found) 200 return (0); 201 202 ia->ia_nio = 1; 203 ia->ia_io[0].ir_size = TCIC_IOSIZE; 204 205 ia->ia_niomem = 1; 206 ia->ia_iomem[0].ir_size = msize; 207 208 /* IRQ is special. */ 209 210 ia->ia_ndrq = 0; 211 212 return (1); 213 } 214 215 void 216 tcic_isa_attach(device_t parent, device_t self, void *aux) 217 { 218 struct tcic_softc *sc = device_private(self); 219 struct isa_attach_args *ia = aux; 220 isa_chipset_tag_t ic = ia->ia_ic; 221 bus_space_tag_t iot = ia->ia_iot; 222 bus_space_tag_t memt = ia->ia_memt; 223 bus_space_handle_t ioh; 224 bus_space_handle_t memh; 225 226 sc->sc_dev = self; 227 aprint_naive("\n"); 228 229 /* Map i/o space. */ 230 if (bus_space_map(iot, ia->ia_io[0].ir_addr, TCIC_IOSIZE, 0, &ioh)) { 231 aprint_error(": can't map i/o space\n"); 232 return; 233 } 234 235 /* Map mem space. */ 236 if (bus_space_map(memt, ia->ia_iomem[0].ir_addr, 237 ia->ia_iomem[0].ir_size, 0, &memh)) { 238 aprint_error(": can't map mem space\n"); 239 return; 240 } 241 242 sc->membase = ia->ia_iomem[0].ir_addr; 243 sc->subregionmask = 244 (1 << (ia->ia_iomem[0].ir_size / TCIC_MEM_PAGESIZE)) - 1; 245 sc->memsize2 = tcic_log2((u_int)ia->ia_iomem[0].ir_size); 246 247 sc->intr_est = ic; 248 sc->pct = (pcmcia_chipset_tag_t) & tcic_isa_functions; 249 250 sc->iot = iot; 251 sc->ioh = ioh; 252 sc->memt = memt; 253 sc->memh = memh; 254 255 /* 256 * determine chip type and initialise some chip type dependent 257 * parameters in softc. 258 */ 259 sc->chipid = tcic_chipid(iot, ioh); 260 sc->validirqs = tcic_validirqs(sc->chipid); 261 262 /* 263 * allocate an irq. interrupts are relatively 264 * scarce but for TCIC controllers very infrequent. 265 */ 266 267 if (ia->ia_nirq < 1) 268 sc->irq = ISA_UNKNOWN_IRQ; 269 else 270 sc->irq = ia->ia_irq[0].ir_irq; 271 if (sc->irq == ISA_UNKNOWN_IRQ) { 272 if (isa_intr_alloc(ic, 273 sc->validirqs & (tcic_isa_intr_alloc_mask & 0xff00), 274 IST_EDGE, &sc->irq)) { 275 aprint_normal("\n"); 276 aprint_error_dev(self, "can't allocate interrupt\n"); 277 return; 278 } 279 aprint_normal(": using irq %d", sc->irq); 280 } 281 aprint_normal("\n"); 282 283 tcic_attach(sc); 284 285 286 /* 287 * XXX mycroft recommends I/O space range 0x400-0xfff. 288 */ 289 290 /* 291 * XXX some hardware doesn't seem to grok addresses in 0x400 range-- 292 * apparently missing a bit or more of address lines. (e.g. 293 * CIRRUS_PD672X with Linksys EthernetCard ne2000 clone in TI 294 * TravelMate 5000--not clear which is at fault) 295 * 296 * Add a kludge to detect 10 bit wide buses and deal with them, 297 * and also a config file option to override the probe. 298 */ 299 300 #if 0 301 /* 302 * This is what we'd like to use, but... 303 */ 304 sc->iobase = 0x400; 305 sc->iosize = 0xbff; 306 #else 307 /* 308 * ...the above bus width probe doesn't always work. 309 * So, experimentation has shown the following range 310 * to not lose on systems that 0x300-0x3ff loses on 311 * (e.g. the NEC Versa 6030X). 312 */ 313 sc->iobase = 0x330; 314 sc->iosize = 0x0cf; 315 #endif 316 317 DPRINTF(("%s: bus_space_alloc range 0x%04lx-0x%04lx)\n", 318 device_xname(self), (long) sc->iobase, 319 (long) sc->iobase + sc->iosize)); 320 321 if (tcic_isa_alloc_iobase && tcic_isa_alloc_iosize) { 322 sc->iobase = tcic_isa_alloc_iobase; 323 sc->iosize = tcic_isa_alloc_iosize; 324 325 DPRINTF(("%s: bus_space_alloc range 0x%04lx-0x%04lx " 326 "(config override)\n", device_xname(self), 327 (long)sc->iobase, (long)sc->iobase + sc->iosize)); 328 } 329 sc->ih = isa_intr_establish(ic, sc->irq, IST_EDGE, IPL_TTY, 330 tcic_intr, sc); 331 if (sc->ih == NULL) { 332 aprint_error_dev(self, "can't establish interrupt\n"); 333 return; 334 } 335 336 tcic_attach_sockets(sc); 337 } 338 339 void * 340 tcic_isa_chip_intr_establish(pcmcia_chipset_handle_t pch, 341 struct pcmcia_function *pf, int ipl, int (*fct)(void *), void *arg) 342 { 343 struct tcic_handle *h = (struct tcic_handle *) pch; 344 int irq, ist; 345 void *ih; 346 347 DPRINTF(("%s: tcic_isa_chip_intr_establish\n", 348 device_xname(h->sc->sc_dev))); 349 350 /* XXX should we convert level to pulse? -chb */ 351 if (pf->cfe->flags & PCMCIA_CFE_IRQLEVEL) 352 ist = IST_LEVEL; 353 else if (pf->cfe->flags & PCMCIA_CFE_IRQPULSE) 354 ist = IST_PULSE; 355 else 356 ist = IST_LEVEL; 357 358 if (isa_intr_alloc(h->sc->intr_est, 359 h->sc->validirqs & tcic_isa_intr_alloc_mask, ist, &irq)) 360 return (NULL); 361 if ((ih = isa_intr_establish(h->sc->intr_est, irq, ist, ipl, 362 fct, arg)) == NULL) 363 return (NULL); 364 365 DPRINTF(("%s: intr estrablished\n", device_xname(h->sc->sc_dev))); 366 367 h->ih_irq = irq; 368 369 printf("%s: card irq %d\n", device_xname(h->pcmcia), irq); 370 371 return (ih); 372 } 373 374 void 375 tcic_isa_chip_intr_disestablish(pcmcia_chipset_handle_t pch, void *ih) 376 { 377 struct tcic_handle *h = (struct tcic_handle *) pch; 378 int val, reg; 379 380 DPRINTF(("%s: tcic_isa_chip_intr_disestablish\n", 381 device_xname(h->sc->sc_dev))); 382 383 h->ih_irq = 0; 384 385 reg = TCIC_IR_SCF1_N(h->sock); 386 val = tcic_read_ind_2(h, reg); 387 val &= ~TCIC_SCF1_IRQ_MASK; 388 tcic_write_ind_2(h, reg, val); 389 390 isa_intr_disestablish(h->sc->intr_est, ih); 391 } 392
Indexes created Sun Nov 02 07:10:05 GMT 2025