| /src/sys/external/bsd/drm2/dist/drm/i915/gem/ |
| H A D | i915_gem_tiling.c | 60 i915_gem_fence_size(struct drm_i915_private * i915,u32 size,unsigned int tiling,unsigned int stride) argument
100 i915_gem_fence_alignment(struct drm_i915_private * i915,u32 size,unsigned int tiling,unsigned int stride) argument
124 i915_tiling_ok(struct drm_i915_gem_object * obj,unsigned int tiling,unsigned int stride) argument
213 i915_gem_object_set_tiling(struct drm_i915_gem_object * obj,unsigned int tiling,unsigned int stride) argument
[all...] |
| H A D | i915_gem_object.h | 235 i915_gem_tile_height(unsigned int tiling) argument
|
| /src/sys/external/bsd/drm2/dist/drm/i915/ |
| H A D | i915_gem_fence_reg.c | 142 unsigned int tiling = i915_gem_object_get_tiling(vma->obj); local in function:i915_write_fence_reg
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/i915/gem/selftests/ |
| H A D | i915_gem_mman.c | 29 unsigned int tiling; member in struct:tile
309 int tiling; local in function:igt_partial_tiling
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/ |
| H A D | amdgpu_dml1_display_rq_dlg_calc.c | 369 dml1_rq_dlg_get_row_heights(struct display_mode_lib * mode_lib,unsigned int * o_dpte_row_height,unsigned int * o_meta_row_height,unsigned int vp_width,unsigned int data_pitch,int source_format,int tiling,int macro_tile_size,int source_scan,int is_chroma) argument
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/ |
| H A D | amdgpu_display_rq_dlg_calc_20.c | 321 get_meta_and_pte_attr(struct display_mode_lib * mode_lib,display_data_rq_dlg_params_st * rq_dlg_param,display_data_rq_misc_params_st * rq_misc_param,display_data_rq_sizing_params_st * rq_sizing_param,unsigned int vp_width,unsigned int vp_height,unsigned int data_pitch,unsigned int meta_pitch,unsigned int source_format,unsigned int tiling,unsigned int macro_tile_size,unsigned int source_scan,unsigned int is_chroma) argument
|
| H A D | amdgpu_display_rq_dlg_calc_20v2.c | 321 get_meta_and_pte_attr(struct display_mode_lib * mode_lib,display_data_rq_dlg_params_st * rq_dlg_param,display_data_rq_misc_params_st * rq_misc_param,display_data_rq_sizing_params_st * rq_sizing_param,unsigned int vp_width,unsigned int vp_height,unsigned int data_pitch,unsigned int meta_pitch,unsigned int source_format,unsigned int tiling,unsigned int macro_tile_size,unsigned int source_scan,unsigned int is_chroma) argument
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/ |
| H A D | amdgpu_display_rq_dlg_calc_21.c | 307 get_meta_and_pte_attr(struct display_mode_lib * mode_lib,display_data_rq_dlg_params_st * rq_dlg_param,display_data_rq_misc_params_st * rq_misc_param,display_data_rq_sizing_params_st * rq_sizing_param,unsigned int vp_width,unsigned int vp_height,unsigned int data_pitch,unsigned int meta_pitch,unsigned int source_format,unsigned int tiling,unsigned int macro_tile_size,unsigned int source_scan,unsigned int hostvm_enable,unsigned int is_chroma) argument
|
| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| H A D | intel_display_types.h | 617 unsigned int tiling; member in struct:intel_initial_plane_config
|
| H A D | intel_display.c | 10289 u32 val, base, offset __unused, stride_mult, tiling, alpha; local in function:skl_get_initial_plane_config
16937 unsigned int tiling, stride; local in function:intel_framebuffer_init
[all...] |