Searched defs:gfx9_eop_bug_va (Results 1 - 4 of 4) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/
H A Dsi_cmd_buffer.c665 si_cs_emit_write_event_eop(struct radeon_cmdbuf * cs,enum chip_class chip_class,bool is_mec,unsigned event,unsigned event_flags,unsigned data_sel,uint64_t va,uint32_t new_fence,uint64_t gfx9_eop_bug_va) argument
774 si_cs_emit_cache_flush(struct radeon_cmdbuf * cs,enum chip_class chip_class,uint32_t * flush_cnt,uint64_t flush_va,bool is_mec,enum radv_cmd_flush_bits flush_bits,uint64_t gfx9_eop_bug_va) argument
H A Dradv_private.h1137 uint64_t gfx9_eop_bug_va; member in struct:radv_cmd_buffer
/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dsi_cmd_buffer.c838 si_cs_emit_write_event_eop(struct radeon_cmdbuf * cs,enum chip_class chip_class,bool is_mec,unsigned event,unsigned event_flags,unsigned dst_sel,unsigned data_sel,uint64_t va,uint32_t new_fence,uint64_t gfx9_eop_bug_va) argument
962 gfx10_cs_emit_cache_flush(struct radeon_cmdbuf * cs,enum chip_class chip_class,uint32_t * flush_cnt,uint64_t flush_va,bool is_mec,enum radv_cmd_flush_bits flush_bits,enum rgp_flush_bits * sqtt_flush_bits,uint64_t gfx9_eop_bug_va) argument
1138 si_cs_emit_cache_flush(struct radeon_cmdbuf * cs,enum chip_class chip_class,uint32_t * flush_cnt,uint64_t flush_va,bool is_mec,enum radv_cmd_flush_bits flush_bits,enum rgp_flush_bits * sqtt_flush_bits,uint64_t gfx9_eop_bug_va) argument
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H A Dradv_private.h1502 uint64_t gfx9_eop_bug_va; member in struct:radv_cmd_buffer

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