HomeSort by: relevance | last modified time | path
    Searched refs:BB2 (Results 1 - 15 of 15) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Analysis/
PostDominators.cpp 59 const BasicBlock *BB2 = I2->getParent();
61 if (BB1 != BB2)
62 return Base::dominates(BB1, BB2);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsMCInstLower.h 43 MCOperand createSub(MachineBasicBlock *BB1, MachineBasicBlock *BB2,
MipsMCInstLower.cpp 205 MachineBasicBlock *BB2,
208 const MCSymbolRefExpr *Sym2 = MCSymbolRefExpr::create(BB2->getSymbol(), *Ctx);
  /src/external/apache2/llvm/dist/llvm/include/llvm/Transforms/Utils/
SampleProfileLoaderBaseImpl.h 164 /// Two blocks BB1 and BB2 are in the same equivalence class if they
385 /// A block BB2 will be in the same equivalence class as \p BB1 if
388 /// 1- \p BB1 is a descendant of BB2 in the opposite tree. So, if BB2
389 /// is a descendant of \p BB1 in the dominator tree, then BB2 should
392 /// 2- Both BB2 and \p BB1 must be in the same loop.
394 /// For every block BB2 that meets those two requirements, we set BB2's
408 for (const auto *BB2 : Descendants) {
409 bool IsDomParent = DomTree->dominates(BB2, BB1)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Instrumentation/
CFGMST.h 61 // Union BB1 and BB2 into the same group and return true.
62 // Returns false if BB1 and BB2 are already in the same group.
63 bool unionGroups(const BasicBlock *BB1, const BasicBlock *BB2) {
65 BBInfo *BB2G = findAndCompressGroup(&getBBInfo(BB2));
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
ModuloSchedule.h 196 MachineBasicBlock *BB2, MachineBasicBlock *KernelBB,
201 MachineBasicBlock *BB2, MachineBasicBlock *KernelBB,
  /src/external/apache2/llvm/dist/llvm/include/llvm/Analysis/
LoopInfoImpl.h 632 bool compareVectors(std::vector<T> &BB1, std::vector<T> &BB2) {
634 llvm::sort(BB2);
635 return BB1 == BB2;
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/
ConstantHoisting.cpp 343 BasicBlock *BB, *BB1, *BB2;
345 BB2 = BBs.pop_back_val();
346 BB = DT->findNearestCommonDominator(BB1, BB2);
LoopInterchange.cpp 1412 /// Swap instructions between \p BB1 and \p BB2 but keep terminators intact.
1413 static void swapBBContents(BasicBlock *BB1, BasicBlock *BB2) {
1421 // Move instructions from BB2 to BB1.
1422 moveBBContents(BB2, BB1->getTerminator());
1424 // Move instructions from TempInstrs to BB2.
1426 I->insertBefore(BB2->getTerminator());
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
ModuloSchedule.cpp 365 MachineBasicBlock *NewBB, MachineBasicBlock *BB1, MachineBasicBlock *BB2,
554 NewPhi.addReg(PhiOp2).addMBB(BB2);
603 MachineBasicBlock *NewBB, MachineBasicBlock *BB1, MachineBasicBlock *BB2,
645 PhiOp2 = getLoopPhiReg(*InstOp2, BB2);
670 NewPhi.addReg(PhiOp2).addMBB(BB2);
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/
SimplifyCFG.cpp 1379 static bool isSafeToHoistInvoke(BasicBlock *BB1, BasicBlock *BB2,
1384 Value *BB2V = PN.getIncomingValueForBlock(BB2);
1395 /// Given a conditional branch that goes to BB1 and BB2, hoist any common code
1397 /// guarantees that BI's block dominates BB1 and BB2. If EqTermsOnly is given,
1405 // O(M*N) situations here where M and N are the sizes of BB1 and BB2. As
1409 BasicBlock *BB2 = BI->getSuccessor(1); // The false destination
1412 BasicBlock::iterator BB2_Itr = BB2->begin();
1426 (isa<InvokeInst>(I1) && !isSafeToHoistInvoke(BB1, BB2, I1, I2)) ||
1489 BB2->getInstList(), I2);
1541 if (isa<InvokeInst>(I1) && !isSafeToHoistInvoke(BB1, BB2, I1, I2)
    [all...]
  /src/external/apache2/llvm/dist/clang/lib/Analysis/
ThreadSafetyCommon.cpp 917 til::BasicBlock *BB2 = *It ? lookupBlock(*It) : nullptr;
919 auto *Tm = new (Arena) til::Branch(C, BB1, BB2);
  /src/external/gpl3/gcc/dist/libgcc/config/avr/
lib1funcs.S 1265 #define BB2 BB0+2
1288 wmov B2, BB2
1330 #undef BB2
  /src/external/gpl3/gcc.old/dist/libgcc/config/avr/
lib1funcs.S 1260 #define BB2 BB0+2
1283 wmov B2, BB2
1325 #undef BB2
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCMIPeephole.cpp 1105 // If BB1 and BB2 are non-NULL, we also track PHI instruction in BB2
1106 // assuming that the control comes from BB1 into BB2.
1108 MachineBasicBlock *BB2, MachineRegisterInfo *MRI) {
1113 if (BB1 && Inst->getOpcode() == PPC::PHI && Inst->getParent() == BB2) {

Completed in 33 milliseconds