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    Searched refs:CtPop (Results 1 - 4 of 4) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/
InstCombineAndOrXor.cpp 970 // (X != 0) && (ctpop(X) u< 2) --> ctpop(X) == 1
974 match(Cmp1, m_ICmp(Pred1, m_Intrinsic<Intrinsic::ctpop>(m_Specific(X)),
977 Value *CtPop = Cmp1->getOperand(0);
978 return Builder.CreateICmpEQ(CtPop, ConstantInt::get(CtPop->getType(), 1));
980 // (X == 0) || (ctpop(X) u> 1) --> ctpop(X) != 1
982 match(Cmp1, m_ICmp(Pred1, m_Intrinsic<Intrinsic::ctpop>(m_Specific(X)),
985 Value *CtPop = Cmp1->getOperand(0)
    [all...]
InstCombineCompares.cpp 3133 case Intrinsic::ctpop: {
3180 case Intrinsic::ctpop: {
3181 // (ctpop X > BitWidth - 1) --> X == -1
3186 // (ctpop X < BitWidth) --> X != -1
4386 // (A & (A-1)) == 0 --> ctpop(A) < 2 (two commuted variants)
4387 // ((A-1) & A) != 0 --> ctpop(A) > 1 (two commuted variants)
4393 // (A & -A) == A --> ctpop(A) < 2 (four commuted variants)
4394 // (-A & A) != A --> ctpop(A) > 1 (four commuted variants)
4403 CallInst *CtPop = Builder.CreateUnaryIntrinsic(Intrinsic::ctpop, A)
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  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
DAGCombiner.cpp 1663 case ISD::CTPOP: return visitCTPOP(N);
9154 // fold (ctpop c1) -> c2
9156 return DAG.getNode(ISD::CTPOP, SDLoc(N), VT, N0);
11072 SDValue CtPop = Extend->getOperand(0);
11073 if (CtPop.getOpcode() != ISD::CTPOP || !CtPop.hasOneUse())
11078 if (TLI.isOperationLegalOrCustom(ISD::CTPOP, CtPop.getValueType()) ||
11079 !TLI.isOperationLegalOrCustom(ISD::CTPOP, VT)
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  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 526 setOperationAction(ISD::CTPOP, MVT::i32, Custom);
527 setOperationAction(ISD::CTPOP, MVT::i64, Custom);
528 setOperationAction(ISD::CTPOP, MVT::i128, Custom);
1127 setOperationAction(ISD::CTPOP, VT, Custom);
1397 setOperationAction(ISD::CTPOP, VT, Custom);
1466 setOperationAction(ISD::CTPOP, VT, Custom);
3872 // CTPOP only supports integer operands.
4591 case ISD::CTPOP:
6821 SDValue CtPop = DAG.getNode(ISD::CTPOP, DL, MVT::v8i8, Val)
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