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  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/
Float2Int.cpp 213 case Instruction::FNeg:
254 case Instruction::FNeg:
256 assert(Ops.size() == 1 && "FNeg is a unary operator!");
489 case Instruction::FNeg:
SpeculativeExecution.cpp 245 case Instruction::FNeg:
GVNSink.cpp 447 case Instruction::FNeg:
LowerMatrixIntrinsics.cpp 488 case Instruction::FNeg:
1585 case Instruction::FNeg:
GVN.cpp 523 case Instruction::FNeg:
Reassociate.cpp 273 // FIXME: It's not safe to lower a unary FNeg into a FMul by -1.0.
2252 } else if (I->getOpcode() == Instruction::FNeg ||
  /src/external/apache2/llvm/dist/llvm/include/llvm/IR/
Operator.h 386 case Instruction::FNeg:
InstrTypes.h 169 return CreateWithCopiedFlags(Instruction::FNeg, Op, FMFSource, Name,
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/
InstCombineSelect.cpp 2846 // fast-math-flags (nsz) or fsub with +0.0 (not fneg) for this to work. We
2850 // fsub or fneg.
2871 Instruction *FNeg;
2874 match(TrueVal, m_Instruction(FNeg)) &&
2875 FNeg->hasNoNaNs() && FNeg->hasNoSignedZeros() &&
2878 Value *Fabs = Builder.CreateUnaryIntrinsic(Intrinsic::fabs, FalseVal, FNeg);
2886 match(FalseVal, m_Instruction(FNeg)) &&
2887 FNeg->hasNoNaNs() && FNeg->hasNoSignedZeros() &
    [all...]
InstCombineAddSub.cpp 669 createInstPostProc(I, true); // fneg's don't receive instruction numbers.
2125 /// This eliminates floating-point negation in either 'fneg(X)' or
2132 // fneg is assumed better for analysis and cheaper in codegen than fmul/fdiv.
2135 // belief is that the FNeg allows for better reassociation opportunities.
2156 Value *FNeg;
2157 if (!match(&I, m_FNeg(m_Value(FNeg))))
2161 if (match(FNeg, m_OneUse(m_FMul(m_Value(X), m_Value(Y)))))
2164 if (match(FNeg, m_OneUse(m_FDiv(m_Value(X), m_Value(Y)))))
2221 // Subtraction from -0.0 is the canonical form of fneg.
2222 // fsub -0.0, X ==> fneg
    [all...]
InstCombineCalls.cpp 1310 Instruction *FNeg = UnaryOperator::CreateFNeg(NewCall);
1311 FNeg->copyIRFlags(II);
1312 return FNeg;
1392 // fma fneg(x), fneg(y), z -> fma x, y, z
1442 // copysign Mag, -Sign --> fneg (fabs Mag)
1455 // copysign (fneg X), Sign --> copysign X, Sign
1512 Instruction *FNeg = UnaryOperator::CreateFNeg(NewSin);
1513 FNeg->copyFastMathFlags(II);
1514 return FNeg;
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Analysis/
CFLGraph.h 594 case Instruction::FNeg: {
InstructionSimplify.cpp 4768 /// Given the operand for an FNeg, see if we can fold the result. If not, this
4772 if (Constant *C = foldConstant(Instruction::FNeg, Op, Q))
4776 // fneg (fneg X) ==> X
4890 // fsub -0.0, (fneg X) ==> X
4897 // fsub 0.0, (fneg X) ==> X if signed zeros are ignored.
5061 case Instruction::FNeg:
5075 case Instruction::FNeg:
5828 case Instruction::FNeg:
TargetTransformInfo.cpp 1367 case Instruction::FNeg:
  /src/external/apache2/llvm/dist/llvm/include/llvm/Analysis/
TargetTransformInfoImpl.h 987 case Instruction::FNeg: {
992 TTI::OperandValueKind Op2VK = Opcode != Instruction::FNeg ?
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPUCodeGenPrepare.cpp 671 // -1.0 / x -> rcp (fneg x)
672 Value *FNeg = Builder.CreateFNeg(Den);
673 return Builder.CreateCall(Decl, { FNeg });
R600ISelLowering.cpp 1769 // (i32 fp_to_sint (fneg (select_cc f32, f32, 1.0, 0.0 cc))) ->
1775 SDValue FNeg = N->getOperand(0);
1776 if (FNeg.getOpcode() != ISD::FNEG) {
1779 SDValue SelectCC = FNeg.getOperand(0);
  /src/external/apache2/llvm/dist/llvm/lib/AsmParser/
LLLexer.cpp 863 INSTKEYWORD(fneg, FNeg);
  /src/external/apache2/llvm/dist/llvm/lib/IR/
Constants.cpp 1561 case Instruction::FNeg:
2263 case Instruction::FNeg:
2668 "Cannot FNEG a non-floating-point value!");
2669 return get(Instruction::FNeg, C);
3528 case Instruction::FNeg:
Instruction.cpp 334 case FNeg: return "fneg";
ConstantFold.cpp 1067 case Instruction::FNeg:
1084 case Instruction::FNeg:
1226 // -0.0 - undef --> undef (consistent with "fneg undef")
  /src/external/apache2/llvm/dist/llvm/lib/ExecutionEngine/Interpreter/
Execution.cpp 58 llvm_unreachable("Unhandled type for FNeg instruction");
76 case Instruction::FNeg:
84 llvm_unreachable("Unhandled type for FNeg instruction");
93 case Instruction::FNeg: executeFNegInst(R, Src, Ty); break;
  /src/external/apache2/llvm/dist/llvm/lib/Bitcode/Writer/
BitcodeWriter.cpp 536 case Instruction::FNeg: return bitc::UNOP_FNEG;
2570 case Instruction::FNeg: {
2756 case Instruction::FNeg: {
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
FastISel.cpp 1598 /// Emit an FNeg operation.
1604 // If the target has ISD::FNEG, use it.
1606 Register ResultReg = fastEmit_r(VT.getSimpleVT(), VT.getSimpleVT(), ISD::FNEG,
1720 case Instruction::FNeg:
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
TargetLoweringBase.cpp 1754 case FNeg: return ISD::FNEG;

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