Searched refs:JH7110_SYSCLK_SPI1_APB (Results 1 - 3 of 3) sorted by relevance

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
H A Dstarfive,jh7110-crg.h149 #define JH7110_SYSCLK_SPI1_APB 132 macro
/src/sys/arch/riscv/starfive/
H A Djh7110_clkc.c180 #define JH7110_SYSCLK_SPI1_APB 132 macro
590 JH71X0CLKC_GATE(JH7110_SYSCLK_SPI1_APB, "spi1_apb", "apb0"),
/src/sys/external/gpl2/dts/dist/arch/riscv/boot/dts/starfive/
H A Djh7110.dtsi485 clocks = <&syscrg JH7110_SYSCLK_SPI1_APB>,
486 <&syscrg JH7110_SYSCLK_SPI1_APB>;

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