Searched refs:A2_SRC1_CHANNEL_W_SHIFT (Results 1 - 25 of 25) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Di915_program.h116 #define A2_SRC1_CHANNEL_W_SHIFT 24 macro
267 #define UREG_A2_SRC1_SHIFT_RIGHT (A2_SRC1_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
H A Di915_reg.h598 #define A2_SRC1_CHANNEL_W_SHIFT 24 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Di915_program.h116 #define A2_SRC1_CHANNEL_W_SHIFT 24 macro
267 #define UREG_A2_SRC1_SHIFT_RIGHT (A2_SRC1_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
H A Di915_reg.h598 #define A2_SRC1_CHANNEL_W_SHIFT 24 macro
/xsrc/external/mit/xf86-video-intel-old/dist/src/xvmc/
H A Di915_program.h116 #define A2_SRC1_CHANNEL_W_SHIFT 24 macro
269 #define UREG_A2_SRC1_SHIFT_RIGHT (A2_SRC1_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di915_3d.h149 #define A2_SRC1_CHANNEL_W_SHIFT 24 macro
431 A2_SRC1_CHANNEL_W_SHIFT, \
484 A2_SRC1_CHANNEL_W_SHIFT, \
H A Di915_reg.h598 #define A2_SRC1_CHANNEL_W_SHIFT 24 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di915_3d.h149 #define A2_SRC1_CHANNEL_W_SHIFT 24 macro
431 A2_SRC1_CHANNEL_W_SHIFT, \
484 A2_SRC1_CHANNEL_W_SHIFT, \
H A Di915_reg.h598 #define A2_SRC1_CHANNEL_W_SHIFT 24 macro
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/
H A Di915_debug_fp.c237 #define GET_SRC1_REG(r0, r1) ((r0<<8)|(r1>>A2_SRC1_CHANNEL_W_SHIFT))
H A Di915_reg.h484 #define A2_SRC1_CHANNEL_W_SHIFT 24 macro
H A Di915_program.c65 #define UREG_A2_SRC1_SHIFT_RIGHT (A2_SRC1_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/
H A Di915_debug_fp.c240 #define GET_SRC1_REG(r0, r1) ((r0<<8)|(r1>>A2_SRC1_CHANNEL_W_SHIFT))
H A Di915_reg.h484 #define A2_SRC1_CHANNEL_W_SHIFT 24 macro
H A Di915_program.c65 #define UREG_A2_SRC1_SHIFT_RIGHT (A2_SRC1_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen3_render.h601 #define A2_SRC1_CHANNEL_W_SHIFT 24 macro
996 #define A2_SRC1_CHANNEL_W_SHIFT 24 macro
1278 A2_SRC1_CHANNEL_W_SHIFT, \
1331 A2_SRC1_CHANNEL_W_SHIFT, \
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen3_render.h601 #define A2_SRC1_CHANNEL_W_SHIFT 24 macro
996 #define A2_SRC1_CHANNEL_W_SHIFT 24 macro
1278 A2_SRC1_CHANNEL_W_SHIFT, \
1331 A2_SRC1_CHANNEL_W_SHIFT, \
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/i915/
H A Di915_debug_fp.c252 #define GET_SRC1_REG(r0, r1) ((r0<<8)|(r1>>A2_SRC1_CHANNEL_W_SHIFT))
H A Di915_fpc.h177 #define UREG_A2_SRC1_SHIFT_RIGHT (A2_SRC1_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
H A Di915_reg.h612 #define A2_SRC1_CHANNEL_W_SHIFT 24 macro
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/i915/
H A Di915_debug_fp.c188 #define GET_SRC1_REG(r0, r1) ((r0 << 8) | (r1 >> A2_SRC1_CHANNEL_W_SHIFT))
H A Di915_fpc.h168 (A2_SRC1_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
H A Di915_reg.h586 #define A2_SRC1_CHANNEL_W_SHIFT 24 macro
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di915_3d.h331 A2_SRC1_CHANNEL_W_SHIFT;
H A Di915_reg.h621 #define A2_SRC1_CHANNEL_W_SHIFT 24 macro

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