Searched refs:AVIVO_VGA25_PPLL_POST_DIV (Results 1 - 3 of 3) sorted by relevance

/xsrc/external/mit/xf86-video-ati/dist/src/
H A Dradeon_driver.c4949 state->vga25_ppll.post_div = INREG(AVIVO_VGA25_PPLL_POST_DIV);
5366 OUTREG(AVIVO_VGA25_PPLL_POST_DIV, state->vga25_ppll.post_div);
H A Dradeon_reg.h3571 #define AVIVO_VGA25_PPLL_POST_DIV 0x0388 macro
/xsrc/external/mit/xf86-video-ati-kms/dist/src/
H A Dradeon_reg.h3571 #define AVIVO_VGA25_PPLL_POST_DIV 0x0388 macro

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