| /xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/ |
| H A D | intel_state.c | 138 return BLENDFACT_INV_DST_ALPHA;
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| H A D | intel_context.h | 407 #define BLENDFACT_INV_DST_ALPHA 0x08 macro
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| /xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/ |
| H A D | intel_state.c | 138 return BLENDFACT_INV_DST_ALPHA;
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| H A D | intel_context.h | 407 #define BLENDFACT_INV_DST_ALPHA 0x08 macro
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| /xsrc/external/mit/xf86-video-intel-old/dist/src/ |
| H A D | i915_render.c | 60 {1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ONE}, 66 {1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ZERO}, 72 {1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_SRC_ALPHA}, 74 {1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_INV_SRC_ALPHA}, 106 else if (sblend == BLENDFACT_INV_DST_ALPHA) 117 else if (sblend == BLENDFACT_INV_DST_ALPHA)
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| H A D | i915_reg.h | 253 #define BLENDFACT_INV_DST_ALPHA 0x08 macro
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/i915/ |
| H A D | i915_state_inlines.h | 135 return BLENDFACT_INV_DST_ALPHA;
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| H A D | i915_reg.h | 969 #define BLENDFACT_INV_DST_ALPHA 0x08 macro
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| H A D | i915_state_emit.c | 186 else if (srcRGB == BLENDFACT_INV_DST_ALPHA)
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/i915/ |
| H A D | i915_state_inlines.h | 134 return BLENDFACT_INV_DST_ALPHA;
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| H A D | i915_state.c | 109 else if (src == BLENDFACT_INV_DST_ALPHA) 117 else if (dst == BLENDFACT_INV_DST_ALPHA) 131 else if (src == BLENDFACT_INV_DST_ALPHA) 139 else if (dst == BLENDFACT_INV_DST_ALPHA)
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| H A D | i915_reg.h | 935 #define BLENDFACT_INV_DST_ALPHA 0x08 macro
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| /xsrc/external/mit/xf86-video-intel/dist/src/uxa/ |
| H A D | i915_render.c | 62 {1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ONE}, 68 {1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ZERO}, 74 {1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_SRC_ALPHA}, 76 {1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_INV_SRC_ALPHA}, 110 else if (sblend == BLENDFACT_INV_DST_ALPHA) 121 else if (sblend == BLENDFACT_INV_DST_ALPHA)
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| H A D | i915_reg.h | 242 #define BLENDFACT_INV_DST_ALPHA 0x08 macro
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| /xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/ |
| H A D | i915_render.c | 62 {1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ONE}, 68 {1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ZERO}, 74 {1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_SRC_ALPHA}, 76 {1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_INV_SRC_ALPHA}, 110 else if (sblend == BLENDFACT_INV_DST_ALPHA) 121 else if (sblend == BLENDFACT_INV_DST_ALPHA)
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| H A D | i915_reg.h | 242 #define BLENDFACT_INV_DST_ALPHA 0x08 macro
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| /xsrc/external/mit/xf86-video-intel/dist/xvmc/ |
| H A D | i915_reg.h | 242 #define BLENDFACT_INV_DST_ALPHA 0x08 macro
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| /xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/ |
| H A D | i915_reg.h | 242 #define BLENDFACT_INV_DST_ALPHA 0x08 macro
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| /xsrc/external/mit/xf86-video-intel/dist/src/sna/ |
| H A D | gen3_render.h | 245 #define BLENDFACT_INV_DST_ALPHA 0x08 macro
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| H A D | gen3_render.c | 84 /* OverReverse */ {1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ONE}, 87 /* Out */ {1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ZERO}, 90 /* AtopReverse */ {1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_SRC_ALPHA}, 91 /* Xor */ {1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_INV_SRC_ALPHA}, 164 else if (sblend == BLENDFACT_INV_DST_ALPHA) 176 else if (sblend == BLENDFACT_INV_DST_ALPHA)
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| /xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/ |
| H A D | gen3_render.h | 245 #define BLENDFACT_INV_DST_ALPHA 0x08 macro
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| H A D | gen3_render.c | 84 /* OverReverse */ {1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ONE}, 87 /* Out */ {1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ZERO}, 90 /* AtopReverse */ {1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_SRC_ALPHA}, 91 /* Xor */ {1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_INV_SRC_ALPHA}, 164 else if (sblend == BLENDFACT_INV_DST_ALPHA) 176 else if (sblend == BLENDFACT_INV_DST_ALPHA)
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