Searched refs:BLENDFUNC_MASK (Results 1 - 22 of 22) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/
H A Di830_reg.h325 #define BLENDFUNC_MASK 0x3f0000 macro
H A Di915_reg.h246 #define BLENDFUNC_MASK 0x7 macro
H A Di915_state.c292 (BLENDFUNC_MASK << IAB_FUNC_SHIFT) | IAB_ENABLE));
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/
H A Di830_reg.h325 #define BLENDFUNC_MASK 0x3f0000 macro
H A Di915_reg.h246 #define BLENDFUNC_MASK 0x7 macro
H A Di915_state.c292 (BLENDFUNC_MASK << IAB_FUNC_SHIFT) | IAB_ENABLE));
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen2_render.h370 #define BLENDFUNC_MASK 0x3f0000 macro
H A Dgen3_render.h260 #define BLENDFUNC_MASK 0x7 macro
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di830_reg.h447 #define BLENDFUNC_MASK 0x3f0000 macro
H A Di915_reg.h257 #define BLENDFUNC_MASK 0x7 macro
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Di830_reg.h441 #define BLENDFUNC_MASK 0x3f0000 macro
H A Di915_reg.h257 #define BLENDFUNC_MASK 0x7 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen2_render.h370 #define BLENDFUNC_MASK 0x3f0000 macro
H A Dgen3_render.h260 #define BLENDFUNC_MASK 0x7 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di830_reg.h441 #define BLENDFUNC_MASK 0x3f0000 macro
H A Di915_reg.h257 #define BLENDFUNC_MASK 0x7 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Di830_reg.h441 #define BLENDFUNC_MASK 0x3f0000 macro
H A Di915_reg.h257 #define BLENDFUNC_MASK 0x7 macro
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di830_reg.h378 #define BLENDFUNC_MASK 0x3f0000 macro
H A Di915_reg.h268 #define BLENDFUNC_MASK 0x7 macro
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/i915/
H A Di915_reg.h258 #define BLENDFUNC_MASK 0x7 macro
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/i915/
H A Di915_reg.h244 #define BLENDFUNC_MASK 0x7 macro

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