| /xsrc/external/mit/MesaLib/dist/src/intel/compiler/ |
| H A D | test_eu_compact.cpp | 47 case BRW_ALIGN_16:
236 CompactParams{ 50, BRW_ALIGN_1 }, CompactParams{ 50, BRW_ALIGN_16 },
237 CompactParams{ 60, BRW_ALIGN_1 }, CompactParams{ 60, BRW_ALIGN_16 },
238 CompactParams{ 70, BRW_ALIGN_1 }, CompactParams{ 70, BRW_ALIGN_16 },
239 CompactParams{ 75, BRW_ALIGN_1 }, CompactParams{ 75, BRW_ALIGN_16 },
240 CompactParams{ 80, BRW_ALIGN_1 }, CompactParams{ 80, BRW_ALIGN_16 },
241 CompactParams{ 90, BRW_ALIGN_1 }, CompactParams{ 90, BRW_ALIGN_16 },
254 CompactParams{ 50, BRW_ALIGN_1 }, CompactParams{ 50, BRW_ALIGN_16 },
255 CompactParams{ 60, BRW_ALIGN_1 }, CompactParams{ 60, BRW_ALIGN_16 }
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| H A D | brw_clip_util.c | 93 brw_set_default_access_mode(p, BRW_ALIGN_16);
188 brw_set_default_access_mode(p, BRW_ALIGN_16);
230 brw_set_default_access_mode(p, BRW_ALIGN_16);
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| H A D | brw_fs_generator.cpp | 773 brw_set_default_access_mode(p, BRW_ALIGN_16);
1390 brw_set_default_access_mode(p, BRW_ALIGN_16);
1441 brw_set_default_access_mode(p, BRW_ALIGN_16);
1465 brw_set_default_access_mode(p, BRW_ALIGN_16);
2087 brw_set_default_access_mode(p, BRW_ALIGN_16);
2094 brw_set_default_access_mode(p, BRW_ALIGN_16);
2185 brw_set_default_access_mode(p, BRW_ALIGN_16);
2225 brw_set_default_access_mode(p, BRW_ALIGN_16);
2236 brw_set_default_access_mode(p, BRW_ALIGN_16);
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| H A D | brw_vec4_generator.cpp | 70 brw_set_default_access_mode(p, BRW_ALIGN_16);
1975 brw_set_default_access_mode(p, BRW_ALIGN_16);
2017 brw_set_default_access_mode(p, BRW_ALIGN_16);
2029 brw_set_default_access_mode(p, BRW_ALIGN_16);
2052 brw_set_default_access_mode(p, BRW_ALIGN_16);
2074 brw_set_default_access_mode(p, BRW_ALIGN_16);
2115 brw_set_default_access_mode(p, BRW_ALIGN_16);
2297 brw_set_default_access_mode(p, BRW_ALIGN_16);
|
| H A D | brw_eu_validate.c | 378 ERROR_IF(devinfo->ver >= 11 && brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_16,
943 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_16) {
1098 bool is_align16 = brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_16;
1378 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_16)
1936 ERROR_IF(brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_16 &&
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| H A D | test_eu_validate.cpp | 403 brw_set_default_access_mode(p, BRW_ALIGN_16);
567 { BRW_ALIGN_16, devinfo.ver <= 10 },
572 brw_set_default_access_mode(p, BRW_ALIGN_16);
757 brw_set_default_access_mode(p, BRW_ALIGN_16);
808 brw_set_default_access_mode(p, BRW_ALIGN_16);
844 brw_set_default_access_mode(p, BRW_ALIGN_16);
1884 brw_set_default_access_mode(p, BRW_ALIGN_16);
1935 brw_set_default_access_mode(p, BRW_ALIGN_16);
1986 brw_set_default_access_mode(p, BRW_ALIGN_16);
2041 brw_set_default_access_mode(p, BRW_ALIGN_16);
[all...] |
| H A D | brw_clip_unfilled.c | 81 brw_set_default_access_mode(p, BRW_ALIGN_16);
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| H A D | brw_compile_ff_gs.c | 472 brw_set_default_access_mode(p, BRW_ALIGN_16);
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| H A D | brw_eu_emit.c | 629 state->access_mode == BRW_ALIGN_16) {
1044 if (p->current->access_mode == BRW_ALIGN_16) { \
1074 if (p->current->access_mode == BRW_ALIGN_16) { \
1252 const bool align16 = brw_get_default_access_mode(p) == BRW_ALIGN_16;
1302 bool align16 = brw_get_default_access_mode(p) == BRW_ALIGN_16;
|
| /xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/ |
| H A D | brw_clip_util.c | 93 brw_set_default_access_mode(p, BRW_ALIGN_16);
188 brw_set_default_access_mode(p, BRW_ALIGN_16);
230 brw_set_default_access_mode(p, BRW_ALIGN_16);
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| H A D | test_eu_compact.cpp | 295 brw_set_default_access_mode(p, BRW_ALIGN_16);
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| H A D | brw_eu_validate.c | 298 ERROR_IF(devinfo->gen >= 11 && brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_16,
856 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_16) {
1011 bool is_align16 = brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_16;
1291 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_16)
1801 ERROR_IF(brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_16 &&
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| H A D | brw_fs_generator.cpp | 641 brw_set_default_access_mode(p, BRW_ALIGN_16);
1249 brw_set_default_access_mode(p, BRW_ALIGN_16);
1299 brw_set_default_access_mode(p, BRW_ALIGN_16);
1323 brw_set_default_access_mode(p, BRW_ALIGN_16);
1791 brw_set_default_access_mode(p, BRW_ALIGN_16);
1798 brw_set_default_access_mode(p, BRW_ALIGN_16);
1863 brw_set_default_access_mode(p, BRW_ALIGN_16);
1903 brw_set_default_access_mode(p, BRW_ALIGN_16);
1914 brw_set_default_access_mode(p, BRW_ALIGN_16);
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| H A D | brw_vec4_generator.cpp | 69 brw_set_default_access_mode(p, BRW_ALIGN_16);
1919 brw_set_default_access_mode(p, BRW_ALIGN_16);
1961 brw_set_default_access_mode(p, BRW_ALIGN_16);
1973 brw_set_default_access_mode(p, BRW_ALIGN_16);
1996 brw_set_default_access_mode(p, BRW_ALIGN_16);
2018 brw_set_default_access_mode(p, BRW_ALIGN_16);
2060 brw_set_default_access_mode(p, BRW_ALIGN_16);
2208 brw_set_default_access_mode(p, BRW_ALIGN_16);
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| H A D | brw_eu_defines.h | 96 #define BRW_ALIGN_16 1 macro
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| H A D | test_eu_validate.cpp | 364 brw_set_default_access_mode(p, BRW_ALIGN_16);
415 brw_set_default_access_mode(p, BRW_ALIGN_16);
451 brw_set_default_access_mode(p, BRW_ALIGN_16);
1478 brw_set_default_access_mode(p, BRW_ALIGN_16);
1529 brw_set_default_access_mode(p, BRW_ALIGN_16);
1580 brw_set_default_access_mode(p, BRW_ALIGN_16);
1635 brw_set_default_access_mode(p, BRW_ALIGN_16);
2237 brw_set_default_access_mode(p, BRW_ALIGN_16);
|
| H A D | brw_clip_unfilled.c | 81 brw_set_default_access_mode(p, BRW_ALIGN_16);
|
| H A D | brw_eu_emit.c | 591 state->access_mode == BRW_ALIGN_16) {
907 if (p->current->access_mode == BRW_ALIGN_16) { \
937 if (p->current->access_mode == BRW_ALIGN_16) { \
1138 const bool align16 = brw_get_default_access_mode(p) == BRW_ALIGN_16;
1185 bool align16 = brw_get_default_access_mode(p) == BRW_ALIGN_16;
|
| H A D | brw_compile_sf.c | 643 brw_set_default_access_mode(p, BRW_ALIGN_16);
|
| /xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/ |
| H A D | brw_ff_gs_emit.c | 443 brw_set_default_access_mode(p, BRW_ALIGN_16);
|
| /xsrc/external/mit/xf86-video-intel/dist/src/uxa/ |
| H A D | brw_defines.h | 513 #define BRW_ALIGN_16 1 macro
|
| /xsrc/external/mit/xf86-video-intel/dist/xvmc/ |
| H A D | brw_defines.h | 513 #define BRW_ALIGN_16 1 macro
|
| /xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/ |
| H A D | brw_defines.h | 513 #define BRW_ALIGN_16 1 macro
|
| /xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/ |
| H A D | brw_defines.h | 513 #define BRW_ALIGN_16 1 macro
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| /xsrc/external/mit/xf86-video-intel-old/dist/src/ |
| H A D | brw_defines.h | 506 #define BRW_ALIGN_16 1 macro
|