Searched refs:BRW_BLENDFACTOR_INV_SRC_ALPHA (Results 1 - 12 of 12) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/
H A Dbrw_util.c73 return BRW_BLENDFACTOR_INV_SRC_ALPHA;
H A Dbrw_defines.h89 #define BRW_BLENDFACTOR_INV_SRC_ALPHA 0x13 macro
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i965/
H A Dbrw_util.c73 return BRW_BLENDFACTOR_INV_SRC_ALPHA;
H A Dbrw_defines.h89 #define BRW_BLENDFACTOR_INV_SRC_ALPHA 0x13 macro
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di965_render.c77 {0, 1, BRW_BLENDFACTOR_ONE, BRW_BLENDFACTOR_INV_SRC_ALPHA},
87 {0, 1, BRW_BLENDFACTOR_ZERO, BRW_BLENDFACTOR_INV_SRC_ALPHA},
89 {1, 1, BRW_BLENDFACTOR_DST_ALPHA, BRW_BLENDFACTOR_INV_SRC_ALPHA},
93 {1, 1, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_INV_SRC_ALPHA},
144 } else if (*dblend == BRW_BLENDFACTOR_INV_SRC_ALPHA) {
H A Dbrw_defines.h175 #define BRW_BLENDFACTOR_INV_SRC_ALPHA 0x13 macro
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di965_render.c64 {0, 1, BRW_BLENDFACTOR_ONE, BRW_BLENDFACTOR_INV_SRC_ALPHA},
74 {0, 1, BRW_BLENDFACTOR_ZERO, BRW_BLENDFACTOR_INV_SRC_ALPHA},
76 {1, 1, BRW_BLENDFACTOR_DST_ALPHA, BRW_BLENDFACTOR_INV_SRC_ALPHA},
80 {1, 1, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_INV_SRC_ALPHA},
143 } else if (*dblend == BRW_BLENDFACTOR_INV_SRC_ALPHA) {
H A Dbrw_defines.h175 #define BRW_BLENDFACTOR_INV_SRC_ALPHA 0x13 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di965_render.c64 {0, 1, BRW_BLENDFACTOR_ONE, BRW_BLENDFACTOR_INV_SRC_ALPHA},
74 {0, 1, BRW_BLENDFACTOR_ZERO, BRW_BLENDFACTOR_INV_SRC_ALPHA},
76 {1, 1, BRW_BLENDFACTOR_DST_ALPHA, BRW_BLENDFACTOR_INV_SRC_ALPHA},
80 {1, 1, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_INV_SRC_ALPHA},
143 } else if (*dblend == BRW_BLENDFACTOR_INV_SRC_ALPHA) {
H A Dbrw_defines.h175 #define BRW_BLENDFACTOR_INV_SRC_ALPHA 0x13 macro
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Dbrw_defines.h175 #define BRW_BLENDFACTOR_INV_SRC_ALPHA 0x13 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Dbrw_defines.h175 #define BRW_BLENDFACTOR_INV_SRC_ALPHA 0x13 macro

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