Searched refs:BRW_PIPELINE_SELECT (Results 1 - 14 of 14) sorted by relevance
| /xsrc/external/mit/xf86-video-intel/dist/src/uxa/ |
| H A D | i965_reg.h | 43 #define BRW_PIPELINE_SELECT BRW_3D(0, 1, 4) macro
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| H A D | i965_video.c | 903 OUT_BATCH(BRW_PIPELINE_SELECT | PIPELINE_SELECT_3D);
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| H A D | i965_render.c | 1579 OUT_BATCH(BRW_PIPELINE_SELECT | PIPELINE_SELECT_3D);
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| /xsrc/external/mit/xf86-video-intel/dist/xvmc/ |
| H A D | i965_reg.h | 16 #define BRW_PIPELINE_SELECT BRW_3D(0, 1, 4) macro
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| H A D | i965_xvmc.c | 479 OUT_BATCH(BRW_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
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| /xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/ |
| H A D | i965_reg.h | 43 #define BRW_PIPELINE_SELECT BRW_3D(0, 1, 4) macro
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| H A D | i965_video.c | 904 OUT_BATCH(BRW_PIPELINE_SELECT | PIPELINE_SELECT_3D);
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| H A D | i965_render.c | 1579 OUT_BATCH(BRW_PIPELINE_SELECT | PIPELINE_SELECT_3D);
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| /xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/ |
| H A D | i965_reg.h | 16 #define BRW_PIPELINE_SELECT BRW_3D(0, 1, 4) macro
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| H A D | i965_xvmc.c | 479 OUT_BATCH(BRW_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
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| /xsrc/external/mit/xf86-video-intel-old/dist/src/ |
| H A D | i965_video.c | 791 OUT_BATCH(BRW_PIPELINE_SELECT | PIPELINE_SELECT_3D);
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| H A D | i810_reg.h | 2592 #define BRW_PIPELINE_SELECT BRW_3D(0, 1, 4) macro
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| H A D | i965_render.c | 1171 OUT_BATCH(BRW_PIPELINE_SELECT | PIPELINE_SELECT_3D);
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| /xsrc/external/mit/xf86-video-intel-old/dist/src/xvmc/ |
| H A D | i965_xvmc.c | 451 OUT_BATCH(BRW_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
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