Searched refs:BRW_PIPE_CONTROL_CS_STALL (Results 1 - 6 of 6) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Dintel_batchbuffer.c159 OUT_BATCH(BRW_PIPE_CONTROL_CS_STALL |
H A Di965_reg.h326 #define BRW_PIPE_CONTROL_CS_STALL (1 << 20) macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Dintel_batchbuffer.c159 OUT_BATCH(BRW_PIPE_CONTROL_CS_STALL |
H A Di965_reg.h326 #define BRW_PIPE_CONTROL_CS_STALL (1 << 20) macro
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Di965_reg.h299 #define BRW_PIPE_CONTROL_CS_STALL (1 << 20) macro
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Di965_reg.h299 #define BRW_PIPE_CONTROL_CS_STALL (1 << 20) macro

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