Searched refs:CACHE_MODE_1 (Results 1 - 11 of 11) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/intel/vulkan/
H A DgenX_state.c116 anv_pack_struct(&cache_mode_1, GENX(CACHE_MODE_1),
H A Dgen8_cmd_buffer.c142 anv_pack_struct(&cache_mode, GENX(CACHE_MODE_1),
173 /* From the Broadwell PRM Vol. 2c CACHE_MODE_1::NP_PMA_FIX_ENABLE:
264 /* From the Skylake PRM Vol. 2c CACHE_MODE_1::STC PMA Optimization Enable:
/xsrc/external/mit/MesaLib/dist/src/intel/vulkan/
H A DgenX_state.c175 anv_batch_write_reg(&batch, GENX(CACHE_MODE_1), cm1) {
H A Dgfx8_cmd_buffer.c175 anv_pack_struct(&cache_mode, GENX(CACHE_MODE_1),
209 /* From the Broadwell PRM Vol. 2c CACHE_MODE_1::NP_PMA_FIX_ENABLE:
300 /* From the Skylake PRM Vol. 2c CACHE_MODE_1::STC PMA Optimization Enable:
/xsrc/external/mit/xf86-video-intel/dist/src/legacy/i810/
H A Di810_reg.h432 #define CACHE_MODE_1 0x2124 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/legacy/i810/
H A Di810_reg.h432 #define CACHE_MODE_1 0x2124 macro
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di810_reg.h432 #define CACHE_MODE_1 0x2124 macro
H A Di830_debug.c2392 INREG(CACHE_MODE_1));
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/iris/
H A Diris_state.c711 iris_pack_state(GENX(CACHE_MODE_1), &reg_val, reg) {
717 iris_emit_lri(batch, CACHE_MODE_1, reg_val);
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/iris/
H A Diris_state.c1015 iris_emit_reg(batch, GENX(CACHE_MODE_1), reg) {
1549 * - Gfx8 Depth PMA Fix: CACHE_MODE_1::NP_PMA_FIX_ENABLE
1682 iris_emit_reg(batch, GENX(CACHE_MODE_1), reg) {
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/crocus/
H A Dcrocus_state.c1808 * - Gfx8 Depth PMA Fix: CACHE_MODE_1::NP_PMA_FIX_ENABLE
1941 crocus_emit_reg(batch, GENX(CACHE_MODE_1), reg) {

Completed in 62 milliseconds