Searched refs:CX55xx_VIDEO_PCI_44 (Results 1 - 2 of 2) sorted by relevance

/xsrc/external/mit/xf86-video-nsc/dist/src/gfx/
H A Dvid_5530.c936 #define CX55xx_VIDEO_PCI_44 0x80009444 macro
956 reg_val = gfx_pci_config_read(CX55xx_VIDEO_PCI_44);
959 gfx_pci_config_write(CX55xx_VIDEO_PCI_44, reg_val);
962 reg_val = gfx_pci_config_read(CX55xx_VIDEO_PCI_44);
988 reg_val = gfx_pci_config_read(CX55xx_VIDEO_PCI_44);
990 gfx_pci_config_write(CX55xx_VIDEO_PCI_44, reg_val & 0xfffffffe);
993 reg_val = gfx_pci_config_read(CX55xx_VIDEO_PCI_44);
1052 reg_val = gfx_pci_config_read(CX55xx_VIDEO_PCI_44);
/xsrc/external/mit/xf86-video-geode/dist/src/gfx/
H A Dvid_5530.c740 #define CX55xx_VIDEO_PCI_44 0x80009444 macro
760 reg_val = gfx_pci_config_read(CX55xx_VIDEO_PCI_44);
763 gfx_pci_config_write(CX55xx_VIDEO_PCI_44, reg_val);
766 reg_val = gfx_pci_config_read(CX55xx_VIDEO_PCI_44);
792 reg_val = gfx_pci_config_read(CX55xx_VIDEO_PCI_44);
794 gfx_pci_config_write(CX55xx_VIDEO_PCI_44, reg_val & 0xfffffffe);
797 reg_val = gfx_pci_config_read(CX55xx_VIDEO_PCI_44);
961 reg_val = gfx_pci_config_read(CX55xx_VIDEO_PCI_44);

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