Searched refs:DC3_V_SYNC_EVEN (Results 1 - 3 of 3) sorted by relevance

/xsrc/external/mit/xf86-video-geode/dist/src/cim/
H A Dcim_df.c537 vsyncend_even = ((READ_REG32(DC3_V_SYNC_EVEN) >> 16) & 0xFFF) + 1;
1144 vsyncend_even = ((READ_REG32(DC3_V_SYNC_EVEN) >> 16) & 0xFFF) + 1;
1719 vsyncend = ((READ_REG32(DC3_V_SYNC_EVEN) >> 16) & 0xFFF) + 1;
1721 vsyncstart = (READ_REG32(DC3_V_SYNC_EVEN) & 0xFFF) + 1;
2186 vsyncend = ((READ_REG32(DC3_V_SYNC_EVEN) >> 16) & 0xFFF) + 1;
2460 vsyncend = ((READ_REG32(DC3_V_SYNC_EVEN) >> 16) & 0xFFF) + 1;
H A Dcim_vg.c1003 WRITE_REG32(DC3_V_SYNC_EVEN, temp);
1354 sync = READ_REG32(DC3_V_SYNC_EVEN);
2639 vg_state->vsync_even = READ_REG32(DC3_V_SYNC_EVEN);
2799 WRITE_REG32(DC3_V_SYNC_EVEN, vg_state->vsync_even);
H A Dcim_regs.h354 #define DC3_V_SYNC_EVEN 0x000000EC macro

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