Searched refs:DPLLB_LVDS_P2_CLOCK_DIV_7 (Results 1 - 5 of 5) sorted by relevance

/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di830_debug.c330 p2 = val & DPLLB_LVDS_P2_CLOCK_DIV_7 ? 7 : 14;
1052 if (val & DPLLB_LVDS_P2_CLOCK_DIV_7)
H A Di830_display.c1645 dpll |= DPLLB_LVDS_P2_CLOCK_DIV_7;
2230 clock.p2 = dpll & DPLLB_LVDS_P2_CLOCK_DIV_7 ? 7 : 14;
H A Di810_reg.h969 # define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */ macro
/xsrc/external/mit/xf86-video-intel/dist/src/legacy/i810/
H A Di810_reg.h969 # define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */ macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/legacy/i810/
H A Di810_reg.h969 # define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */ macro

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