| /xsrc/external/mit/MesaLib.old/dist/src/mesa/program/ |
| H A D | programopt.c | 90 newInst[i].DstReg.File = PROGRAM_OUTPUT; 91 newInst[i].DstReg.Index = VARYING_SLOT_POS; 92 newInst[i].DstReg.WriteMask = (WRITEMASK_X << i); 161 newInst[0].DstReg.File = PROGRAM_TEMPORARY; 162 newInst[0].DstReg.Index = hposTemp; 163 newInst[0].DstReg.WriteMask = WRITEMASK_XYZW; 173 newInst[i].DstReg.File = PROGRAM_TEMPORARY; 174 newInst[i].DstReg.Index = hposTemp; 175 newInst[i].DstReg.WriteMask = WRITEMASK_XYZW; 188 newInst[3].DstReg [all...] |
| H A D | prog_optimize.c | 79 channel_mask = inst->DstReg.WriteMask & dst_mask; 123 const GLuint mask = mov->DstReg.WriteMask; 224 if (inst->DstReg.File == file) { 225 const GLuint index = inst->DstReg.Index; 227 inst->DstReg.Index = map[index]; 288 if (inst->DstReg.File == PROGRAM_TEMPORARY) { 289 assert(inst->DstReg.Index < REG_ALLOCATE_MAX_PROGRAM_TEMPS); 291 if (inst->DstReg.RelAddr) { 304 if (numDst != 0 && inst->DstReg.File == PROGRAM_TEMPORARY) { 305 GLint chan, index = inst->DstReg [all...] |
| H A D | prog_instruction.c | 53 inst[i].DstReg.File = PROGRAM_UNDEFINED; 54 inst[i].DstReg.WriteMask = WRITEMASK_XYZW; 210 if (inst->DstReg.WriteMask == WRITEMASK_X || 211 inst->DstReg.WriteMask == WRITEMASK_Y || 212 inst->DstReg.WriteMask == WRITEMASK_Z || 213 inst->DstReg.WriteMask == WRITEMASK_W || 214 inst->DstReg.WriteMask == 0x0) { 221 if (inst->SrcReg[i].File == inst->DstReg.File && 222 inst->SrcReg[i].Index == inst->DstReg.Index) { 226 if (inst->DstReg [all...] |
| /xsrc/external/mit/MesaLib/dist/src/mesa/program/ |
| H A D | programopt.c | 90 newInst[i].DstReg.File = PROGRAM_OUTPUT; 91 newInst[i].DstReg.Index = VARYING_SLOT_POS; 92 newInst[i].DstReg.WriteMask = (WRITEMASK_X << i); 161 newInst[0].DstReg.File = PROGRAM_TEMPORARY; 162 newInst[0].DstReg.Index = hposTemp; 163 newInst[0].DstReg.WriteMask = WRITEMASK_XYZW; 173 newInst[i].DstReg.File = PROGRAM_TEMPORARY; 174 newInst[i].DstReg.Index = hposTemp; 175 newInst[i].DstReg.WriteMask = WRITEMASK_XYZW; 188 newInst[3].DstReg [all...] |
| H A D | prog_optimize.c | 79 channel_mask = inst->DstReg.WriteMask & dst_mask; 123 const GLuint mask = mov->DstReg.WriteMask; 224 if (inst->DstReg.File == file) { 225 const GLuint index = inst->DstReg.Index; 227 inst->DstReg.Index = map[index]; 288 if (inst->DstReg.File == PROGRAM_TEMPORARY) { 289 assert(inst->DstReg.Index < REG_ALLOCATE_MAX_PROGRAM_TEMPS); 291 if (inst->DstReg.RelAddr) { 304 if (numDst != 0 && inst->DstReg.File == PROGRAM_TEMPORARY) { 305 GLint chan, index = inst->DstReg [all...] |
| H A D | prog_instruction.c | 55 inst[i].DstReg.File = PROGRAM_UNDEFINED; 56 inst[i].DstReg.WriteMask = WRITEMASK_XYZW; 212 if (inst->DstReg.WriteMask == WRITEMASK_X || 213 inst->DstReg.WriteMask == WRITEMASK_Y || 214 inst->DstReg.WriteMask == WRITEMASK_Z || 215 inst->DstReg.WriteMask == WRITEMASK_W || 216 inst->DstReg.WriteMask == 0x0) { 223 if (inst->SrcReg[i].File == inst->DstReg.File && 224 inst->SrcReg[i].Index == inst->DstReg.Index) { 228 if (inst->DstReg [all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r300/compiler/ |
| H A D | radeon_program_tex.c | 68 inst_mov->U.I.DstReg.File = RC_FILE_TEMPORARY; 69 inst_mov->U.I.DstReg.Index = temp; 90 inst_rcp->U.I.DstReg.File = RC_FILE_TEMPORARY; 91 inst_rcp->U.I.DstReg.Index = temp; 92 inst_rcp->U.I.DstReg.WriteMask = RC_MASK_W; 101 inst_mul->U.I.DstReg.File = RC_FILE_TEMPORARY; 102 inst_mul->U.I.DstReg.Index = temp; 165 struct rc_dst_register output_reg = inst->U.I.DstReg; 171 inst->U.I.DstReg.File = RC_FILE_TEMPORARY; 172 inst->U.I.DstReg [all...] |
| H A D | radeon_compiler.c | 130 if (inst->U.I.DstReg.File == RC_FILE_OUTPUT) 131 c->Program.OutputsWritten |= 1 << inst->U.I.DstReg.Index; 182 if (inst->U.I.DstReg.File == RC_FILE_OUTPUT && inst->U.I.DstReg.Index == output) { 183 inst->U.I.DstReg.Index = new_output; 184 inst->U.I.DstReg.WriteMask &= writemask; 205 if (inst->U.I.DstReg.File == RC_FILE_OUTPUT && inst->U.I.DstReg.Index == output) { 206 inst->U.I.DstReg.File = RC_FILE_TEMPORARY; 207 inst->U.I.DstReg [all...] |
| H A D | radeon_program_alu.c | 45 struct rc_dst_register DstReg, struct rc_src_register SrcReg) 54 fpi->U.I.DstReg = DstReg; 62 struct rc_dst_register DstReg, 72 fpi->U.I.DstReg = DstReg; 81 struct rc_dst_register DstReg, 92 fpi->U.I.DstReg = DstReg; 204 if (inst->U.I.DstReg 42 emit1(struct radeon_compiler * c,struct rc_instruction * after,rc_opcode Opcode,struct rc_sub_instruction * base,struct rc_dst_register DstReg,struct rc_src_register SrcReg) argument 59 emit2(struct radeon_compiler * c,struct rc_instruction * after,rc_opcode Opcode,struct rc_sub_instruction * base,struct rc_dst_register DstReg,struct rc_src_register SrcReg0,struct rc_src_register SrcReg1) argument 78 emit3(struct radeon_compiler * c,struct rc_instruction * after,rc_opcode Opcode,struct rc_sub_instruction * base,struct rc_dst_register DstReg,struct rc_src_register SrcReg0,struct rc_src_register SrcReg1,struct rc_src_register SrcReg2) argument [all...] |
| H A D | radeon_pair_translate.c | 90 *needrgb = (inst->DstReg.WriteMask & RC_MASK_XYZ) ? 1 : 0; 91 *needalpha = (inst->DstReg.WriteMask & RC_MASK_W) ? 1 : 0; 275 inst->DstReg.WriteMask); 284 if (inst->DstReg.File == RC_FILE_OUTPUT) { 285 if (inst->DstReg.Index == c->OutputDepth) { 286 pair->Alpha.DepthWriteMask |= GET_BIT(inst->DstReg.WriteMask, 3); 289 if (inst->DstReg.Index == c->OutputColor[i]) { 293 inst->DstReg.WriteMask & RC_MASK_XYZ; 295 GET_BIT(inst->DstReg.WriteMask, 3); 302 pair->RGB.DestIndex = inst->DstReg [all...] |
| H A D | r3xx_vertprog.c | 194 t_dst_index(vp, &vpi->DstReg), 195 t_dst_mask(vpi->DstReg.WriteMask), 196 t_dst_class(vpi->DstReg.File), 211 t_dst_index(vp, &vpi->DstReg), 212 t_dst_mask(vpi->DstReg.WriteMask), 213 t_dst_class(vpi->DstReg.File), 228 t_dst_index(vp, &vpi->DstReg), 229 t_dst_mask(vpi->DstReg.WriteMask), 230 t_dst_class(vpi->DstReg.File), 246 t_dst_index(vp, &vpi->DstReg), [all...] |
| H A D | radeon_emulate_branches.c | 76 inst_mov->U.I.DstReg.File = RC_FILE_TEMPORARY; 77 inst_mov->U.I.DstReg.Index = rc_find_free_temporary(s->C); 78 inst_mov->U.I.DstReg.WriteMask = RC_MASK_X; 82 inst->U.I.SrcReg[0].Index = inst_mov->U.I.DstReg.Index; 166 inst_mov->U.I.DstReg.File = RC_FILE_TEMPORARY; 167 inst_mov->U.I.DstReg.Index = proxies->Temporary[index].Index; 168 inst_mov->U.I.DstReg.WriteMask = RC_MASK_XYZW; 185 inst_cmp->U.I.DstReg.File = file; 186 inst_cmp->U.I.DstReg.Index = index; 187 inst_cmp->U.I.DstReg [all...] |
| H A D | radeon_vert_fc.c | 130 build_pred_dst(&new_inst->U.I.DstReg, fc_state); 150 build_pred_dst(&new_inst->U.I.DstReg, fc_state); 164 inst->U.I.DstReg.Pred = RC_PRED_INV; 170 inst->U.I.DstReg.Pred = RC_PRED_SET; 173 build_pred_dst(&inst->U.I.DstReg, fc_state); 184 build_pred_dst(&new_inst->U.I.DstReg, fc_state); 213 inst->U.I.DstReg.Pred = RC_PRED_SET; 229 build_pred_dst(&inst->U.I.DstReg, fc_state); 272 build_pred_dst(&inst->U.I.DstReg, &fc_state); 284 build_pred_dst(&inst->U.I.DstReg, [all...] |
| H A D | r3xx_fragprog.c | 61 if (inst->DstReg.File != RC_FILE_OUTPUT || inst->DstReg.Index != c->OutputDepth) 64 if (inst->DstReg.WriteMask & RC_MASK_Z) { 65 inst->DstReg.WriteMask = RC_MASK_W; 67 inst->DstReg.WriteMask = 0;
|
| H A D | radeon_program.h | 79 struct rc_dst_register DstReg; member in struct:rc_sub_instruction
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r300/compiler/ |
| H A D | radeon_program_tex.c | 68 inst_mov->U.I.DstReg.File = RC_FILE_TEMPORARY; 69 inst_mov->U.I.DstReg.Index = temp; 90 inst_rcp->U.I.DstReg.File = RC_FILE_TEMPORARY; 91 inst_rcp->U.I.DstReg.Index = temp; 92 inst_rcp->U.I.DstReg.WriteMask = RC_MASK_W; 101 inst_mul->U.I.DstReg.File = RC_FILE_TEMPORARY; 102 inst_mul->U.I.DstReg.Index = temp; 165 struct rc_dst_register output_reg = inst->U.I.DstReg; 171 inst->U.I.DstReg.File = RC_FILE_TEMPORARY; 172 inst->U.I.DstReg [all...] |
| H A D | radeon_compiler.c | 130 if (inst->U.I.DstReg.File == RC_FILE_OUTPUT) 131 c->Program.OutputsWritten |= 1U << inst->U.I.DstReg.Index; 182 if (inst->U.I.DstReg.File == RC_FILE_OUTPUT && inst->U.I.DstReg.Index == output) { 183 inst->U.I.DstReg.Index = new_output; 184 inst->U.I.DstReg.WriteMask &= writemask; 205 if (inst->U.I.DstReg.File == RC_FILE_OUTPUT && inst->U.I.DstReg.Index == output) { 206 inst->U.I.DstReg.File = RC_FILE_TEMPORARY; 207 inst->U.I.DstReg [all...] |
| H A D | radeon_program_alu.c | 45 struct rc_dst_register DstReg, struct rc_src_register SrcReg) 54 fpi->U.I.DstReg = DstReg; 62 struct rc_dst_register DstReg, 72 fpi->U.I.DstReg = DstReg; 81 struct rc_dst_register DstReg, 92 fpi->U.I.DstReg = DstReg; 204 if (inst->U.I.DstReg 42 emit1(struct radeon_compiler * c,struct rc_instruction * after,rc_opcode Opcode,struct rc_sub_instruction * base,struct rc_dst_register DstReg,struct rc_src_register SrcReg) argument 59 emit2(struct radeon_compiler * c,struct rc_instruction * after,rc_opcode Opcode,struct rc_sub_instruction * base,struct rc_dst_register DstReg,struct rc_src_register SrcReg0,struct rc_src_register SrcReg1) argument 78 emit3(struct radeon_compiler * c,struct rc_instruction * after,rc_opcode Opcode,struct rc_sub_instruction * base,struct rc_dst_register DstReg,struct rc_src_register SrcReg0,struct rc_src_register SrcReg1,struct rc_src_register SrcReg2) argument [all...] |
| H A D | radeon_pair_translate.c | 92 *needrgb = (inst->DstReg.WriteMask & RC_MASK_XYZ) ? 1 : 0; 93 *needalpha = (inst->DstReg.WriteMask & RC_MASK_W) ? 1 : 0; 277 inst->DstReg.WriteMask); 286 if (inst->DstReg.File == RC_FILE_OUTPUT) { 287 if (inst->DstReg.Index == c->OutputDepth) { 288 pair->Alpha.DepthWriteMask |= GET_BIT(inst->DstReg.WriteMask, 3); 291 if (inst->DstReg.Index == c->OutputColor[i]) { 295 inst->DstReg.WriteMask & RC_MASK_XYZ; 297 GET_BIT(inst->DstReg.WriteMask, 3); 304 pair->RGB.DestIndex = inst->DstReg [all...] |
| H A D | r3xx_vertprog.c | 197 t_dst_index(vp, &vpi->DstReg), 198 t_dst_mask(vpi->DstReg.WriteMask), 199 t_dst_class(vpi->DstReg.File), 214 t_dst_index(vp, &vpi->DstReg), 215 t_dst_mask(vpi->DstReg.WriteMask), 216 t_dst_class(vpi->DstReg.File), 231 t_dst_index(vp, &vpi->DstReg), 232 t_dst_mask(vpi->DstReg.WriteMask), 233 t_dst_class(vpi->DstReg.File), 249 t_dst_index(vp, &vpi->DstReg), [all...] |
| H A D | radeon_emulate_branches.c | 76 inst_mov->U.I.DstReg.File = RC_FILE_TEMPORARY; 77 inst_mov->U.I.DstReg.Index = rc_find_free_temporary(s->C); 78 inst_mov->U.I.DstReg.WriteMask = RC_MASK_X; 82 inst->U.I.SrcReg[0].Index = inst_mov->U.I.DstReg.Index; 166 inst_mov->U.I.DstReg.File = RC_FILE_TEMPORARY; 167 inst_mov->U.I.DstReg.Index = proxies->Temporary[index].Index; 168 inst_mov->U.I.DstReg.WriteMask = RC_MASK_XYZW; 185 inst_cmp->U.I.DstReg.File = file; 186 inst_cmp->U.I.DstReg.Index = index; 187 inst_cmp->U.I.DstReg [all...] |
| H A D | radeon_vert_fc.c | 130 build_pred_dst(&new_inst->U.I.DstReg, fc_state); 150 build_pred_dst(&new_inst->U.I.DstReg, fc_state); 164 inst->U.I.DstReg.Pred = RC_PRED_INV; 170 inst->U.I.DstReg.Pred = RC_PRED_SET; 173 build_pred_dst(&inst->U.I.DstReg, fc_state); 184 build_pred_dst(&new_inst->U.I.DstReg, fc_state); 213 inst->U.I.DstReg.Pred = RC_PRED_SET; 229 build_pred_dst(&inst->U.I.DstReg, fc_state); 272 build_pred_dst(&inst->U.I.DstReg, &fc_state); 284 build_pred_dst(&inst->U.I.DstReg, [all...] |
| H A D | r3xx_fragprog.c | 61 if (inst->DstReg.File != RC_FILE_OUTPUT || inst->DstReg.Index != c->OutputDepth) 64 if (inst->DstReg.WriteMask & RC_MASK_Z) { 65 inst->DstReg.WriteMask = RC_MASK_W; 67 inst->DstReg.WriteMask = 0;
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r300/compiler/tests/ |
| H A D | rc_test_helpers.c | 289 inst->U.I.DstReg.File = RC_FILE_TEMPORARY; 291 inst->U.I.DstReg.File = RC_FILE_OUTPUT; 293 inst->U.I.DstReg.File = RC_FILE_NONE; 302 inst->U.I.DstReg.Index = strtol(tokens.Index.String, NULL, 10); 311 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW; 313 inst->U.I.DstReg.WriteMask = 0; 322 inst->U.I.DstReg.WriteMask |= RC_MASK_X; 325 inst->U.I.DstReg.WriteMask |= RC_MASK_Y; 328 inst->U.I.DstReg.WriteMask |= RC_MASK_Z; 331 inst->U.I.DstReg [all...] |
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r300/compiler/tests/ |
| H A D | rc_test_helpers.c | 289 inst->U.I.DstReg.File = RC_FILE_TEMPORARY; 291 inst->U.I.DstReg.File = RC_FILE_OUTPUT; 293 inst->U.I.DstReg.File = RC_FILE_NONE; 302 inst->U.I.DstReg.Index = strtol(tokens.Index.String, NULL, 10); 311 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW; 313 inst->U.I.DstReg.WriteMask = 0; 322 inst->U.I.DstReg.WriteMask |= RC_MASK_X; 325 inst->U.I.DstReg.WriteMask |= RC_MASK_Y; 328 inst->U.I.DstReg.WriteMask |= RC_MASK_Z; 331 inst->U.I.DstReg [all...] |