Searched refs:ENABLE_TEX_CACHE (Results 1 - 19 of 19) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di830_3d.c194 ENABLE_TEX_CACHE |
H A Di830_reg.h233 #define ENABLE_TEX_CACHE ((1<<17)|(1<<16)) macro
H A Di830_render.c637 DISABLE_STENCIL_WRITE | ENABLE_TEX_CACHE |
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di830_3d.c194 ENABLE_TEX_CACHE |
H A Di830_reg.h227 #define ENABLE_TEX_CACHE ((1<<17)|(1<<16)) macro
H A Di830_render.c637 DISABLE_STENCIL_WRITE | ENABLE_TEX_CACHE |
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di830_3d.c211 ENABLE_TEX_CACHE |
H A Di830_reg.h163 #define ENABLE_TEX_CACHE ((1<<17)|(1<<16)) macro
H A Di830_render.c587 DISABLE_STENCIL_WRITE | ENABLE_TEX_CACHE |
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/
H A Di830_reg.h134 #define ENABLE_TEX_CACHE ((1<<17)|(1<<16)) macro
H A Di830_state.c967 ENABLE_TEX_CACHE |
979 ENABLE_TEX_CACHE |
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/
H A Di830_reg.h134 #define ENABLE_TEX_CACHE ((1<<17)|(1<<16)) macro
H A Di830_state.c967 ENABLE_TEX_CACHE |
979 ENABLE_TEX_CACHE |
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen2_render.h156 #define ENABLE_TEX_CACHE ((1<<17)|(1<<16)) macro
H A Dgen2_render.c532 ENABLE_TEX_CACHE);
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Di830_reg.h227 #define ENABLE_TEX_CACHE ((1<<17)|(1<<16)) macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen2_render.h156 #define ENABLE_TEX_CACHE ((1<<17)|(1<<16)) macro
H A Dgen2_render.c529 ENABLE_TEX_CACHE);
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Di830_reg.h227 #define ENABLE_TEX_CACHE ((1<<17)|(1<<16)) macro

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