| /xsrc/external/mit/xf86-video-sis/dist/src/ |
| H A D | sis_memcpy.c | 53 #define FENCE \ macro
914 PREFETCH_FUNC(SiS_sse,SSE,SSE,,FENCE,small_memcpy_i386)
1019 PREFETCH_FUNC(SiS_sse,SSE64,SSE,,FENCE,small_memcpy_amd64)
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| /xsrc/external/mit/xf86-video-openchrome/dist/src/ |
| H A D | via_memcpy.c | 38 #define FENCE __asm__ __volatile__ ("sfence":::"memory"); macro
414 PREFETCH_FUNC(sse, SSE, SSE,, FENCE)
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| /xsrc/external/mit/xf86-video-xgi/dist/src/ |
| H A D | xgi_memcpy.c | 85 #define FENCE \ macro
1026 PREFETCH_FUNC(XGI_sse,SSE,SSE,,FENCE,small_memcpy_i386)
1135 PREFETCH_FUNC(XGI_sse,SSE64,SSE,,FENCE,small_memcpy_amd64)
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/nv50/ |
| H A D | nv50_context.c | 374 BCTX_REFN_bo(nv50->bufctx, FENCE, flags, screen->fence.bo);
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/nvc0/ |
| H A D | nvc0_context.c | 472 BCTX_REFN_bo(nvc0->bufctx, FENCE, flags, screen->fence.bo);
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/nv50/ |
| H A D | nv50_context.c | 402 BCTX_REFN_bo(nv50->bufctx, FENCE, flags, screen->fence.bo);
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/nvc0/ |
| H A D | nvc0_context.c | 528 BCTX_REFN_bo(nvc0->bufctx, FENCE, flags, screen->fence.bo);
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| /xsrc/external/mit/xf86-video-intel-old/dist/src/ |
| H A D | i830_memory.c | 1522 OUTREG(FENCE + fence_nr * 4, val);
1537 OUTREG(FENCE + fence_nr * 4, 0);
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| H A D | i810_driver.c | 1123 i810Reg->Fence[i] = INREG(FENCE + i * 4);
1361 OUTREG(FENCE + i * 4, i810Reg->Fence[i]);
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| H A D | i810_reg.h | 556 #define FENCE 0x2000 macro
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| H A D | i830_debug.c | 830 { FENCE+i*4, "FENCE " #i, i810_debug_915_fence, 0 }
832 { FENCE_NEW+(i - 8) * 4, "FENCE " #i, i810_debug_915_fence, 0 }
852 { FENCE_NEW+i*8, "FENCE START " #i, i810_debug_965_fence_start, 0 }, \
853 { FENCE_NEW+i*8+4, "FENCE END " #i, i810_debug_965_fence_end, 0 }
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| /xsrc/external/mit/xf86-video-intel/dist/src/legacy/i810/ |
| H A D | i810_driver.c | 776 i810Reg->Fence[i] = INREG(FENCE + i * 4);
1014 OUTREG(FENCE + i * 4, i810Reg->Fence[i]);
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| H A D | i810_reg.h | 556 #define FENCE 0x2000 macro
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| /xsrc/external/mit/xf86-video-intel-2014/dist/src/legacy/i810/ |
| H A D | i810_driver.c | 776 i810Reg->Fence[i] = INREG(FENCE + i * 4);
1014 OUTREG(FENCE + i * 4, i810Reg->Fence[i]);
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| H A D | i810_reg.h | 556 #define FENCE 0x2000 macro
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| /xsrc/external/mit/MesaLib.old/dist/src/freedreno/ir3/ |
| H A D | ir3.h | 1397 INSTR0(FENCE)
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/ |
| H A D | si_debug.c | 508 ITEM(FENCE),
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/ |
| H A D | si_debug.c | 505 ITEM(FENCE),
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| /xsrc/external/mit/MesaLib/dist/src/freedreno/ir3/ |
| H A D | ir3.h | 2208 INSTR0(FENCE)
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| /xsrc/external/mit/MesaLib/dist/docs/relnotes/ |
| H A D | 19.1.0.rst | 3717 - winsys/amdgpu: reorder chunks, make BO_HANDLES first, IB and FENCE
|