Searched refs:FMA (Results 1 - 24 of 24) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/panfrost/bifrost/
H A Ddisassemble.c333 // the ADD/FMA units are writing to
357 printf("port 2: R%d (write FMA) ", srcs.reg2);
362 printf("port 3: R%d (write FMA) ", srcs.reg3);
450 printf("T"); // i.e. the output of FMA this cycle
535 { 0x00000, "FMA.f32", FMA_FMA },
601 { 0x80000, "FMA.v2f16", FMA_FMA16 },
690 // These instructions in the FMA slot, together with LSHIFT_ADD_HIGH32.i32
700 // FMA to ADD instead of being passed explicitly. Hence, these two must be
893 printf("# FMA: %016" PRIx64 "\n", word);
895 struct bifrost_fma_inst FMA; local in function:dump_fma
[all...]
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/swr/rasterizer/common/
H A Dsimdlib_128_avx2.inl33 // Also, add native support for FMA operations
H A Disa.hpp59 bool FMA(void) { return CPU_Rep.f_1_ECX_[12]; } function in class:InstructionSet
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/swr/rasterizer/common/
H A Dsimdlib_128_avx2.inl33 // Also, add native support for FMA operations
H A Disa.hpp59 bool FMA(void) { return CPU_Rep.f_1_ECX_[12]; } function in class:InstructionSet
/xsrc/external/mit/MesaLib/dist/docs/relnotes/
H A D20.1.8.rst89 - Revert "ac: generate FMA for inexact instructions for radeonsi"
H A D17.0.3.rst104 - nvc0/ir: treat FMA like MAD for operand propagation
H A D18.2.5.rst114 - glsl_to_tgsi: don't create 64-bit integer MAD/FMA
H A D20.1.0.rst373 - pan/bi: Move notes on FMA opcodes from disassembler
378 - pan/bi: Identify extended FMA opcodes
522 - pan/bi: Implement FMA/MOV without modifiers
564 - pan/bi: Finish FMA structures
567 - pan/bi: Pack outmod and roundmode with FMA
568 - pan/bi: Expand out FMA conversion opcodes
570 - pan/bi: Handle standard FMA conversions
578 - pan/bi: Handle abs packing for fp16/FMA add/min
600 - pan/bit: Add preliminary FMA/ADD/MOV implementations
607 - pan/bit: Add FMA test
[all...]
H A D20.2.0.rst306 - pan/bi: Pack round opcodes (FMA, either 16 or 32)
352 - pan/bi: Don't pack ICMP on FMA
358 - pan/bi: Pack FMA IADD/ISUB 32
361 - pan/bi: Don't schedule <32-bit IMATH to FMA
508 - pan/bi: Remove FMA? parameter from get_src
3401 - Revert "ac: generate FMA for inexact instructions for radeonsi"
3940 - aco: replace MADs in isel with FMA on GFX10.3
H A D21.0.0.rst2149 - radeonsi: correct the MAD/FMA support table
H A D21.3.0.rst3541 - nir/algebraic: reassociate add chains for more MAD/FMA-friendly code
H A D20.3.0.rst3375 - Revert "ac: generate FMA for inexact instructions for radeonsi"
H A D21.2.0.rst732 - pan/bi: Allow IADD.u32 on FMA as \*IADDC
/xsrc/external/mit/MesaLib.old/dist/src/gallium/auxiliary/tgsi/
H A Dtgsi_info_opcodes.h20 OPCODE(1, 3, COMP, FMA)
/xsrc/external/mit/MesaLib/dist/src/gallium/auxiliary/tgsi/
H A Dtgsi_info_opcodes.h20 OPCODE(1, 3, COMP, FMA)
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/
H A Dnv50_ir_from_tgsi.cpp808 NV50_IR_OPCODE_CASE(FMA, FMA);
907 NV50_IR_OPCODE_CASE(DFMA, FMA);
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/
H A Dnv50_ir_from_tgsi.cpp748 NV50_IR_OPCODE_CASE(FMA, FMA);
848 NV50_IR_OPCODE_CASE(DFMA, FMA);
/xsrc/external/mit/MesaLib.old/dist/src/mesa/state_tracker/
H A Dst_glsl_to_tgsi.cpp760 case7(FMA, FMA, UMAD, UMAD, DFMA, LAST, LAST);
/xsrc/external/mit/MesaLib.old/dist/src/gallium/docs/source/
H A Dscreen.rst608 * ``PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED``: Whether FMA and DFMA (doubles only)
H A Dtgsi.rst273 .. opcode:: FMA - Fused Multiply-Add
3715 multiplications implied by other operations, such as MAD, FMA, DP2,
/xsrc/external/mit/MesaLib/dist/docs/gallium/
H A Dscreen.rst718 * ``PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED``: Whether FMA and DFMA (doubles only)
H A Dtgsi.rst276 .. opcode:: FMA - Fused Multiply-Add
3793 multiplications implied by other operations, such as MAD, FMA, DP2,
/xsrc/external/mit/MesaLib/dist/src/mesa/state_tracker/
H A Dst_glsl_to_tgsi.cpp839 case7(FMA, FMA, UMAD, UMAD, DFMA, LAST, LAST);

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