Searched refs:GEN6_3DSTATE_WM_8_DISPATCH_ENABLE (Results 1 - 10 of 10) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di965_reg.h141 # define GEN6_3DSTATE_WM_8_DISPATCH_ENABLE (1 << 0) macro
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Di965_reg.h114 # define GEN6_3DSTATE_WM_8_DISPATCH_ENABLE (1 << 0) macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di965_reg.h141 # define GEN6_3DSTATE_WM_8_DISPATCH_ENABLE (1 << 0) macro
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Di965_reg.h114 # define GEN6_3DSTATE_WM_8_DISPATCH_ENABLE (1 << 0) macro
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen6_render.h108 # define GEN6_3DSTATE_WM_8_DISPATCH_ENABLE (1 << 0) macro
396 # define GEN6_3DSTATE_WM_8_DISPATCH_ENABLE (1 << 0) macro
H A Dgen5_render.h140 # define GEN6_3DSTATE_WM_8_DISPATCH_ENABLE (1 << 0) macro
H A Dgen6_render.c727 (kernels[0] ? GEN6_3DSTATE_WM_8_DISPATCH_ENABLE : 0) |
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen6_render.h108 # define GEN6_3DSTATE_WM_8_DISPATCH_ENABLE (1 << 0) macro
396 # define GEN6_3DSTATE_WM_8_DISPATCH_ENABLE (1 << 0) macro
H A Dgen5_render.h140 # define GEN6_3DSTATE_WM_8_DISPATCH_ENABLE (1 << 0) macro
H A Dgen6_render.c693 (kernels[0] ? GEN6_3DSTATE_WM_8_DISPATCH_ENABLE : 0) |

Completed in 43 milliseconds