Searched refs:GEN6_BLENDFACTOR_INV_SRC_ALPHA (Results 1 - 4 of 4) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen6_render.c191 /* Over */ {1, GEN6_BLENDFACTOR_ONE, GEN6_BLENDFACTOR_INV_SRC_ALPHA},
196 /* OutReverse */ {1, GEN6_BLENDFACTOR_ZERO, GEN6_BLENDFACTOR_INV_SRC_ALPHA},
197 /* Atop */ {1, GEN6_BLENDFACTOR_DST_ALPHA, GEN6_BLENDFACTOR_INV_SRC_ALPHA},
199 /* Xor */ {1, GEN6_BLENDFACTOR_INV_DST_ALPHA, GEN6_BLENDFACTOR_INV_SRC_ALPHA},
275 else if (dst == GEN6_BLENDFACTOR_INV_SRC_ALPHA)
H A Dgen6_render.h673 #define GEN6_BLENDFACTOR_INV_SRC_ALPHA 0x13 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen6_render.c157 /* Over */ {1, GEN6_BLENDFACTOR_ONE, GEN6_BLENDFACTOR_INV_SRC_ALPHA},
162 /* OutReverse */ {1, GEN6_BLENDFACTOR_ZERO, GEN6_BLENDFACTOR_INV_SRC_ALPHA},
163 /* Atop */ {1, GEN6_BLENDFACTOR_DST_ALPHA, GEN6_BLENDFACTOR_INV_SRC_ALPHA},
165 /* Xor */ {1, GEN6_BLENDFACTOR_INV_DST_ALPHA, GEN6_BLENDFACTOR_INV_SRC_ALPHA},
241 else if (dst == GEN6_BLENDFACTOR_INV_SRC_ALPHA)
H A Dgen6_render.h673 #define GEN6_BLENDFACTOR_INV_SRC_ALPHA 0x13 macro

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