Searched refs:GEN6_VE0_VALID (Results 1 - 11 of 11) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di965_reg.h354 #define GEN6_VE0_VALID (1 << 25) /* for GEN6 */ macro
H A Di965_render.c2795 OUT_BATCH((id << GEN6_VE0_VERTEX_BUFFER_INDEX_SHIFT) | GEN6_VE0_VALID |
2804 OUT_BATCH((id << GEN6_VE0_VERTEX_BUFFER_INDEX_SHIFT) | GEN6_VE0_VALID |
2813 OUT_BATCH((id << GEN6_VE0_VERTEX_BUFFER_INDEX_SHIFT) | GEN6_VE0_VALID |
2824 GEN6_VE0_VALID |
H A Di965_video.c1556 GEN6_VE0_VALID |
1565 GEN6_VE0_VALID |
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Di965_reg.h327 #define GEN6_VE0_VALID (1 << 25) /* for GEN6 */ macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di965_reg.h354 #define GEN6_VE0_VALID (1 << 25) /* for GEN6 */ macro
H A Di965_render.c2795 OUT_BATCH((id << GEN6_VE0_VERTEX_BUFFER_INDEX_SHIFT) | GEN6_VE0_VALID |
2804 OUT_BATCH((id << GEN6_VE0_VERTEX_BUFFER_INDEX_SHIFT) | GEN6_VE0_VALID |
2813 OUT_BATCH((id << GEN6_VE0_VERTEX_BUFFER_INDEX_SHIFT) | GEN6_VE0_VALID |
2824 GEN6_VE0_VALID |
H A Di965_video.c1557 GEN6_VE0_VALID |
1566 GEN6_VE0_VALID |
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Di965_reg.h327 #define GEN6_VE0_VALID (1 << 25) /* for GEN6 */ macro
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/
H A Dbrw_defines.h512 # define GEN6_VE0_VALID (1 << 25) macro
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen5_render.h217 #define GEN6_VE0_VALID (1 << 25) /* for GEN6 */ macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen5_render.h217 #define GEN6_VE0_VALID (1 << 25) /* for GEN6 */ macro

Completed in 41 milliseconds